Abstract: An on-chip circuit for defect testing with the ability to maintain a substrate voltage at a level more positive or more negative than a normal negative operating voltage level of the substrate. This is accomplished with a chain of MOSFETs that are configured to operate as a chain of resistive elements or diodes wherein each element in the chain may drop a portion of a supply voltage coupled to a first end the chain. The substrate is coupled to a second end of the chain. The substrate voltage level is essentially equivalent to the supply voltage level less the voltage drops across the elements in the diode chain. A charge pump maintains the substrate voltage level set by the chain. Performing chip testing with the substrate voltage level more negative than the normal negative voltage level facilitates detection of devices that will tend to fail only at cold temperatures.

Abstract: A system and method for detecting a location of a short in a flip-chip device is disclosed. The flip-chip device includes a semiconductor die and a substrate. The semiconductor die has an active area including a surface. The semiconductor die also has a plurality of connections coupled with the surface of the active area. The method and system include supplying power to the semiconductor die and sensing a temperature at a plurality of locations while power is supplied to the semiconductor die. The temperature is sensed at the plurality of locations using at least one thermal couple. The plurality of locations is disposed between the plurality of connections.

Abstract: The invention provides a semiconductor device that can inspect the connection states of power source terminals and grounding terminals of a test LSI at a low cost and in a short time, and an inspection method for the same. Switches SW1 to SW3 are provided between a plurality of power source terminals PD1 to PD3 and a power source line 10 inside the test LSI 4. A switch SWT is provided between the power source line and a grounding line 11 inside the test LSI. When inspecting the connection state of a certain power source terminal, the switch connected between the power source terminal and the power source line is closed, the switch SWT between the power source line and the grounding line is closed, and remaining switches are opened. A voltage is supplied between the power source terminal and a grounding terminal, and whether or not the power source terminal is in the connected state is determined by whether or not a current flows.

Abstract: The method for inspecting an integrated circuit comprising a plurality of sub-circuits includes the determination of the supply current into at least one of the sub-circuits. This supply current is determined, while the other sub-circuits are operational, by measuring the voltage over a segment of the supply line through which this supply current flows. This supply line contains no additional components to facilitate the measuring of the voltage.

Abstract: An induction machine asymmetry detection instrument includes an interconnector and a voltmeter. The interconnector is configured to connect an electric source across a first terminal and a second terminal of a stator of an induction machine. The induction machine includes a rotor disposed for magnetic coupling with the stator. The interconnector is further configured to cause a flow of direct current between the first terminal and the second terminal of the stator during a rotation of the rotor when the induction machine is substantially unloaded. The voltmeter is connectable across the second terminal and a third terminal of the stator. A detection by the voltmeter of a meaningful voltage across the second terminal and the third terminal of the stator concurrent with the flow of direct current between the first terminal and the second terminal and concurrent with the rotation of the rotor serves to indicate an asymmetry of a portion of the induction machine.

Abstract: An integrated circuit capable of efficiently storing data words of varying length is disclosed. The inventive integrated circuit can be a programmable logic device that includes a plurality of configurable memory array blocks. The integrated circuit includes a control circuit that characterizes data to be stored and based upon that characterization provides control signals to direct connectors. The direct connectors then directly connect selected configurable memory array blocks when a single memory array block could not accommodate the data to be stored.

Abstract: An output buffer circuit of a Pseudo Emitter Coupled Logic (PECL) uses a common level which is generated by a resistance division so that the common level is unstable to follow to a gradient of power source variation and an output signal level of the output buffer circuit is apt to be off from a level of the PECL.

Abstract: In a level shifter including a latch consisting of two p-channel transistors P1 and P2, when an input signal at a terminal IN changes from H- into L-level, an n-channel transistor N2 turns ON, thereby dropping a potential level at a node W2. However, since a p-channel transistor P4 is OFF, no short-circuit current flows from a high voltage supply VDD3 into the ground by way of the transistors P2 and N2. On the other hand, since n- and p-channel transistors N1 and P3 are OFF, both terminals of a node W1 are electrically isolated. But the high voltage supply VDD3 pulls the node W1 up to a high voltage level by way of the p-channel transistors P4 and P1 and another p-channel transistor P5 as a resistor. Accordingly, the capacitance to be driven by the n-channel transistors N1 and N2 can be reduced, thus shortening the delay.

Abstract: A clock gate buffering circuit is having a functional circuit without a latch that receives a clock and an enable signal. A logic voltage of an enable signal sends a corresponding clock gate signal to provide the other circuit when the clock of the functional circuit is in a rising edge. Also, the logical voltage of the enable signal sends a corresponding clock gate signal to provide the other circuit when this functional circuit is also in falling edge.

Abstract: A logic cell capable of realizing a high speed logic operation without using a pipeline register and capable of realizing a simplification of the circuit structure and a lowering of the power consumption, and a logic circuit using the same, wherein an input register converts an input data to a two-wire code synchronous to a clock signal and supplies the same to a logic cell array, each logic cell of the logic cell array performs a predetermined logic operation, when an output code of a monitor cell changes to a valid logic code, an early completion detection signal output from a NOR gate becomes “L”, the input register is reset in accordance with this, and the output becomes a blank code, the blank code is propagated by the logic cell array, and when the output of the monitor cell changes to the blank code, the output of the NOR gate becomes “H”, the reset is released, and the input register supplies the input data to the logic cell array.

Abstract: An object of the present invention is to provide a phase comparing circuit capable of outputting a signal in accordance with phase difference with a high degree of accuracy, even if the phase difference is small. The phase comparing circuit according to the present invention has a feed forward circuit connected between a frequency phase comparator and a charge pump. The feed forward circuit has a capacitor connected between each Q output terminal of flip-flops in the frequency phase comparator and the current path of the charge pump circuit. The capacitor couples capacitively the Q output terminals of the D flip-flops with the current path of the charge pump circuit, in order to quickly provide the Q output voltages of the D flip-flops to the charge pump circuit.

Abstract: A voltage level detection circuit (1) with a threshold level which is dependent on the manufacturing process. The circuit comprises a first current generator (4) which generates a monitoring current (IM) derived from the voltage (VM) to be monitored. This monitoring current (IM) is compared with a reference current (Iref1). A switchable reference current (Iref2) provides for hysteresis.

Abstract: A phase-locked loop circuit and method for providing for compensation for an offset. A phase-locked loop circuit comprises a phase detector, a compensation circuit, a loop filter, and a VCO. The phase detector is coupled to receive a first input signal and a second input signal. The phase detector is configured to output one or more of a plurality of output signals indicative of a difference between the first input signal and the second input signal. The compensation circuit is coupled to receive the output signals and to reduce a voltage offset between the output signals. The compensation circuit is further configured to provide a plurality of compensated output signals. The loop filter is coupled to receive the compensated control signals. The loop filter is configured to output a first control signal. The VCO is coupled to receive the first control signal and to output the second input signal based on the first control signal.

Abstract: A number of control signals are provided, where each is responsive to a phase error measured at a different time between a first oscillatory signal and a number of second oscillatory signals. A node is either charged or discharged using a number of charged storage devices, where each device has a predetermined capacitance, in response to the number of first control signals. The method is applicable in frequency control circuit applications such as phase locked loops (PLLs), delay locked loops (DLLs) and clock recovery circuits (CRCs).

Abstract: A receiving system for aligning a first signal to a reference signal is disclosed. In the receiving system, a selectable delay receives a first signal and delays the first signal by a selectable amount to generate a delayed first signal. A phase detector receives the delayed first signal and a reference signal and generates phase information which represents a phase difference between the delayed first signal and the reference signal. A phase accumulator receives and accumulates the phase information and generates delay select information which represents an accumulated phase difference between the delayed first signal and the reference signal. The selectable delay receives the delay select information and delays the first signal based on the delay select information, resulting in improved alignment of the delayed first signal and the reference signal. The receiving system may also include a second delay for receiving a second signal and delaying it by a fixed amount to generate the reference signal.

Abstract: A self-terminating module is provided that at least partially terminates a signal line when the self-terminating module is coupled thereto. The self-terminating module comprises an internal non-self-terminating module directly coupled to an internal termination circuit. Preferably an active internal termination circuit is employed. A pass circuit may be coupled between the internal termination circuit and the internal non-self-terminating module so as to pass a received signal therebetween with fewer reflected signal contributions. When a pass circuit is employed, a delay circuit responsive to a trigger signal controls signal transfer between the internal termination circuit and the internal non-self-terminating module. One or more self-terminating modules may be coupled to a signal line and the termination impedance of each module is selected to provide adequate signal line termination without significantly loading the signal line when one or more of the self-terminating modules are coupled thereto.

Abstract: The present invention relates to a charge-pumping circuit for low-supply voltage. A small charge-pumping circuit was added at the gates of the original Dickson charge-pumping circuit's each stage for bias voltage and the first transistor group was added between well and gate. The second transistor group was added between the gate and drain of original trans0istor. Thus, the charge-pumping circuit for low-supply voltage can supply a higher positive or negative voltage.

Abstract: A programmable circuit includes a first node and provides a programmed signal based on the state of the first node. A first anti-fuse has a programmed state and an unprogrammed state and couples the first node to a first power supply when in the programmed state and decouples the first node from the first power supply when in the unprogrammed state. A second anti-fuse has a programmed state and an unprogrammed state and couples the first node to a second power supply when in the programmed state and decouples the first node from the second power supply when in the unprogrammed state. The state of the programmed signal can be used to replace a primary circuit element of an integrated circuit with a redundant circuit element.

Abstract: A semiconductor integrated circuit comprises: a first MOS transistor having one source/drain electrode for receiving a power supply voltage and the other source/drain electrode connected to a virtual power supply line; a second MOS transistor having one source/drain electrode connected to the virtual power supply line and the other source/drain electrode connected to a backgate power supply line; and a third MOS transistor having one source/drain electrode connected to the virtual power supply line and the backgate electrode connected to the backgate power supply line. When the first and second transistors are turned on, a voltage of the backgate electrode is forwardly biased to the one source/drain electrode in the third MOS transistor, thereby improving the operation speed of an internal circuit including the third MOS transistors in an active period.

Abstract: A polyphase filter (20; 100) is described, having two filter channels (30I, 30Q; 101I, 101Q) for processing an I-input signal (&phgr;I) and a Q-input signal (&phgr;Q) which is shifted over 90° with respect to the I-input signal (&phgr;I), respectively. The filter (20; 100) has at least two capacitive filter components (CI, CQ; CiI, CiQ) corresponding to each other in the two filter channels (30I, 30Q; 101I, 101Q), wherein the capacity values (C; Ci) of these two capacitive filter components (CI, CQ; CiI, CiQ) are substantially equal to each other. Said two capacitive filter components (CI, CQ; CiI, CiQ) are coupled to each other by means of two current source couplings (40QI, 40IQ; 106i) switched in anti-parallel, having substantially equal characteristic. Hereby, a displacement of the filter characteristic toward higher frequencies is achieved, over a distance &ohgr;C.

Abstract: A mute circuit for a digital audio amplifier circuit includes a PWM drive circuit which receives analog audio signals and generates drive pulses in PWM modulated depending on the amplitude of the received analog audio signals and further depending on the positive and negative polarity of the analog audio signals with respect to the amplitude reference level and supplies the same to a push-pull output circuit; a switch circuit including a third transistor inserted either between a first transistor at push side in the push-pull output circuit and a power source line or between a second transistor at pull side in the push-pull output circuit and a reference potential line; and a time constant circuit which drives the third transistor from OFF to ON depending on a power source making.

Abstract: A predistortion circuit has

Abstract: The first amplifier circuit D1 is formed by connecting drains of a pair of N-channel MOS transistors forming the first current mirror circuit CM1 respectively to the drains of P-channel MOS transistors 1 and 2 as a differential input portion, and the second amplifier circuit D2 is formed by connecting drains of a pair of P-channel MOS transistors forming the second current mirror circuit CM2 respectively to the drains of N-channel MOS transistors 5 and 6 as a differential amplifier circuit. The first and second differential amplifier circuits D1 and D2 can amplify the first and second signals having cycles corresponding with each other with their duty ratios kept unchanged regardless of their operating point potentials. Further, the two outputs are combined into one output to suppress variation of the operating point potential of the output attributable to process-related factors, fluctuation of the power supply potential due to the oscillating operation and the like.

Abstract: A grounded emitter amplifier and a radio communication device using the same in which a bias voltage is generated in order to adjust an emitter current of a transistor in a grounded emitter amplification circuit so that the emitter current does not receive an influence of variations in several parameters of the transistor such as a current amplification factor hfe.

Abstract: A voltage controlled oscillator circuit incorporating a closed loop coarse tuning mechanism. In this system, a reference oscillator is set with the desired frequency for the voltage controlled oscillator. A resulting voltage used to drive the oscillator is produced by a synthesizer connected in series with a loop filter. The resulting voltage is connected to a fine tune input of the voltage controlled oscillator and also to the input of an adaptive closed loop coarse tuning mechanism. The adaptive closed loop coarse tuning mechanism is comprised of an op amp configured in a noninverting feedback loop connected to a parallel resistor/adapt switch loop. The loop is followed by a shunt capacitor filter which is then connected directly to the coarse tune input of the VCO. If the adapt switch is closed, currentfrom the coarse amp flows through a filter and to a coarse tune port of the VCO.

Abstract: Monolithic integrated circuit oscillators, complementary metal oxide semiconductor (CMOS) voltage-controlled oscillators, integrated circuit oscillators, oscillator-forming methods, and oscillation methods are described. In one embodiment, a monolithic integrated circuit oscillator is provided and includes a semiconductive substrate. A field effect transistor is supported by the semiconductive substrate and an oscillator circuit is connected therewith. The oscillator circuit preferably comprises an inductor which is supported by the substrate and has an inductance value greater than or equal to about 4 nH. In another embodiment, a complementary metal oxide semiconductor (CMOS) voltage-controlled oscillator is provided and includes a metal oxide semiconductor field effect transistor (MOSFET) received by and supported over a silicon-containing substrate. The transistor has a gate, a source, and a drain.

Abstract: In a contactless IC card system, a modulating circuit manufactured in an IC form is operable in a high power efficiency. The demodulating apparatus is arranged by: first signal output means for outputting a first output signal having a predetermined phase with respect to that of an input signal; a second signal output means for outputting a second output signal having a predetermined phase with respect to that of the input signal; gate means for gating at least the second output signal; calculation means for adding, or subtracting the first output signal and the second output signal; and control means for controlling the operation of the gate means in response to a logic level of input data.

Abstract: A surface acoustic wave filter device includes a piezoelectric substrate, and first, second and third surface acoustic wave filter elements disposed on the piezoelectric substrate. Each of the surface acoustic wave filters has a plurality of IDTs disposed along the surface acoustic wave propagation direction. The second and third surface acoustic wave filter elements are arranged such that they are substantially equal in transmission amplitude characteristic within a band but different in transmission phase characteristic by about 180°. At least one IDT of the second surface acoustic wave filter element and at least one IDT of the third surface acoustic wave filter element are connected to at least one IDT of the first surface acoustic wave filter element.

Abstract: A surface acoustic wave filter includes a piezoelectric substrate and a plurality of surface acoustic wave resonators provided on the piezoelectric substrate and connected to define a ladder filter circuit.

Abstract: A surface acoustic wave filter has a plurality of interdigital transducers arranged in a ladder circuit structure. Each of the interdigital transducers has a first comb-shaped electrode and a second comb-shaped electrode, each of which has a plurality of electrode fingers and a bus bar connected to first ends of the plurality of electrode fingers. The first and second comb-shaped electrodes interdigitate with each other so that second ends of the plurality of electrode fingers of the first comb-shaped electrode extend toward the bus bar of the second comb-shaped electrode. A gap is created in at least one of the interdigital transducers to cause a ripple in the pass band of the surface acoustic wave filter such that the ripple increases the steepness of the filter characteristics at the high frequency shoulder of the pass band. The gap is defined between the bus bar of the first comb-shaped electrode and the second ends of the plurality of electrode fingers of the second comb-shaped electrode.

Abstract: A high temperature superconductor (HTSC) 5 is magnetized between drive coils 1,2 forming poles of a magnet connected by an iron yoke 9 by relative movement of a vacuum insulated cryostat 4 containing the HTSC and the magnetizing magnet, in order to magnetize a large area of HTSC using a magnet with a small region 3 of magnetizing flux. Alternatively, the HTSC 5 may be contained in an evacuated region of a cryostat containing the magnetizing magnet. An interconnecting chamber allows the HTSC to be moved between an operative region and a magnetizing region without substantial loss of vacuum.

Abstract: An output choke for a D.C. arc welder comprising a high permeability core with an inductance controlling air gap defined by first and second pole pieces terminating in first and second surfaces facing each other and each having two spaced edges with an intermediate area, said surfaces converging from said intermediate area toward each of said edges to generate a specific cross sectional shape for said gap wherein said choke is large enough to carry at least about 100 amperes of weld current.

Abstract: An improved thin film inductor design is described. A spiral geometry is used to which has been added a core of high permeability material located at the center of the spiral. If the high permeability material is a conductor, care must be taken to avoid any contact between the core and the spiral. If a dielectric ferromagnetic material is used, this constraint is removed from the design. Several other embodiments are shown in which, in addition to the high permeability core, provide low reluctance paths for the structure. In one case this takes the form of a frame of ferromagnetic material surrounding the spiral while in a second case it has the form of a hollow square located directly above the spiral.

Abstract: An improved thin film inductor design is described. A spiral geometry is used to which has been added a core of high permeability material located at the center of the spiral. If the high permeability material is a conductor, care must be taken to avoid any contact between the core and the spiral. If-a dielectric ferromagnetic material is used, this constraint is removed from the design. Several other embodiments are shown in which, in addition to the high permeability core, provide low reluctance paths for the structure. In one case this takes the form of a frame of ferromagnetic material surrounding the spiral while in a second case it has the form of a hollow square located directly above the spiral.

Abstract: A medical perfusion system for use in connection with the medical treatment of a patient is provided with a first type of perfusion device in the form of a blood pump adapted to pump blood through a fluid conduit connected to the patient, a second type of perfusion device in the form of a sensor adapted to sense a condition relating to the pumping of blood through the fluid conduit and to generate a sensing signal relating to the condition, and a data communications network for operatively interconnecting the perfusion devices. The perfusion system also includes means for transmitting messages in the form of digital data packets among the perfusion devices over the data communications network and a controller operatively coupled to the perfusion devices via the data communications network, the controller having an input device for accepting pump control commands relating to the blood pump from an operator.

Abstract: A network control system is provided which includes: a network terminal; and a control terminal. The network terminal transmits to the control terminal manipulation information indicating a type of at least one manipulation component and a manipulation requesting signal corresponding to the manipulation component, receives from the control terminal the manipulation requesting signal, and performs an operation corresponding to the manipulation requesting signal upon receipt of the manipulation requesting signal from the control terminal.

Abstract: If a received signal includes a message signal following the address of the pager concerned, a decoder section decodes the message signal and a control section stores it in a memory section together with a reception time. At this time, the control section judges whether the message signal includes a sender identification code or a consecutive transmission code. If either code exists, the control section stores it in the memory section together with the message. The control section reads message data from the memory section, and a display control section controls a display section to display the message. If the message includes a sender identification code or a continuous transmission code, the control section searches for messages to be displayed together with the current message from among the other messages stored in the memory section, and the display control section controls the display section to display the found messages en bloc.

Abstract: A rearview mirror support and information display assembly for vehicles includes a rigid mirror stay preferably having a mirror support for an independently adjustable rearview mirror and a breakaway mount which releasably couples the stay and any supported rearview mirror to a windshield mounted button or a header mounted base such that the entire assembly is released on impact. An information display is positioned on the assembly adjacent the position of a rearview mirror when supported thereon to convey information to the vehicle driver/occupants. Preferably, the display is mounted in a housing which conceals a light source or other emitter for the display, the housing being removably secured to the mirror stay to allow servicing and access to a concealed wire passageway.

Abstract: A networkable smart sensor senses an analog signal and converts this to a digital signal output. A processed signal is then communicated to a network. The sensor can be a stand-alone electronic signal processor sensor or can be networked for operation with a controller and/or other sensors. Sensors can operate in a master-slave or peer-to-peer communication mode. The sensors are for use in industrial applications including vehicle engines and processes.

Abstract: The invention relates to a travel support system and a vehicle entrance control system. The central computer comprises a service information D/B that stores information pertaining to proposable services and corresponding vehicle information pertaining to vehicles; a transmission unit that receives vehicle information from a subordinate device; and a controller that reads service information corresponding to the vehicle information received by the transmission unit from the service information D/B, wherein the transmission unit transmits the read service information to the subordinate device, and the subordinate device is provided with a ROM that stores vehicle information pertaining to vehicles, and a transmission unit that transmits the vehicle information stored in the ROM to the central computer and receives service information from the central computer.

Abstract: An unmanned vehicle for use in a stable such as a cowshed is provided with detection components for determining meteorological conditions. The detection components comprise sensors for determining temperature, air velocity, gas, analysis, light, air pressure, and air humidity. The detection sensors are disposed at different heights on the vehicle and on a telescopic carrier for providing determinations at variable altitudes. The vehicle includes a data processing unit for storing and analyzing data. The vehicle also includes a transmitting unit and signaling device for transfer of data and for alerting an operator of threatening meteorological conditions and when they become hostile. Composition and quantity of feed which is provided to animals in the stable is varied dependent on changes in climate detected by the vehicle.

Abstract: Alarm-triggering locking plate for the closing area of a door or window to be secured, comprising a first breaking plate (4) to be overcome by force, having at least one stop element (3), comprising a second fixing means for the locking plate (1) which is more difficult to overcome by force, and is designed as at least one counter stop element (12) anchored on a door or window frame, and means which trigger an alarm when the first fixing means has been overcome, wherein a motion of the front retaining part (3) in the opening direction (8) of the door or window is limited by the second fixing means (12) when the first fixing means (4) has been overcome.

Abstract: The present invention relates to RFID devices, including handheld RFID devices, and applications for such devices. The devices and applications may be used in connection with items that are associated with an RFID tag, and optionally a magnetic security element. The devices and applications are described with particular reference to library materials such as books, periodicals, and magnetic and optical media.

Abstract: The device according to the invention provides a non-contacting temperature sensing device incorporating micro-bolometric detectors as the suitable infrared sensors for automotive applications. A first and second infrared sensors each include an active infrared sensing element and a temperature drift compensating element. A current bias is applied to the active infrared sensing element as well as to the temperature drift compensating element, which is identical in structure with the active infrared sensing element, and the voltage outputs of these two elements pass through a differential amplifier. The fluctuation in the substrate temperature or the ambient temperature affects the active sensing element and the compensating element in the same way, thus it is cancelled out. Instead of using one spectral band of the infrared radiation, as in the prior art, two spectral bands are used resulting in a first and second signal generated by the first and second infrared sensors.

Abstract: The invention relates to a device for monitoring the operation of an industrial installation (3) comprising functional members (5), the said device (1) comprising groups (G1, G2 . . . Gn) of detectors (D1,1, . . . Dn,j) that defect the operating status of the installation (3) these each being associated with a particular aspect of the monitoring, and a display unit (11) comprising means (13) of communicating the operating statuses picked up by the said detectors (D1,1, . . . Dn,j). The device comprises, arranged between the said detectors (D1,1, . . . Dn,j) and the display unit (11), means (15) for processing the operating statuses picked up by the said detectors (D1,1, . . . Dn,j) and for controlling the selective displaying, on the said display unit (11), of information relating to overall operating statuses of predetermined groups (G1, G2 . . . Gn) of detectors (D1,1, . . . Dn,j).

Abstract: A vehicle security system for performing selectable vehicle security functions that are programmable in a wireless manner. The system has a microcontroller controlling a vehicle security interface including at least a siren control unit and a vehicle head/signal light controlling unit. A physically independent remote programming unit is used for transmitting function-programming information to the microcontroller, and a radio receiver is connected to the microcontroller for receiving function-programming information transmitted by the remote programming unit. The remote programming unit includes a switch array for setting up a security function code pattern representing the selected security functions. The remote programming unit also includes a radio transmitter for sending, in an electromagnetic transmission, the function-programming command in a signal string representing the security function code pattern to the microcontroller.

Abstract: To provide a movable body detecting/notifying system that is capable of determining and reporting whether another movable body exists behind an obstruction or at a position that can be verified by the sense of sight. A movable body detecting/notifying system allows a detecting movable body to detect and report a detected movable body by using electromagnetic wave communication. The detected movable body transmits a large-wavelength electromagnetic wave easily diffractable by an obstruction as well as a small-wavelength electromagnetic wave not easily diffractable by an obstruction at the same time. The detecting movable body generates a notice for reception of only the large-wavelength electromagnetic wave without the small-wavelength electromagnetic wave or a notice for reception of both the large-wavelength and small-wavelength electromagnetic waves different from the notice for reception of only the large-wavelength electromagnetic wave.

Abstract: A combination radar/laser detector with environmental sensors is programmed to provide a range of functions, including weather information, road conditions and the like, and in some cases to incorporate road-specific information in functionality. The road-specific information may be provided by roadside RF broadcast terminals. In a preferred embodiment the system monitors characteristics that indicate a driver's state of awareness, and audio alerts are provides when the system determines a driver is dozing or drifting toward a dozing state. In various embodiments a broad range of functionality is provided based on received and sensed parameters.

Abstract: Includes means (2) for monitoring the position and behaviour of air traffic in the vicinity of the aircraft and generating a warning or avoidance signal for air traffic predicted to be on a collision course. The apparatus also includes means (5) for monitoring the position and behaviour of the aircraft relative to terrain in the vicinity of the aircraft flight path to generate a warning or avoidance signal for terrain features predicted to provide a collision threat. Means (13, 14, 17) are provided for receiving the traffic warning signals and terrain warning signals comparing the signals and generating a combined warning or advisory signal which indicates an action for the aircraft which avoids both air traffic and terrain collisions.

Abstract: Based on searched route information and map data, a target intersection for guidance is specified S11. For the specified target intersection, lane data regarding the number of lanes and lane control of roads being connected thereto is read, and then recommended lane information which indicates which lane to take when entering the target intersection and to exit therefrom is generated S12. Based on information about the target intersection and the lane data, generated is a simplified intersection image of the target intersection for lane guidance S13. Based on the recommended lane information, a running path which passes through the recommended lanes for entering into and exiting from the target intersection is generated, and is combined with the intersection image S14. Then, lane guidance information for displaying the resultant intersection image is outputted with a predetermined timing S15.