Patents Issued in February 6, 2003
  • Method, apparatus, and program for chaining server applications
    Publication number: 20030028678
    Abstract: A mechanism is provided for chaining server applications. A chaining module is provided that receives a series of server applications and chains them together passing the output of one to the input of the next. The series of server applications may be passed to the chaining module in a chain option. A properties file may be provided to register names of server applications. A name may be associated with the chaining module and the options may be specified in the properties file. Thus, a chain of server applications may be registered by name.
    Type: Application
    Filed: July 31, 2001
    Publication date: February 6, 2003
    Applicant: International Business Machines Coporation
    Inventor: Richard J. Redpath
  • System and method for managing video network devices
    Publication number: 20030028679
    Abstract: A video network platform manages video network devices with management applications, such as scheduling, monitoring and diagnostics applications, by representing the devices as interface objects that support a network interface module, and application objects used by the management applications and created by an adapter engine that creates an application object for each corresponding video network device interface object. A network interface module associated with the video network platform invokes the adapter engine to create an application object associated with a device. The application object uses its dynamic attribute query capabilities to build an interface object in the network interface module and thus obtain device attributes such as device address information. The application module populates itself with device information for supporting management applications, thus allowing conventional network interface modules to cooperate with application specific objects.
    Type: Application
    Filed: July 31, 2001
    Publication date: February 6, 2003
    Applicant: VTEL Corporation
    Inventors: James Joseph Babka, Kurtis L. Seebaldt
  • Application manager for a content delivery system
    Publication number: 20030028680
    Abstract: An applications manager, executed with application resources in a streaming media retrieval system, which monitors selected or registered applications and initiates recovery procedures in the event of an error. An application manager thread is instantiated for each application process to be monitored. The application process is monitored for a state message that is periodically transmitted by the application process. If the state message is not received within a period, the application manager is configured to autonomously initiate one of a number of recovery processes, which range from process-level to operating system-level.
    Type: Application
    Filed: June 26, 2001
    Publication date: February 6, 2003
    Inventor: Frank Jin
  • Apparatus and method for port sharing among a plurality of server processes
    Publication number: 20030028681
    Abstract: An apparatus and method for port sharing among a plurality of server processes are provided. The apparatus and method provide an intermediate layer between the communication port and the server processes. This intermediate layer provides a port mapping such that data messages received via a shared communication port are mapped to separate ports based on the domain of the data message. Each server process is configured to listen to a different virtual communication port. The mapping of the present invention maps data messages received in the shared communication port to one of these virtual communication ports based on the domain to which the data message belongs. This mapping is also performed with outgoing messages from the server as well.
    Type: Application
    Filed: August 2, 2001
    Publication date: February 6, 2003
    Applicant: International Business Machines Corporation
    Inventors: Vinit Jain, Dwip N. Banerjee
  • System and method for object persistence life-cycle and object caching integration
    Publication number: 20030028682
    Abstract: A system for integrating object changes occurring to an object in a first object storage system with a second object storage system is provided. The method comprises the steps of receiving from the first object storage system notification of an event relating to an object in the first object storage system, setting up a representation of the object in the second object storage system in response to the notification, determining object changes made to the object in the first object storage system using the representation in the second object storage system, and integrating the determined object changes with the representation in the second storage system.
    Type: Application
    Filed: August 1, 2001
    Publication date: February 6, 2003
    Inventor: James Bryce Sutherland
  • Method and system for object cache synchronization
    Publication number: 20030028683
    Abstract: A system and method are provided for providing object change information through a network. The local object persistence system distributes the information regarding the change to the object by the synchronization executor through a communication link. The remote object persistence system that has established the communication link with the local object persistence system obtains the distributed object change information. The object change information is used to update the database and update an object cache for storing the object.
    Type: Application
    Filed: August 1, 2001
    Publication date: February 6, 2003
    Inventors: Gordon James Yorke, Michael Laurence Keith
  • Efficient thread programming using a single callback function
    Publication number: 20030028684
    Abstract: A method that uses a single callback function for a multiphase service with possible discontinuation of execution between the phases. The method is based on assignment of a case in the callback function for each phase or state of the service and a stack of state descriptors. At each call to the callback function, the top descriptor is popped off the stack and the appropriate case in the callback function is run.
    Type: Application
    Filed: July 31, 2001
    Publication date: February 6, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Danit Segev, Gabriel Walder, Yoram Novick, Yigal Eisinger
  • Application program interface for network software platform
    Publication number: 20030028685
    Abstract: An application program interface (API) provides a set of functions for application developers who build Web applications on Microsoft Corporation's .NET™ platform.
    Type: Application
    Filed: February 28, 2002
    Publication date: February 6, 2003
    Inventors: Adam W. Smith, Anthony J. Moore, Anders Hejlsberg, Brian A. LaMacchia, Blaine J. Dockter, Brian M. Grunkemeyer, Brian K. Pepin, Caleb L. Doise, Christopher W. Brumme, Chad W. Royal, Christopher L. Anderson, Corina E. Feuerstein, Craig T. Sinclair, Daniel Dedu-Constantin, Daniel Takacs, David S. Ebbo, David S. Mortenson, Erik B. Christensen, Erik B. Olson, Fabio A. Yeon, Giovanni M. Della-Libera, Gopala Krishna R. Kakivaya, Gregory D. Fee, Hany E. Ramadan, Jayanth V. Rajan, Jeffrey M. Cooperstein, Jonathan C. Hawkins, James H. Hogg, Joe D. Long, John I. McConnell, Jesus Ruiz-Scougall, James S. Miller, Julie D. Bennett, Jun Fang, Krzysztof J. Cwalina, Keith W. Ballinger, Lance E. Olson, Loren M. Kohnfelder, Luca Bolognese, Manu Vasandani, Mark T. Anders, Mark P. Ashton, Mark A. Boulter, Mark W. Fussell, Michael M. Magruder, Manish S. Prabhu, Neetu Rajpal, Nikhil Kothari, Nithyalakshmi Sampathkumar, Nicholas M. Kramer, Omri Gazitt, Radu Rares Palanca, Raja Krishnaswamy, Robert M. Howard, Ramasamy Krishnaswamy, Shawn P. Burke, Scott D. Guthrie, Sean E. Trowbridge, Seth M. Demsey, Shajan Dasan, Subhag P. Oak, Sreeram Nivarthi, Stefan H. Pharies, Suzanne M. Cook, Susan M. Warren, Tarun Anand, Travis J. Muhlestein, William A. Adams, Yan Leshinsky, Yann E. Christensen, Yung-shin Lin, Stephen J. Miller, Joseph Roxe, Alan Boshier, Henry L. Sanders, David Bau
  • TOKEN-BASED LINKING
    Publication number: 20030028686
    Abstract: A system links architecture neutral code downloaded to a resource constrained computer. The code may be separated into one or more packages having one or more referenceable items. The system maps the one or more referenceable items into corresponding one or more tokens; orders the tokens to correspond to a run-time mode; downloads the packages to the resource constrained computer; and links the packages into an executable code using the ordered tokens.
    Type: Application
    Filed: February 2, 1999
    Publication date: February 6, 2003
    Inventors: JUDITH E. SCHWABE, JOSHUA B. SUSSER
  • SCALABLE DATA COLLECTION AND COMPUTING APPARATUS
    Publication number: 20030028687
    Abstract: A method and apparatus for collecting and distributing information to and from a computing element that is quickly scalable at the installation to varying types and numbers of signals. Standard sized modules containing a generalized set of; computation, discrete I/O, analog I/O, serial I/O, adaptable I/O, etc. or any combination thereof, provide the building blocks that can be attached to each other to provide the desired combination of functions. These modular components are mated to each other through a simple serial interface providing the inter-module communication interface and local power requirements. The modules are quickly stacked together and snapped in place in a manner supporting severe environmental conditions.
    Type: Application
    Filed: August 23, 1999
    Publication date: February 6, 2003
    Inventors: EMRAY REIN GOOSSEN, CHARLES BOYD ANDERSON
  • Hybrid presentation controller and computer input device
    Publication number: 20030028688
    Abstract: An input device having a housing; a pointing device coupled with the housing having a plurality of buttons; a scrolling element coupled with the housing; and a module for detecting user input for operating the input device in at least a first mode and a second mode, where in the first mode, the input device operates as a tabletop computer pointing device, and where in the second mode, the input device operates as a hand-held presentation device used to control a computer-based presentation.
    Type: Application
    Filed: April 4, 2002
    Publication date: February 6, 2003
    Applicant: Logitech Europe S.A.
    Inventors: Guy Tiphane, Jan Edbrooke, Laurent Plancherel, Florian Max Kehlstadt
  • Configuration of an information system
    Publication number: 20030028689
    Abstract: A method and a system for configuring an information system in a vehicle is provided, in which a set of input/output rules is stored in a storage medium of the information system. An output, an input, and/or input/output processes of the information system are configured in accordance with the set of input/output rules. The method is further developed such that the integration of retrofitted components occurs automatically and in adaptation to the input/output rules of the information system. For this purpose, when connecting an additional component to the information system, a component-input/output rule is transmitted via an interface with the information system. The component-input/output rule is integrated into the output, the input and the input/output processes.
    Type: Application
    Filed: July 17, 2002
    Publication date: February 6, 2003
    Inventor: Johannes Fasolt
  • System, method and article of manufacture for a reconfigurable hardware-based multimedia device
    Publication number: 20030028690
    Abstract: A system, method and article of manufacture are provided for providing a hardware-based reconfigurable multimedia device. A default multimedia application is initiated on a reconfigurable multimedia device. A request for a second multimedia application is received from a user. Configuration data is retrieved from a data source and is used for configuring the logic device to run the second multimedia application. The second multimedia application is run on the logic device.
    Type: Application
    Filed: January 29, 2001
    Publication date: February 6, 2003
    Inventors: John Appleby-Alis, Alex Wilson, Ashley Surcliffe
  • Method and apparatus for avoiding unnecessary computer peripheral calibration activities
    Publication number: 20030028691
    Abstract: A method and apparatus for determining an appropriate recalibration duty cycle. The method instructs a network connected computer peripheral to access one or more servers to retrieve a timestamp. Retrieved timestamps are used to calculate the elapsed time since the last trigger-event (e.g., last calibration, printing activity, time of power-off, or the like). If the calculated elapsed time is less than a predetermined or dynamically determined threshold, the method instructs the peripheral to omit otherwise implemented calibration activities, e.g., a power surge reboot.
    Type: Application
    Filed: August 1, 2001
    Publication date: February 6, 2003
    Inventors: Theresa A. Burkes, George Bernhard Clifton, Steven Robert Folkner, Angela Kay Hanson, Kenneth Joseph O'Hara
  • Method and apparatus for transmitting data
    Publication number: 20030028692
    Abstract: A method of broadcasting N, an even integer, bits of data onto a bus that includes a first plurality of electrical conductors and a second plurality of electrical conductors. The method includes: broadcasting a first portion of data that includes N/2 bits of data onto the first plurality of electrical conductors. Then, after a time period has elapsed that is greater than 0 seconds and less than the time period required to transfer 2 bits of data sequentially on one of the first plurality of electrical conductors, broadcasting a second portion of data that includes N/2 bits of data onto the second plurality of electrical conductors.
    Type: Application
    Filed: August 2, 2001
    Publication date: February 6, 2003
    Inventors: Christopher M. Durham, Parsotam T. Patel
  • Hierarchical display of multilevel protocol for communication data
    Publication number: 20030028693
    Abstract: A hierarchical display of protocol layers for communication data. Fields of the communication data are converted into field cells where each field cell has a text field and a field descriptor. The field cells for each protocol layer are arranged by an interpreter into protocol units according to a protocol standard for that layer and then displayed in a hierarchical manner. Detailed specifications for field cells taken directly from the protocol standard can be displayed by using a cursor over the field cell. Indicators in particular ones of the field cells allow certain field cells within a protocol unit to be collapsed or expanded within the protocol unit or allow lower protocol units to be collapsed or expanded into the higher protocol units.
    Type: Application
    Filed: July 27, 2001
    Publication date: February 6, 2003
    Inventors: Michael Pasumansky, Peretz Tzarnotsky, Valera Fooksman
  • Prefetching data for peripheral component interconnect devices
    Publication number: 20030028694
    Abstract: Prefetching data includes issuing a first request to prefetch data from a memory, receiving a response to the first request from the memory, obtaining a measure of latency between the first request and the response, and controlling issuance of a subsequent request to prefetch other data from the memory based on the measure.
    Type: Application
    Filed: August 2, 2001
    Publication date: February 6, 2003
    Inventors: Nagi Aboulenein, Randy B. Osborne
  • Producer/consumer locking system for efficient replication of file data
    Publication number: 20030028695
    Abstract: In a distributed file system the distributed storage management is made useful to a variety of applications. Multiple quality of service options are provided through locking. Three locking systems are provided. The system offers a locking system designed for sequential consistency with write-back caching, typical of distributed file systems. A second locking system is provided for sequential consistency with no caching for applications that manage their own caches. Finally, a locking system that implements a weaker consistency model with write-back caching, designed for efficient replication and distribution of data is included. Locks for replication are suitable for serving dynamic data on the Internet and other highly-concurrent applications. The selection of the appropriate lock protocol for each file is set using the file metadata. Further, a novel locking system is provided for the lock system implementing a weak consistency model with write back caching.
    Type: Application
    Filed: May 7, 2001
    Publication date: February 6, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Randal Chilton Burns, Atul Goel, Wayne Curtis Hineman, Robert Michael Rees
  • Low overhead interrupt
    Publication number: 20030028696
    Abstract: A method and processor for interrupt processing operate to save processor cycles during the handling of interrupts. More particularly, upon an interrupt, the first instruction from an interrupt service routine (ISR) is loaded into an instruction register for immediate execution to save at least one cycle of interrupt instruction fetching. Simultaneously, the address of the second instruction from the ISR is stored into a program counter. Also, the next instruction in the regular program cycle for execution is taken from a prefetch register and stored in a holding register (or to the stack). Subsequently, the second instruction from the ISR is fetched and executed and the interrupt is serviced. When finished, the next regular instruction for execution is loaded into the prefetch register from the holding register (or stack) for subsequent execution. The program counter and a status register are restored from the stack.
    Type: Application
    Filed: June 1, 2001
    Publication date: February 6, 2003
    Inventors: Michael Catherwood, Joseph W. Triece, Rodney Drake
  • Implementing hardware interrupt event driven mechanism to offer soft real-time universal serial bus
    Publication number: 20030028697
    Abstract: A system and method for implementing hardware event driven soft real-time interrupts on a serial bus. In one embodiment, the serial bus comprises a universal serial bus. One embodiment of the presently described system includes a client device coupled to a host device. In one embodiment, the host places the client device in an interrupt mode by causing the client device to enter a suspend state. While in the interrupt mode, the client device sends an interrupt request signal to indicate it has interrupt data. In one embodiment, the host device indicates to the client device to enter the interrupt mode by sending a set interrupt mode signal. In response, the client device enters the interrupt mode and sends an interrupt request signal to the host to indicate it has interrupt data.
    Type: Application
    Filed: August 2, 2001
    Publication date: February 6, 2003
    Inventor: Tom L. Nguyen
  • Fault tolerant bus for highly available storage enclosure
    Publication number: 20030028698
    Abstract: A backplane apparatus for an electronic device enclosure includes a common bus comprising a plurality of signal lines, each signal line having a current limiting element, RA. Isolation circuitry is provided for electrically coupling each of the plurality of signal lines of the common bus to a corresponding plurality of signal lines of the electronic device to enable signal communication between the common bus and the electronic device through the isolation circuitry. In one embodiment, the backplane apparatus further comprises connectors to enable removably attaching the electronic devices such as disk drives. In one embodiment, the isolation circuitry coupling each signal line of the common bus to the connector comprises an inline resistor, RD. The isolation circuitry associated with some of the signal lines may include pull up resistors.
    Type: Application
    Filed: June 1, 2001
    Publication date: February 6, 2003
    Inventors: James J. deBlanc, Carl R. Haynie, James L. White
  • Removable computer with mass storage
    Publication number: 20030028699
    Abstract: The present invention provides a detachable add-on card unit to a host system that combines mass storage capability and a processor on the same card. The card can receive data from the host, process the data, and store it in processed form, as well as the reverse process of retrieving stored data, processing it, and supplying it to the host. The non-volatile mass storage memory may contain program storage as well as card system data and user data. The end user of the card can program applications into the program storage. The combination of mass storage and a processor also adds to the capabilities of the on-card processor, allowing the card to store and execute programs. The present invention is able to provide a programmable add-on card unit to a host system. A number of applications can be stored in the card's mass storage and loaded as needed by the on-card micro-controller.
    Type: Application
    Filed: August 2, 2001
    Publication date: February 6, 2003
    Inventors: Michael Holtzman, Yosi Pinto
  • SCSI connector
    Publication number: 20030028700
    Abstract: In a computer system having redundant SCSI controllers cards, a SCSI controller interface for receiving multiple interchangeable SCSI controller cards is configured so that the data bus paths between each of the SCSI controller slots and the controller circuitry do not cross
    Type: Application
    Filed: September 30, 2002
    Publication date: February 6, 2003
    Inventors: Michael S. Zandy, George J. Scholhamer, William C. Galloway
  • Integrated real-time performance monitoring facility
    Publication number: 20030028701
    Abstract: Real-time performance monitoring facility in an integrated circuit (IC) data processor for monitoring events related to different bus activity. The monitoring facility is accessible via a bus connection the IC. Events include device acquisition and ownership time, and the number of requests and grants on a given bus. The events are counted as occurrences and durations by a number of event counters integrated in the IC. The IC can notify software when the counters overflow. The IC may feature multiple clock domains, including, for instance, multiple bus interfaces operating at different clock frequencies, in which events from different clock domains may be tracked by the same counter. In one embodiment, the performance monitoring facility is integrated into an I/O processor (IOP) die that complies with the popular intelligent I/O (I2O) and Peripheral Components Interconnect (PCI) specifications.
    Type: Application
    Filed: September 25, 2002
    Publication date: February 6, 2003
    Inventors: Ravi S. Rao, Byron R. Gillespie, Elliot Garbus
  • Data reordering mechanism for data transfer in computer systems
    Publication number: 20030028702
    Abstract: A device to change the ordering of datums in a packet from a storage device to a pre-determined ordering according to their addresses. The device has a first circuit to receive and process address information to determine a data ordering of data associated with the address information; and a second circuit to reorder the data into ordered packets in the predetermined ordering. This device can be used to efficiently transfer graphic data through the AGP bus in a computer.
    Type: Application
    Filed: September 24, 2002
    Publication date: February 6, 2003
    Applicant: Intel Corporation
    Inventors: Altug Koker, Russell W. Dyer
  • DISK ARRAY DEVICE CAPABLE OF PROVIDING LOGICAL DISKS FOR EACH HOST COMPUTER REGARDLESS OF LIMITATION OF THE OTHER HOST COMPUTERS
    Publication number: 20030028703
    Abstract: A disk array device comprises interfaces each of that is connected to a host computer through a connection port. Each of the interfaces has a conversion table that stores relationships between logical disks included in the disk array device and logical units defined by the host computer. The host computer uses LBAs (Logical Block Addresses) for the logical units to access the logical disks. The interface converts the LBAs for the logical units into LBAs for the logical disks with reference to the conversion table. A controller of disk array device controls a reading section or a writing section to access the logical disks in response to the LBAs for the logical disks.
    Type: Application
    Filed: December 16, 1999
    Publication date: February 6, 2003
    Inventor: HIROHIKO KOIKE
  • Memory controller, flash memory system having memory controller and method for controlling flash memory device
    Publication number: 20030028704
    Abstract: An object of the present invention is to provide a memory controller that can perform a series of data write operations so as to complete the data writing at high speed.
    Type: Application
    Filed: December 5, 2001
    Publication date: February 6, 2003
    Inventors: Naoki Mukaida, Kenzo Kita, Yukio Terasaki
  • Computer device based on associative memory
    Publication number: 20030028705
    Abstract: The associative memory-based computer includes at least one associative memory, a plurality of associative data memories capable of temporarily holding input or output data of the associative memory, and a value judgement device receiving part of the data held in the associative data memory. The associative memory is formed of a chaotic neural network. The associative data memories include a first associative data memory sending/receiving data directly to/from the associative memory, and a plurality of second associative data memories sending/receiving data to/from the associative memory via the first associative data memory.
    Type: Application
    Filed: March 4, 2002
    Publication date: February 6, 2003
    Inventor: Yutaka Arima
  • Information recording/reproducing apparatus
    Publication number: 20030028706
    Abstract: An information recording/reproducing apparatus for recording information from a plurality of information sources includes a first recording part, an indicating part, and a read-out controlling part. The first recording part records a plurality of sets of information from the plurality of information sources. The indicating part indicates desired information. The read-out controlling part reads out the desired information indicated by the indicating part. Moreover, an information recording/reproducing apparatus for recording/reproducing information includes a recording/reproducing part, a decrypting part, and a billing control part. The recording/reproducing part records/reproduces encrypted information. The decrypting part decrypts information reproduced by the recording/reproducing part. The billing control part prohibits decrypting by the decrypting part in accordance with a billing state.
    Type: Application
    Filed: June 24, 2002
    Publication date: February 6, 2003
    Applicant: Fujitsu Limited
    Inventor: Yoshiyuki Okada
  • Memory array apparatus with reduced data accessing time and method for the same
    Publication number: 20030028707
    Abstract: A memory array apparatus with shorter data accessing time is proposed. The memory array apparatus comprises a register administrator and a plurality of data registers between a micro controller and at least one memory array. The data to be accessed are divided into a plurality of data blocks according to a predetermined data unit. The data block is firstly stored in corresponding data register and then read by the main frame or stored into the corresponding memory array. At the same time, the next data block is stored in the corresponding data register through circuit switched by the micro controller. The pending time of the main frame and the data accessing time can be advantageously reduced.
    Type: Application
    Filed: August 2, 2001
    Publication date: February 6, 2003
    Inventors: Chuan Sheng Lin, Chen Nan Lai, Kuang Yuan Chen
  • Novel flash memory arrangement
    Publication number: 20030028708
    Abstract: A device, a method and a system for direct execution of code from a flash memory arrangement, in which a separate memory component is not required, even if a flash memory component is used which has a restriction on the size of a data block which can be read at one time. Furthermore, the flash memory arrangement is optionally implemented as a “single die” chip or device, which is more efficient for manufacturing and which also results in lower costs.
    Type: Application
    Filed: August 6, 2001
    Publication date: February 6, 2003
    Inventor: Dov Moran
  • Method for erasing an electrically erasable nonvolatile memory device, in particular an EEPROM-FLASH memory device, and an electrically erasable nonvolatile memory device, in particular an EEPROM-FLASH memory device
    Publication number: 20030028709
    Abstract: Described herein is an erase method for an electrically erasable nonvolatile memory device, in particular an EEPROM-FLASH nonvolatile memory device, comprising a memory array formed by a plurality of memory cells arranged in rows and columns and grouped in sectors each formed by a plurality of subsectors, which are in turn formed by one or more rows. Erase of the memory array is performed by sectors and for each sector envisages applying an erase pulse to the gate terminals of all the memory cells of the sector, verifying erase of the memory cells of each subsector, and applying a further erase pulse to the gate terminals of the memory cells of only the subsectors that are not completely erased.
    Type: Application
    Filed: May 30, 2002
    Publication date: February 6, 2003
    Applicant: STMicroelectronics S.r.I.
    Inventors: Rino Micheloni, Giovanni Campardo, Salvatrice Scommegna
  • Semiconductor memory
    Publication number: 20030028710
    Abstract: A semiconductor memory includes a redundant RAM disposed independently of at least one regular RAM, the redundant RAM having redundant memory elements by which defective memory elements of the regular RAM can be replaced, and a control block for selecting either at least the regular RAM or the redundant RAM according to an address applied thereto, and for reading data from a memory cell of the selected RAM specified by the address. A plurality of regular RAMs can be disposed and the redundant RAM includes redundant memory elements by which defective memory elements of an arbitrary one of the plurality of regular RAMs can be replaced. The control block selects either one of the plurality of regular RAMs or the redundant RAM according to an address applied thereto, and reads data from a memory cell of the selected RAM specified by the address.
    Type: Application
    Filed: June 12, 2002
    Publication date: February 6, 2003
    Inventors: Hirofumi Shinohara, Yoshiki Tsujihashi, Takeshi Hashizume
  • Monitoring in-use memory areas for power conservation
    Publication number: 20030028711
    Abstract: Described herein is a system for operating memory at reduced power, based on whether the memory is actually in use. A memory controller receives notifications from an operating system or other computer program regarding which areas of physical memory are actually in use. The memory controller is responsive to the notifications to operate unused portions of memory at reduced power. In systems having refreshable memory, the memory controller omits refreshing for those memory rows that are not currently in use.
    Type: Application
    Filed: July 30, 2001
    Publication date: February 6, 2003
    Inventors: Steven C. Woo, Pradeep Batra
  • Semiconductor memory
    Publication number: 20030028712
    Abstract: The present invention provides a semiconductor memory capable of shortening a refresh cycle time and reducing power consumption at refresh. The semiconductor memory includes an address input circuit for generating each of internal address signals, a redundant judgement circuit for receiving the internal address signal therein and determining whether the corresponding address corresponds to an address for a defective word line of a plurality of normal word lines, and an address counter for generating refresh address signals for sequentially refreshing the plurality of normal word lines and redundant word lines. The redundant judgment circuit is deactivated upon refresh.
    Type: Application
    Filed: June 20, 2002
    Publication date: February 6, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Masashi Horiguchi, Shigeki Ueda, Hideharu Yahata
  • Method and apparatus for determining an exact match in a ternary content addressable memory device
    Publication number: 20030028713
    Abstract: A method and apparatus for determining an exact match in a ternary CAM device. Each ternary CAM cell includes CAM cells for storing CAM data, local mask cells for storing prefix mask data for the corresponding CAM cells, and a mask override circuit. Each local mask cell includes a masking circuit that masks the prefix mask data or CAM data provided to the comparison circuit, or masks the comparison result from the match line of a CAM cell. The mask override circuit effectively overrides the prefix mask data stored in the local mask cell. The mask override circuit performs the override function by negating the operation of the mask circuit such that no masking operation occurs when an exact match compare or invalidate function is performed by the ternary CAM device. For example, during an exact match operation, the CAM cells compare comparand data with unmasked CAM data and provide the compare results to CAM match lines.
    Type: Application
    Filed: May 9, 2002
    Publication date: February 6, 2003
    Applicant: Netlogic Microsystems, Inc.
    Inventors: Sandeep Khanna, Bindiganavale S. Nataraj, Varadarajan Srinivasan
  • Data storage
    Publication number: 20030028714
    Abstract: A data reader is arranged to read data comprising user data 30 and non-user data 32, 34 written across at least two channels of a data-holding medium 10, said data being arranged into a plurality of data items 26 each containing user data and non-user data, with said non-user data holding information relating to said user data, including write pass number information, and data items written across the said channels at the same time being identified as a set of data items, said data reader holding a current write pass number and having a read head 12 for reading a respective said channel of said data-holding medium 10 to generate a data signal comprising said data items, and processing circuitry 258, 280 arranged to receive and process said data signals of a set of data items, including processing said write pass number information of each of said data items in said set, and causing updating of said current write pass number held by said data reader on the basis of the write pass number information of said dat
    Type: Application
    Filed: July 31, 2001
    Publication date: February 6, 2003
    Inventors: Catharine Anne Maple, Jonathan Peter Buckingham
  • Data storage
    Publication number: 20030028715
    Abstract: A data reader is arranged to read data comprising user data 30 and non-user data 32, 34 written across at least two channels of a data-holding medium 10, said data being arranged into a plurality of data items 26 each containing user data and non-user data, with said non-user data holding information relating to said user data, said data reader having a read head 12 for reading a respective said channel of said data-holding medium 10 to generate a data signal 14 comprising said data items, and processing circuitry 250 arranged to receive and process said data signals to identify a set CCPset1 of said data items written at the same time onto different said channels. Identifying a set of data items written at the same time gives rise to the possibility of correcting header information for the data items in a set.
    Type: Application
    Filed: July 31, 2001
    Publication date: February 6, 2003
    Inventors: Catharine Anne Maple, Jonathan Peter Buckingham
  • Data transfer and storage
    Publication number: 20030028716
    Abstract: Apparatus for transferring data from a host system to a magnetic tape storage means or the like, the apparatus comprising means for receiving said data and dividing it into blocks, means for converting said blocks of data to a format suitable for storage on said storage means, each block of data including header identifying information, means for writing said blocks of data to said storage means, means for reading data written to said storage means and transferring said data from the reading means to error checking means, said error checking means being arranged to determine whether or not the number of errors in each block of data exceeds a predetermined number and to output the result together with the corresponding header identifying information for each block of data, a history storage means for storing information relating to at least some of the data blocks written to the storage means, said information including header identifying information corresponding to each block of data written to the storage m
    Type: Application
    Filed: July 31, 2001
    Publication date: February 6, 2003
    Inventor: Jorge Antonio Sved
  • Memory devices and methods for use therewith
    Publication number: 20030028717
    Abstract: The preferred embodiments described herein provide a memory device and methods for use therewith. In one preferred embodiment, a method is presented for using a file system to dynamically respond to variability in an indicated minimum number of memory cells of first and second write-once memory devices. In another preferred embodiment, a method for overwriting data in a memory device is described in which an error code is disregarded after a destructive pattern is written. In yet another preferred embodiment, a method is presented in which, after a block of memory has been allocated for a file to be stored in a memory device, available lines in that block are determined. Another preferred embodiment relates to reserving at least one memory cell in a memory device for file structures or file system structures. A memory device is also provided in which file system structures of at least two file systems are stored in the same memory partition.
    Type: Application
    Filed: September 23, 2002
    Publication date: February 6, 2003
    Inventors: Roger W. March, Christopher S. Moore, Daniel T. Brown
  • Data storage management system and method
    Publication number: 20030028718
    Abstract: The present invention provides a virtual automated cartridge system (ACS) and data storage device management method which incorporates a temporary data buffer arrangement between multiple user systems and conventional physical data storage devices. The temporary data buffer arrangement emulates a compatible physical data storage device when accessed by each of the user systems, but allows simultaneous allocation of different users to access to read and write data to the temporary data buffer. A control processor automatically transfers data stored in the temporary data buffer arrangement to one of the physical data storage devices when allocation to a user has ended.
    Type: Application
    Filed: September 26, 2002
    Publication date: February 6, 2003
    Applicant: Storage Technology Corporation
    Inventors: Stephen H. Blendermann, Alan Ray Sutton, Robert Raicer, L. Michael Anderson, Clayton E. Ruff, William G. Kefauver
  • Disc drives divided into multiple logical containers
    Publication number: 20030028719
    Abstract: Either the disc drive controller or an external software component can divide the storage space on the disc drive into a plurality of different logical components. The disc drive controller also stores parameters that indicate a property data stored in each one of the logical containers. This allows the external software component to access this drive management data, and it allows the block oriented disc drives, themselves, to greatly enhance the efficiency with which data is accessed on the disc drive. The present invention can also be implemented as a method of accessing information on a block oriented disc drive.
    Type: Application
    Filed: April 5, 2002
    Publication date: February 6, 2003
    Inventor: Satish L. Rege
  • Method for analyzing disk seek times in a disk array storage device
    Publication number: 20030028720
    Abstract: Load balancing of activities on physical disk storage devices is accomplished by monitoring reading and writing operations to blocks of contiguous storage locations on the physical disk storage devices. Statistics accumulated over an interval are then used to obtain access activity values for each block and each physical disk drive. A method is disclosed for efficiently generating disk access time based upon these statistics.
    Type: Application
    Filed: June 10, 2002
    Publication date: February 6, 2003
    Inventors: Tao Kai Lam, Eitan Bachmat, Ruben Michel, Victoria Dubrovsky
  • Method and apparatus for creating a media identifier and indexing a media products database
    Publication number: 20030028721
    Abstract: The present invention teaches a method for creating a media identifier by reading media comprising tracks and a table of contents, the table of contents comprising a beginning track offset for each of the tracks. A bitmap is calculated comprising a series of bits, each bit representing the results of each pair-wise comparison of lengths of a pair of tracks recorded on the media. The media can be an audio CD having pairs of adjacent tracks. A one-bit in the bitmap can indicate that a length of a current track is longer than a length of an associated track and a zero-bit in the bitmap indicates that the length of the current track is shorter than or equal to the length of the associated track.
    Type: Application
    Filed: July 30, 2002
    Publication date: February 6, 2003
    Applicant: DotClick Corporation
    Inventor: Mark L. Woodward
  • Maximizing sequential output in a disk array storage device
    Publication number: 20030028722
    Abstract: Load balancing of activities on physical disk storage devices is accomplished by monitoring reading and writing operations to blocks of contiguous storage locations on the physical disk storage devices. A list of exchangeable pairs of blocks is developed based on size and function. Statistics accumulated over an interval are then used to obtain access activity values for each block and each physical disk drive. These activities are represented as disk seek, latency and data transfer times. A statistical analysis leads to a selection of one block pair. After testing to determine any adverse effect of making that change, the exchange is made to more evenly distribute the loading on individual physical disk storage devices.
    Type: Application
    Filed: August 26, 2002
    Publication date: February 6, 2003
    Inventors: Eitan Bachmat, Yuval Ofek, Tao Kai Lam, Victoria Dubrovsky, Ruben Michel
  • Efficient data backup using a single side file
    Publication number: 20030028723
    Abstract: A method for data backup includes creating a sidefile in a cache memory of a data storage system. Entries are added to the sidefile specifying copy operations to be respectively performed by copy services in the system, including at least first and second copy services of different, first and second types. The copy operations specified by the operations are then executed using the first and second copy services.
    Type: Application
    Filed: August 1, 2001
    Publication date: February 6, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Danit Segev, Yoram Novick, Yigal Eisinger, Gabriel Walder, Olympia Gluck
  • Method and apparatus for efficiently destaging data from a cache to two or more non-contiguous storage locations
    Publication number: 20030028724
    Abstract: In one embodiment of the invention, during a single I/O operation, data is destaged from a cache to at least two non-contiguous storage locations of a data storage device without overwriting at least one storage location disposed between the at least two non-contiguous storage locations. In another embodiment, a communication link is established between a controller that controls data flow between a cache and a data storage device, and this communication link is used to destage data from the cache to at least two non-contiguous storage locations of the data storage device without overwriting at least one storage location between the at least two non-contiguous storage locations and without breaking the communication link.
    Type: Application
    Filed: September 17, 2002
    Publication date: February 6, 2003
    Inventor: Ishay Kedem
  • Redundant array of independent storage devices
    Publication number: 20030028725
    Abstract: A redundant array of independent storage devices is disclosed herein. The redundant storage device includes one or more an atomic resolution storage devices and a control system. The atomic resolution storage device is configured to communicate with the control system as a redundant array of independent storage devices. Each atomic resolution storage device is a non-volatile memory component including a plurality of electron emitters, a medium having medium partitions, and a plurality of micromovers wherein each micromover is independently operable to move a medium partition relative to one or more electron emitters for redundant reading and writing of data at the media.
    Type: Application
    Filed: August 3, 2001
    Publication date: February 6, 2003
    Inventors: Steven Louis Naberhuis, Kenneth J. Eldredge
  • Synchronized mirrored data in a data storage device
    Publication number: 20030028726
    Abstract: A data storage device mirrors data on a data storage medium. The multiple instances of data are synchronized in order to optimize performance of the reading and writing, and the integrity of the data. Preferably, a data storage device is allowed to defer writing multiple copies of data until a more advantageous time.
    Type: Application
    Filed: June 28, 2002
    Publication date: February 6, 2003
    Inventors: Mark A. Gaertner, Luke W. Friendshuh, Stephen R. Cornaby
  • Raid apparatus storing a plurality of same logical volumes on different disk units
    Publication number: 20030028727
    Abstract: Disclosed is a RAID apparatus having a plurality of same logical volumes allocated on a real volume. The real volume is so designed that a plurality of same logical volumes are respectively allocated on different physical disk units and a combination of a plurality of logical volumes allocated on each physical disk unit differs from one physical disk unit to another. This structure prevents uneven loading on the real volume from occurring due to uneven loads on the logical volumes.
    Type: Application
    Filed: September 30, 2002
    Publication date: February 6, 2003
    Inventor: Toshiaki Kochiya