Abstract: The interleaved clock generator generates N interleaved clock signals in response to an input clock signal. The interleaved clock generator comprises an interleaved clock generator of a first type for receiving the input clock signal and for generating M interleaved intermediate clock signals in response to the input clock signal. The interleaved clock generator of the first type includes either a multi-stage serial-delay circuit or a ring counter circuit. The interleaved clock generator additionally comprises M interleaved clock generators of a second type, each of which is each for receiving a respective one of the intermediate clock signals from the clock generator of the first type and for generating N/M of the N interleaved clock signals in response to the respective one of the intermediate clock signals.

Abstract: A circuit configuration for potential-free signal transmission has a transformer with a primary winding and a secondary winding. A drive circuit is connected upstream of the primary winding and a selection circuit is connected up to the secondary winding and is driven by pulses. A latching circuit is connected downstream of the selection circuit and prevents a forwarding of second pulses under specific conditions. Finally, a storage element generates an output signal.

Abstract: It is intended to provide a DC offset cancel circuit capable of canceling DC offset regardless TDMA system and non-TDMA system, with simple circuit structure, and applicable to dual-mode-structured receivers. Out of output signals having at least two or more phases (OUT1, OUT2, . . . ), at least any one of the signals (OUT1, . . . ) is inputted to a phase converter unit. A signal outputted from the phase converter unit and any one of other signals not inputted to the phase converter unit (OUT 2, . . . ) are inputted to a comparator unit. A comparison result obtained at the comparator unit is fedback to a signal processing section and DC offset components are cancelled. Through the phase converter unit, phase of a signal is converted so as to make phases of signals to be compared same. Thereby, signal components of different phases are cancelled out each other and DC offset components as DC components can be compared.

Abstract: A semiconductor device malfunction preventive circuit S is disposed in a macrocell logic cell 1 of a semiconductor device 50 used in an electronic device 100. A signal in an output pin 3 or in a signal line 6 is returned to the semiconductor device malfunction preventive circuit S as a pin feedback and monitored. When a predetermined state is detected, an abnormality detecting signal SIGAB for resetting the operation of the electronic device 100 is outputted.

Abstract: A circuit for controlling inrush current to a load is provided. The circuit includes a variable impedance device having a control input. The variable impedance device is coupled between a power supply interface and a load interface. The circuit also includes a control circuit coupled to the control input of the variable impedance device and also coupled to the load interface. The control circuit is adapted to provide a signal at the control input of the variable impedance device which results in a linear increase in applied voltage to the load when the circuit is coupled to an input power source. A resistor is coupled between the first and second terminals of the power supply interface to provide a current discharge path for the control circuit when the circuit is disconnected from the power supply.

Abstract: The present invention provides an analog frequency divider structure that receives an input signal at a selected frequency and generates an output signal at a fraction, e.g. one-half, of the input frequency. In one embodiment, the analog frequency divider structure is implemented as a MEMS device having a vibratory beam extending along a longitudinal axis between two fixed ends and a piezoelectric transducer coupled to the beam. The MEMS structure further includes a conductive layer disposed on at least a portion of the vibratory beam, which is capacitively coupled to a conductive electrode. A longitudinal excitation of the piezoelectric transducer can effect application of a periodic longitudinal deformation force to the vibratory beam. This deformation force causes the beam to vibrate in a transverse direction at its natural transverse vibrational frequency, which is selected to be a fraction of the input frequency.

Abstract: A bootstrap circuit in DC/DC static converters is provided that includes a power transistor having a first non drivable terminal coupled with a first input voltage and driving means connected with a drivable terminal of the power transistor and adapted for determining the on time and the off time of the power transistor for each prefixed switching time period. The bootstrap circuit includes a capacitor coupled respectively with the second non drivable terminal of the power transistor and with a second input voltage and an input of the driving means so that the voltage between its terminals is substantially equal to the voltage between the second non drivable terminal and the drivable terminal during the off time of the power transistor. The bootstrap circuit includes an overcharge circuit arranged between the second non drivable terminal and ground; the overcharge circuit is able to allow overcharging the capacitor during the off time of the power transistor and for a time period lower than the off time.

Abstract: In a negative voltage output charge pump circuit, first a capacitor C1 is charged with a positive voltage Vin relative to a reference voltage, and then the high-potential terminal A of the capacitor C1 is made to conduct to the reference voltage and simultaneously the low-potential terminal B of the capacitor C1 is made to conduct to an output terminal OUT so that the voltage with which the capacitor C1 is charged is output as a negative voltage −Vin. Here, at least one of the switching device DP1 that is kept on while the capacitor C1 is being charged so as to apply the reference voltage to the point B and the switching device DP2 that is kept on while the negative voltage is being output so as to make the point B conduct to the output terminal OUT is a depletion-type transistor. This configuration makes it possible to realize a negative voltage output charge pump circuit that is free from malfunctioning caused by a parasitic device, that operates with low loss, and that can be produced at low costs.

Abstract: A semiconductor device is equipped with a step-up circuit having a series of multiple charge pump units. Each of the units has a well separation type MOS transistor. The separation well of the transistor is coupled to a high potential so as to form double reverse biases between the N-type well and a P-type substrate and between the N-type well and a P-type well. This permits the threshold Vth of the MOS transistor to be held at low level. The units are provided with a clock whose current supply capability is limited until a predetermined condition (that a predetermined period of time has elapsed after the onset of the step-up circuit by a startup signal or that the output voltage has reached a predetermined level). This limitation of the clock facilitates suppression of power consumption by the step-up circuit during a startup, thereby reducing changes in amplitude of a supply voltage.

Abstract: A receiving unit may implement voltage compensation using a parameters table, an analog calibration component, and/or a digital calibration component. In certain implementation(s), an integrated circuit may include a voltage driver that modifies a supplied compensated voltage based on a feedback signal. The feedback signal may be produced responsive to a distributed voltage version of the compensated voltage, to a received data signal, and to a comparison involving an expected data value. In other implementation(s), a parameters table may be initialized by storing calibration values in entries in association with respective multiple identifications of multiple external points.

Abstract: A constant voltage generating circuit has a reference voltage generating circuit of which the output voltage is controlled to be a constant voltage when the output voltage has risen, with an increase in the input supply voltage, to reach a predetermined voltage and that outputs the constant voltage as a reference voltage, a first transistor that turns on when the output voltage reaches the predetermined voltage to control the constant voltage output from the reference voltage generating circuit, a second transistor that is so connected that, when the first transistor turns on, a current proportional to the current flowing through the first transistor flows through the second transistor, and a signal output circuit that detects the current flowing through the second transistor to output a detection signal indicating that the constant voltage is being output.

Abstract: A sensing circuit. The circuit includes an integrator to sense charge release from a passive electronic device and a comparator to interpret the charge release as one of at least two data states. The circuit also includes a compensation module to generate a compensation signal as needed and a direct-timing module to time a period of integrator sensing based upon a predefined time period.

Abstract: A controller that is linearly responsive to an input voltage provides continuously adjustable control of the width of a periodically repeating digital pulse, thereby achieving a linear voltage to duty-cycle ratio transfer function. The circuit of the present invention includes a master clock input, a ratio control voltage input, a controlled duty cycle clock output, a high gain amplifier configured as an integrator having differential inputs, each equipped with a low pass filter, a controlled current source, a resettable timing capacitor, a threshold detector and a reference pulse generator.

Abstract: An adaptive speech filter (10) for conditioning speech signals to increase signal to noise ratio in a relatively noisy environment. The adaptive speech filter (10) has a preamp circuit (12), a high pass adaptive filter circuit (14), an output buffer circuit (16), a peak detector amplifier/filter circuit (18), a peak detector circuit (20) and a voltage regulator circuit (22), embodied in an application specific integrated circuit (24). The adaptive speech filter (10) is intended for input to telephones, radios, and the like.

Abstract: A circuit for detecting and correcting a central level according to the present invention is constituted such that there occurs a case that the length of a code of “1” or “0” in an FSK signal extremely long, and even if this extremely long code superimposed with a frequency fluctuation of a transmitter/receiver is received, a central level can always be detected accurately. This circuit is provided with sample value holding circuits exclusive to “1” and “0” of an input demodulation data signal respectively. After a difference voltage between both sample values is once converted to a digital code in an ADA converter, and the converted code is re-converted to an analog value, thereby holding the value digitally.

Abstract: The filtered output of multiple possible voltage levels are AC-coupled to a load. An incoming data stream provides input to a pulsewidth modulator which issues control voltages to three or more switching devices, respectively. A first switching device provides a controlled connection to the incoming power supply (V+), a second switching device provides a controlled connection to a lower reference voltage (VR), and a third switching device provides a controlled connection to common, or ground. The common connection of switching devices provides an input to an inductor, which, in conjunction with a capacitor removes out-of-band components before presentation of the output to one side of load. Another capacitor provides a pseudo-ground for the second side of load in a manner consistent with the art of AC-coupled power amplifiers.

Abstract: A feed forward RF power amplifier which provides both high efficiency and minimal distortion in broad bandwidth RF applications. The feed forward power amplifier includes a main amplifier biased to provide high efficiency and an error amplifier biased to provide highly linear operation through substantially the entire operating range. Signal peaks which introduce distortion components at the main amplifier output are cancelled by the linear operation of the error amplifier.

Abstract: Disclosed is a four stage transimpedance amplifier having a grounded base transistor preamplifier input stage, a common emitter voltage amplifier stage, and an amplifier stage having a common collector transistor, an output buffer stage, and a bias circuit coupled to the preamplifier stage to prevent the grounded base transistor from going into saturation.

Abstract: A switch-mode power amplifier circuit using high power, low distortion waveforms is connected to an electromagnetic load to provide a high degree of control over the load. The circuit comprising a plurality of half-bridge networks having outputs combined at a summation point. The half-bridge networks are switched to provide power outputs sequenced to generate an interlaced output at the summation point which is operably connected to the load so that for a given switching frequency of the networks the operational frequency of the circuit is increased. The sequencing of the half-bridge outputs to generate an interlaced output facilitates the reduction of the switching frequency of individual switching components within the half-bridges while at least maintaining the overall operational frequency of the circuit. For N half-bridges operating at fkHz, the overall operational frequency of the circuit is NfkHz.

Abstract: A differential receiver-amplifier having reduced input distortion at differential input (positive and negative) terminals to the differential receiver-amplifier. The output from the differential receiver-amplifier is generated from a differential signal detector receiving each differential input from one of a pair of differential amplifiers.

Abstract: An automatic gain adjustment circuit for automatically adjusting the gain and DC output voltage of an amplifier against power supply fluctuations, temperature fluctuations and process variations and the amplifier using the circuit are provided. The gain and the DC output voltage are adjusted by providing a bias circuit for adjusting the operating current or gain of an amplifying element, connecting a load to the output electrode of the amplifying element to form an output terminal, connecting a variable current source for adjusting the operating voltage or DC output voltage of the amplifying element to the output electrode, connecting a gain detection circuit and a DC output voltage detection circuit to the output terminal, and feed backing the respective outputs of the detection circuits to the variable current source. A reference AC signal is inputted for gain adjustment.

Abstract: An amplifier with a electrically controllable gain and enhanced protection against an overload condition is disclosed. The amplifier contains a buffer amplifier configured to convert an input voltage signal to a current signal and an output amplifier that converts a current signal to an output voltage signal. The gain of the amplifier can be controlled by an internal resistor that can be electrically configured to different resistance levels. The amplifier also includes a clamping network used to clamp the output amplifier to prevent an overload condition. This network may take the form of a diode network. Such an amplifier may take the form of a differential amplifier.

Abstract: A phase comparator is disclosed that can provide a phase comparison result at high speed that essentially does not vary according a power source voltage, ambient temperature and/or manufacturing process conditions, or the like. A phase comparator (10) may include one-shot pulse generating units (14 and 24) that output one-shot pulses according to input data signal DAT and clock signal CLK, respectively. An R-S flip-flop (16) can receive one-shot pulses from one-shot pulse generating units (14 and 24) at set and reset inputs, respectively. An output flip-flop (17) can select between an output signal of R-S flip-flop (16) and a delay signal “a8” generated from input data signal DAT, and latch such a result according to a delayed clocks signal CLK.

Abstract: A method for estimating jitter in a phase locked loop is provided. The estimation is determined from a simulation that uses a representative power supply waveform having noise as an input. Further, a computer system for estimating jitter in a phase locked loop is provided. Further, a computer-readable medium having recorded thereon instructions adapted to estimate jitter in a phase locked loop is provided.

Abstract: Improvements in and relating to electronic pulse generation or oscillation circuitry based on a signal path exhibiting endless electromagnetic continuity and affording signal phase inversion in setting pulse duration or half-cycles of oscillation within time of signal traverse of said signal path, and having active switching means associated with said signal path to set rise and fall times of each said pulse or said half-cycle of oscillation, including for frequency adjustment by selective inductance and power saving without stopping pulse generation or oscillation.

Abstract: A resonator for use in a radio frequency filter including a substantially planar resonant portion that is substantially elliptical in plan. The resonant portion is mounted on a dielectric substrate. The resonator is configured to operate in at least a mode in which resonance occurs with a radial current and with substantially no current along the edge of the resonant portion. A filter comprising a plurality of the resonators is also disclosed.

Abstract: A waveguide device having a plurality of waveguide members is provided. The waveguide device is of an integral cast construction and is configured so that the cross-sectional dimensions of each waveguide member decrease along an axis thereof from one end to the other end. Methods of forming the waveguide device are also provided.

Abstract: A duplexing communication signal filter has a substantially U-shaped core of dielectric material including a transmit arm, a receive arm and a base portion joining the transmit arm to the receive arm. Both the transmit arm and the receive arm each define a series of through-hole resonators. Present on the core of dielectric material is a surface-layer pattern of metallized and unmetallized areas. The pattern includes a wide area of metallization for providing off-band signal absorption, a first unmetallized area surrounding a plurality of the through-hole openings of the transmit arm, a second contiguous unmetallized area surrounding a plurality of the through-hole openings of the receiver arm, a transmitter pad metallized area on the transmit arm, a receiver pad metallized area on the receive arm, and an antenna pad metallized area.

Abstract: A vector space comprising all of the filter coefficients (heq, opt) for different interfering signals (w(n)) is provided, based on an acquired impulse response (hchan). A linear vector sub-space (popt) comprising all of the optimal filter coefficients (heq, opt) for different interfering signals (w(n)) is established from said vector space using a vector space optimization method. The filter coefficients (heq, opt) are established from the vector sub-space according to the current interfering signal (w(n)) being detected, during ongoing data transmission and at the maximum transmission speed.

Abstract: A modular electronic signal filter assembly is provided, including a plurality of modular filter housing members joined to one another in a longitudinal direction via a plurality of coupling members. The outer peripheral surfaces of the filter housing members are provided with mechanical engagement members that engage and mate with a corresponding mechanical engagement member provided on the inner peripheral surface of the coupling members to secure the filter housing members to one another without solder. The coupling members also include an electrical connection member for electrically connecting the filter housing members in a solderless manner. The modularity of the filter housing assembly of the present invention provides heretofore unrealizable flexibility and applicability of a single filter housing unit for any filter application. Moreover, the present invention enables the assembly of modular filter housing and coupling member units without the need for solder.

Abstract: A multilayer ceramic device improves device functionality, reduces overall device size and profile, makes manufacturing easier, and improves reliability. A first ceramic layer has a first multilayer circuit pattern electrically connected through via holes. Also, a second ceramic layer has a second multilayer circuit pattern electrically connected through via holes. A thermosetting resin sheet is disposed between the first and second ceramic layers.

Abstract: Thin type TEM dual-mode rectangular-planar dielectric waveguide bandpass filter is disclosed.

Abstract: The dielectric loaded cavity for high frequency filters consists of a metal container housing a dielectric block held in position by supporting plates, that also sustains coupling and tuning elements. This invention provides broadband filters, small in size and with low losses. Its high symmetry structure considerably reduces the energising of spurious modes and furthermore facilitates the design using automatic calculation procedures, on the basis of accurate electromagnetic models.

Abstract: A dielectric resonator includes a high-frequency dielectric ceramic containing a first ceramic having an adhesive strength of 70 newtons or more per 2 millimeter square to metallic coatings and a second ceramic having an adhesive strength of less than 70 newtons per 2 millimeter square to metallic coatings. The dielectric ceramic has composition in which the condition 10≦{A/(A+B)}×100 <100 is satisfied, where A represents the volume of the first ceramic and B represents the volume of the second ceramic.

Abstract: A dielectric resonator device includes a dielectric plate. An electrode is provided on each of both principal surfaces of the dielectric plate and a plurality of pairs of mutually-opposing electrode openings are formed in the electrodes. Accordingly, the dielectric resonator device functions as a three-stage resonator. Strip lines serving as input/output probes are provided on the upper surface of an input/output substrate. Also, a ground electrode having electrode openings are formed thereon. By providing the dielectric resonator device and an upper substrate on the upper surface of the input/output substrate, a dielectric filter is formed.

Abstract: The idea of the invention is to fabricate a multilayer coaxial transmission line into a printed circuit. The outermost conductor is fabricated by conductive conduit strips in different layers, using conductive via posts in isolation layers connecting the strips. The innermost conductor can be a single conductive strip or multiple strips in different layers connected together through conductive via posts.

Abstract: The present invention provides a high-frequency module device having a distributed constant circuit formed therein, the device comprising: a base board (2) having a high-frequency element layer forming surface (3) formed by performing flattening processing on an uppermost layer of a multilayer printed wiring part in which a printed wiring layer having a ground part and a dielectric insulating layer made of a dielectric insulating material are formed in a multilayer form on one major surface of a core board (6); and a high-frequency element layer part (5) having a passive element and a circuit element for receiving power or a signal supplied from the base board (2) via a dielectric insulating part made of a dielectric insulating material, on the high-frequency element layer forming surface (3) of the base board (2). The base board (2) has a distributed constant circuit (4) formed by pattern wiring.

Abstract: A protective device includes a test button for enabling a test signal for testing an operating condition of at least one of the device components, such as the sensor, detector, switch, solenoid and trip mechanism. The test button also enables a current through a resistor body which is affixed to a stationary part of the device. The resistor body keeps a lockout spring under tension. Failure of the test signal to operate the trip mechanism within a predetermined time interval causes the resistor body conducting said current to reach a predetermined temperature, wherein the resistor body ceases to hold a lockout spring, thereby permitting the lockout spring to move to a position which causes the set of interrupting contacts to remain permanently in a disconnected position.

Abstract: A method of forming a hermetically sealed MEMS package includes a step of providing a supporting GaAs substrate with at least one contact for the MEMS device on the surface of the supporting substrate and forming a cantilever on the surface of the supporting substrate positioned to come into electrical engagement with the contact in one orientation. A metal seal ring is fixed to the surface of the supporting substrate circumferentially around the contact and the cantilever. A cavity is etched in a silicon chip to form a cap member. A metal seal ring is fixed to the cap member around the cavity. The package is hermetically sealed by reflowing a solder alloy, positioned between the two seal rings, in an inert environment without the use of flux.

Abstract: A method of fabricating electro-magnetic relays and arrays of relays using existing and adapted PCB fabrication techniques, in which the activation coils are incorporated into the layers of a multi-layer PCB and the magnetic circuit of the relay is formed partly on the surface of the PCB using, eg, electroplating techniques, and partly in one or more through-holes using plated through holes, the plated through hole plating being extended to form a support for the movable relay contact which is formed on a removable release layer.

Abstract: An electrical coil (10) has a coil body (11), at least one face-end flange (14) of the coil body (11), at least one mount (16) for coil wire (18) on the face-end flange (14), and one tonguelike insulation displacement contact (23) for contacting the coil wire (18) in the mount (16). Two intersecting slots (21, 22) of different depth are embodied on the mount (16), and the coil wire (18) rests on the bottom of the slot (21) of lesser depth, while the tonguelike insulation displacement contact (23) is received in the slot (22) of greater depth. Since the slot (21) of lesser depth, in the region of its bottom, has a width which is less than the diameter of the coil wire (18), the coil wire is firmly clamped in the mount (16).

Abstract: A transformer (90) includes taps (96a, 96b, 96c) by which electrical contact can be made to a winding (90) of the transformer (90) at locations along its length between its end terminals. A first section (90a) of the winding (90) has a first resistance R1 (R). A second section (90a+90b) of the winding (90) has a second resistance R2 (R+3R). One or both of the first (90a) and second (90a+90b) sections can be a multilayer section. The sections are configured so that one of the ratio R1:R2 (1:4) and the ratio R2:R1 (4:1) is substantially identical to the ratio 1:n (1:4) of the windings (90a, 90a+90b). A first switch (94) permits contact to be made selectively to a selected one of the taps (96a, 96b, 96c). An amplifier (98) has an inverting (−) input terminal, a non-inverting (+) input terminal and an output terminal. One (+) of the + and − input terminals is coupled to one of the terminals (end terminal of winding 90a) of the winding (90).

Abstract: A magnetic core has a toroidal configuration, formed by winding an iron-based amorphous metal ribbon. Thereafter the core is heat-treated to achieve a linear B-H characteristic. Advantageously, the linear B-H characteristic does not change with the level of magnetic fields applied and the frequency utilized. With such properties, the core is especially suited for use in a current transformer.

Abstract: A high frequency transformer may include an integrated rectifier cell with flat windings and/or slotted copper segments stacked on a core branch to provide alternating primary and secondary windings. This reduces inductance leakage and thus increases the operating frequency of the transformer. Rectifying diodes of the rectifier cell may be arranged according to various configurations between the copper segments, and the collection plates may form one of the rectifier outputs. The other output may be provided by connecting all the midpoints of the windings with conductive spacers pressed together along a first axis. The invention is particularly advantageous in static converters, and, more particularly, in spot welding machines, for example.

Abstract: A surface mountable inductor is provided which is a rectangular cross section coil mounted to a dielectric block. The inductor avoids mechanical vibration and provides a flat top surface to facilitate use, for example, in circuit boards. Attachment of the device is facilitated by bi-sected connecting terminals.

Abstract: A lamination ceramic chip inductor includes at least one pair of insulation layers; and at least one conductive pattern which is interposed between the at least one pair of insulation layers and forming a conductive coil. At least one conductive pattern includes a conductive pattern formed as a result of electroforming.

Abstract: A filter circuit is used to select frequency bands of digital and analog signals over communications channels in a DSL communications system. The filter circuit includes an inductor having a core that consists essentially of an Fe-base amorphous metal alloy. Advantageously, the filter circuit provides as good or better performance than a filter circuit using a Co-base core; but is much less expensive. As such, it provides a low cost, high efficiency solution to communications applications, such as DSL communications systems, and the like.

Abstract: A thermistor chip has an NTC thermistor element with outer electrodes formed on its end surfaces. Diffused layers, having a higher specific resistance than the material of the thermistor element, are formed proximally to all externally exposed surfaces of the thermistor element by subjecting an inorganic material and the thermistor element together to a firing process at 100-1300° C. The diffused layers are free of any insulating layer thereupon and substantially entirely exposed externally, except where the outer electrodes are formed.

Abstract: A wireless system having at least one device that is adapted to wirelessly receive at least one signal that alters at least one condition of the device and that is adapted to wirelessly transmit at least one signal that is indicative of at least one condition of the device. The wireless system also having a tool in wireless communication with the device that is adapted to receive the indicative signal from the device and that is adapted to transmit the alterative signal to the device.

Abstract: A method for monitoring the functioning of a control unit for the activation of output stages, for example, in a motor vehicle, is provided. The control unit includes a main computing element having at least one microprocessor, and at least one auxiliary computing element having at least one microprocessor. The main computing element and the at least one auxiliary computing element may access a common memory element. The present invention enables monitoring of the control unit that is as simple as possible but is nonetheless secure and reliable, by providing that during normal operation of the control unit, the content of a specifiable memory location of the memory element be queried by at least one of the auxiliary computing elements at presettable times, given a functioning main computing element, the content having previously been written with a presettable value by the same.