Abstract: In a method of manufacturing a semiconductor integrated circuit device in which a lower electrode of a capacitor is composed of a polycrystalline silicon film having a surface area increased by surface roughening, an impurity is introduced into the polycrystalline silicon film by vapor phase diffusion in order to reduce the resistance of the lower electrode.

Abstract: Fiducial mark bodies are provided for use in CPB microlithography apparatus and methods. Such bodies are especially useful for attachment to the wafer stage of such apparatus, for measuring a distance between a reference position of the CPB-optical system of the apparatus and a reference position of an optical-based alignment sensor of the apparatus. The mark bodies provide improved accuracy of these and other positional measurements. A typical mark body is made of a substrate plate (e.g., quartz or quartz-ceramic) having a low coefficient of thermal expansion. Mark elements are defined on the substrate plate by a layer of heavy metal (e.g. are Ta, W, or Pt). The mark body includes a surficial or interior layer of an electrically conductive light metal that prevents electrostatic charging of the mark body and can be connected to ground.

Abstract: A semiconductor device is disclosed, which includes a semiconductor substrate, drain and source regions of a MOS transistor, a gate electrode formed on a surface of a channel region of the MOS transistor trench type element isolation regions in each of which an insulating film is formed on a surface of a trench formed in the surface of the semiconductor substrate, the element isolation regions sandwiching the channel region from opposite sides thereof in a channel width direction, and a conductive material layer for a back gate electrode, which is embedded in a trench of at least one of the element isolation regions, configured to be supplied with a predetermined voltage to make an depletion layer in a region of the semiconductor substrate under the channel region of the MOS transistor or to voltage-control the semiconductor substrate region.

Abstract: A technique for forming a film of material (12) from a donor substrate (10). The technique has a step of introducing energetic particles (22) through a surface of a donor substrate (10) to a selected depth (20) underneath the surface, where the particles have a relatively high concentration to define a donor substrate material (12) above the selected depth. An energy source is directed to a selected region of the donor substrate to initiate a controlled cleaving action of the substrate (10) at the selected depth (20), whereupon the cleaving action provides an expanding cleave front to free the donor material from a remaining portion of the donor substrate.

Abstract: A process for producing an epitaxial layer of gallium nitride (GaN) by hydride vapor-phase epitaxy (HVPE), as well as to the epitaxial layers which can be obtained by this process are provided. Such a process makes it possible to avoid parasitic GaN deposition on the walls of the reactor.

Abstract: To perform a film formation process, source RF power is applied to a coil to generate a plasma in a processing chamber. Subsequently, O2 gas and SiH4 gas are introduced into the processing chamber. Bias RF power is then applied to a support member to cause permeation of a wafer W by the plasma. At the end of the film formation, the application of the bias RF power to the support member is stopped while the O2 gas and the SiH4 gas are kept introduced into the processing chamber. After that, the introduction of the SiH4 gas is stopped, and the introduction of the O2 gas is also stopped. Then, the application of the source RF power to the coil is stopped. This can reduce plasma damage to the substrate to be processed.

Abstract: A method of forming electrical contacts includes the step of implanting ions into a contact hole at an angle to create an enlarged plug enhancement region at the bottom of a contact hole. Thus, even if the contact hole is misaligned, over-sized, or over-etched, the enlarged plug enhancement region contains subsequently formed barrier layers and other conductive materials to reduce current leakage into the underlying substrate or into adjacent circuit elements.

Abstract: We have found that under certain prescribed conditions a co-implantation process can be effective in increasing the electrical activation of implanted dopant ions. In accordance with one aspect of our invention, a method of making a semiconductor device includes the steps of providing a single crystal semiconductor body, implanting vacancy-generating, ions into a preselected region of the body, implanting dopant ions into the preselected region, the dopant implant forming interstitial defects in the body, and annealing the body to electrically activate the dopant ions. Importantly, in our method the vacancy-generating implant introduces vacancy defects into the preselected region that are effective to annihilate the interstitial defects. In addition, process steps that amorphize the surface of the implanted region are avoided, and the dose of the vacancy-generating implant is made to be greater than that of the dopant implant.

Abstract: A method of manufacturing a semiconductor device, comprising the steps of: (a) providing a semiconductor substrate having a surface; (b) forming a gate oxide layer on at least a portion of the surface and including an interface therewith, the gate oxide layer comprising a high-k dielectric oxide including a plurality of interface traps at the interface; (c) forming a gate electrode layer on at least a portion of the gate oxide layer; and (d) laser thermal annealing the high-k gate oxide layer to de-activate the interface traps without incurring formation of a low-k dielectric oxide layer at the interface.

Abstract: The present invention provides a system and method for creating self-doping contacts to silicon devices in which the contact metal is coated with a layer of dopant and subjected to high temperature, thereby alloying the silver with the silicon and simultaneously doping the silicon substrate and forming a low-resistance ohmic contact to it. A self-doping negative contact may be formed from unalloyed silver which may be applied to the silicon substrate by either sputtering, screen printing a paste or evaporation. The silver is coated with a layer of dopant. Once applied, the silver, substrate and dopant are heated to a temperature above the Ag—Si eutectic temperature (but below the melting point of silicon). The silver liquefies more than a eutectic proportion of the silicon substrate. The temperature is then decreased towards the eutectic temperature.

Abstract: A method of fabricating a sub-micron MOS transistor includes preparing a substrate, including isolating an active region therein; depositing a gate oxide layer; depositing a first selective etchable layer over the gate oxide layer; depositing a second selective etchable layer over the first selective etchable layer; etching the structure to undercut the first selective etchable layer; implanting ions in the active region to form a source region and a drain region; depositing and planarizing the oxide; removing the remaining first selective etchable layer and the second selective etchable layer; depositing a gate electrode; and depositing oxide and metallizing the structure. A sub-micron MOS transistor includes a substrate; and an active region, including a gate region having a length of less than one micron; a source region including a LDD source region; and a drain region including a LDD drain region.

Abstract: Stereolithographically fabricated conductive elements and semiconductor device components and assemblies including these conductive elements. The conductive elements may include multiple superimposed, contiguous, mutually adhered layers of a conductive material, such as a thermoplastic conductive elastomer or a metal. In semiconductor device assemblies, the stereolithographically fabricated conductive elements may electrically connect semiconductor device components to one another. The conductive elements may alternatively comprise conductive traces or vias of circuit boards or interposers.

Abstract: A component for fabricating microelectronic assemblies has numerous curved leads on a surface. Each lead has a first anchor end fixed to the body of the component, a second tip end which can be bonded to a contact on a mating component and lifted away from the component body, and an elongated main portion which is bent away from the component body in the lifting action. The first anchor end of each lead is nested within the curved portion of another lead, so as to provide an extraordinarily compact arrangement suitable for use with components having closely spaced contacts as, for example, a semiconductor chip or wafer having a contact pitch less than 500 microns. The leads may be disposed in pairs, with the first anchor end of each lead encompassed by the main portion of the other lead in the same pair.

Abstract: A microelectronic substrate having a plurality of alternating substantially planar layers of dielectric material and conductive material, and further having a first surface and a second surface, wherein the dielectric material and the conductive material layers extend substantially perpendicularly between the first and second surfaces.

Abstract: A method of forming a carbon-doped silicon oxide layer is disclosed. The carbon-doped silicon oxide layer is formed by applying an electric field to a gas mixture comprising an organosilane compound and an oxidizing gas. The carbon-doped silicon oxide layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the carbon-doped silicon oxide layer is used as an intermetal dielectric layer. In another integrated circuit fabrication process, the carbon-doped silicon oxide layer is incorporated into a damascene structure.

Abstract: A contact structure incorporating an amorphous titanium nitride barrier layer formed via low-pressure chemical vapor deposition (LPCVD) utilizing tetrakis-dialkylamido-titanium, Ti(NMe2)4, as the precursor. The contact structure is fabricated by etching a contact opening through an dielectric layer down to a diffusion region to which electrical contact is to be made. Titanium metal is deposited over the surface of the wafer so that the exposed surface of the diffusion region is completely covered by a layer of the metal. At least a portion of the titanium metal layer is eventually converted to titanium silicide, thus providing an excellent conductive interface at the surface of the diffusion region. A titanium nitride barrier layer is then deposited using the LPCVD process, coating the walls and floor of the contact opening. Chemical vapor deposition of polycrystalline silicon or of a metal follows.

Abstract: A method for chemical vapor deposition comprises providing a thin layer of silicon on the surface of a dielectric-covered substrate prior to depositing a tantalum-based barrier layer from a mixture of a vapor-phase reactant comprising a tantalum halide and a reducing gas. The thin layer of silicon serves to significantly reduce the accumulation of halogen atoms at the interface between the tantalum-based layer and dielectric. The thin layer of silicon may be substantially removed from the surface of the dielectric during the chemical vapor deposition. The method advantageously promotes the adhesion of the tantalum-based layer to the dielectric by reducing the halogen content at the tantalum/dielectric interface.

Abstract: An interlayer insulating film and a first via connected to a diffusion layer in a MOS transistor are formed on the diffusion layer. Then, a low dielectric constant film for a first layer copper interconnection, and the first layer copper interconnection connected to the first via are formed. Then, an etching stopper film, an interlayer insulating film, and a low dielectric constant film for a second layer copper interconnection are formed in this order. Then, a via hole is formed in the etching stopper film and the interlayer insulating film, and a groove is formed in the low dielectric constant film for the second layer copper interconnection. A barrier metal layer is then formed. Thereafter, Ar ions are implanted. At the time, the implantation energy is 50 keV, and the dose is 1×1017 cm−2. A second via and the second layer copper interconnection are formed, and annealing is performed at a temperature of 400° C.

Abstract: A low temperature film deposition process fills fine gaps while avoiding removal of the deposited film in post-processes, and is applicable to formation of semiconductor devices having both sparse and dense patterned regions, such as a combined logic and memory hybrid semiconductor device. A thermal CVD (chemical vapor deposition) method is performed at a first pressure to form a first insulation film on a main surface of a substrate having patterned recesses therein and, after the recesses are substantially filled, a second thermal CVD process is performed under a second pressure, lower than the first pressure and without interruption of the supply of the film forming gas during the transition from the first to the second process, thereby to form an insulation film continuously and without a barrier layer therebetween.

Abstract: Sub-micron dimensioned, ultra-shallow junction MOS and/or CMOS transistor devices are fomxed by a salicide process wherein a blanket nickel layer is formed in contact with the exposed portions of the substrate surface adjacent the sidewall spacers, the top surface of the gate electrode, and the sidewall spacers. Embodiments include forming the blanket layer of nickel is formed by the sequential steps of: (i) forming a layer of nickel by sputtering with nitrogen gas; and, (ii) forming a layer of nickel by sputtering with argon gas. The two step process for forming the blanket layer of nickel advantageously prevents the formation of nickel silicide on the outer surfaces of the insulative sidewall spacers.

Abstract: A method of self-trimming pattern, includes forming a pattern containing a plurality of regular or irregular features within a first material deposited on a substrate, depositing a conformal layer of second material, and etching the second material to form spacers of the second material along the sidewalls of the features in the first material.

Abstract: A method for avoiding defects produced in The CMP process has the following steps: sequentially depositing a first dielectric layer and a second dielectric layer on a semiconductor substrate, wherein the wet-etching rate of the first dielectric layer is greater than the wet-etching rate of the second dielectric layer; forming a plurality of first holes on a plurality of the predetermined contact window areas respectively; wet etching the first dielectric layer in each of the first holes to form a plurality of second holes on the plurality of the predetermined contact window areas respectively; forming a conductive layer to fill each of the second holes; and performing the CMP process to level off the conductive layer and the second dielectric layer.

Abstract: Washing a microelectronic substrate with an ozonated solution following planarization and proceeding removal of a native oxide layer through acid etching.

Abstract: Densely disposed patterns constituting a semiconductor integrated circuit device are divided into a first mask pattern and a second mask pattern 28B such that a phase shifter S can be disposed, and a predetermined pattern is transferred on a semiconductor substrate by multiple-exposure thereof. The second mask pattern 28B has a main light transferring pattern 26c1, a plurality of auxiliary light transferring patterns 26c2 disposed thereabout, and a phase shifter S disposed in the main light transferring pattern 26c1. The auxiliary light transferring patterns 26c2 are disposed such that respective distances from a center of each thereof to a center of the main light transferring pattern 26c1 are substantially equal. With this arrangement, a densely disposed pattern is transferred with sufficient process transfer margin.

Abstract: A patterned and etched layer of gate electrode material is formed over the active surface of a substrate, a layer of liner oxide is created, gate spacers are created. Under the first embodiment of the invention, a layer of TEOS is deposited over the created structure over which a layer of nitride is deposited, The layer of nitride is etched, this etch is extended into an overetch creating openings through the layer of TEOS where this layer overlies the gate spacers. The gate spacers are then further etched. Under the second embodiment of the invention, a layer of TEOS is deposited over the created structure. The layer of TEOS is etched, stopping on the silicon nitride of the gate spacers. The gate spacers are then further etched.

Abstract: An organic/inorganic hybrid film represented by SiCxHyOz (x>0, y≧0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.

Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer by providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density. This annealing step is selected from a group of four re-oxidizing techniques: Consecutive annealing in a mixture of H2 and N2 (preferably less than 20% H2), and then a mixture of O2 and N2 (preferably less than 20% 02); annealing by a spike-like temperature rise (preferably less than 1 s at 1000 to 1150° C.) in nitrogen-comprising atmosphere (preferably N2/O2 or N2O/H2); annealing by rapid thermal heating in ammonia of reduced pressure (preferably at 600 to 1000° C.

Abstract: The present invention provides a composition for preparing substances having nano-pores, said composition comprising cyclodextrin derivative, thermo-stable organic or inorganic matrix precursor, and solvent for dissolving said two solid components. There is also provided an interlayer insulating film having evenly distributed nano-pores with a diameter less than 50 Å, which is required for semiconductor devices.

Abstract: The method for manufacturing a silicon oxide film is characterized in that the method includes the steps of forming the silicon oxide film by a vapor deposition method or the like and of irradiating infrared light onto this silicon oxide film. Thus, according to the present invention, a silicon oxide film of relatively low quality formed at relatively low temperature can be improved to be a silicon oxide film of high quality. When the present invention is applied to a thin-film semiconductor device, a semiconductor device of high operational reliability and high performance can be manufactured.

Abstract: Described is a manufacturing method of a semiconductor integrated circuit device by depositing a silicon nitride film to give a uniform thickness over the main surface of a semiconductor wafer having a high pattern density region and a low pattern density region. This is attained by, upon depositing a silicon nitride film over a substrate having a high gate-electrode-pattern density region and a low gate-electrode-pattern density region by using a single-wafer cold-wall thermal CVD reactor, setting a flow rate ratio of ammonia (NH3) to monosilane (SiH4) greater than that upon deposition of a silicon nitride film over a flat substrate.

Abstract: The present invention is related to a method and apparatus for liquid treating and drying a substrate, such as a semiconductor wafer, the method comprising the step of immersing a substrate or a batch of substrates in a tank filled with a liquid, and removing the substrate(s) through an opening so that a flow of the liquid takes place through the opening during removal of the substrate. Simultaneously with the removal, a reduction of the surface tension of the liquid is caused to take place near the intersection line between the liquid and the substrate. For acquiring such a tensio-active effect, a uniform flow of a gas or vapor is used, or/and a local application of heat. The invention is equally related to an apparatus for performing the method of the invention.

Abstract: An article of clothing has a clothing part adapted to surround and cover a user's body, and a layer of a polymeric adsorbing material applied on the clothing part and formed so as to retain at least some toxic components of a poison gas so as to prevent penetration of the some toxic components to a user's body.

Abstract: An air bag of the type utilized in a vehicle occupant restraint system has at least one panel of coated air bag fabric comprising a base fabric coated with a urethane coating material. The base fabric is woven in warp and fill directions from synthetic multifilament yarns. In at least one of the weave directions, the yarns comprise first yarns of a first yarn size and second yarns of a second yarn size, with the second yarn size being a lesser yarn size than the first yarn size. The first yarns and the second yarns are in predetermined positions in the base fabric to produce a crest and trough pattern on a surface thereof.

Abstract: The present invention relates to an unbalanced twill weave fabric having fill yarns at least about three times larger than the warp yarns. Such a fabric thus has increased strength provided by the fill direction. The present invention further relates to an airbag restraint device for vehicles, where the airbag is constructed of the unbalanced twill weave fabric and has the fill yarns oriented substantially parallel to the longest direction of the airbag.

Abstract: Method and apparatus for making a variegated multicolor fabric by knitting or weaving from a yarn spun from decorative mass of fiber fluff made from staple fibers arranged in continuous form of discrete streams of different uniform colors. The streams are brushed or carded so as to only partially intermix fibers of at least two different colors. The accumulated fibers removed from the card clothing form a pillow batt or roving having a streaked appearance with only a partial intermixing and blending of the streaks of one color with those of another. These are slightly further worked into a final fluff product having randomly dispersed bands, streaks and/or islands of one color softly merging into another color to produce a decorative randomized and interrupted candy-cane like appearance in the cotton-candy like mass of final fiber fluff for spinning into yam for making the fabric.

Abstract: This invention relates generally to a fabric composite for disposition across an automotive seating frame and relates more particularly to a laminated fabric incorporating elastomeric yarn which has undergone either flame or adhesive lamination so as to be joined to a knit or woven aesthetic cover by means of foam either with or without adhesive.

Abstract: A glass-ceramic which is substantially and desirably totally transparent, and which contains a predominant crystal phase of forsterite. The glass-ceramic is formed from precursor glasses having the following compositions, in weight percent on an oxide basis: SiO2 30-60; Al2O3 10-25; MgO 13-30; K2O 8-20; TiO2 0-10; and GeO2 0-25. The glass-ceramic may be doped with up to 1 wt. % chromium oxide to impart optical activity thereto.

Abstract: Disclosed is a substantially transparent glass-ceramic ceramic, and a method for making a glass-ceramic, exhibiting an aluminogallate spinel crystal phase and having a glass-ceramic composition that lies within the SiO2—Ga2O3—Al2O3—K2O—Na2O— system and particularly consisting essentially, in weight percent on an oxide basis, of 25-55% SiO2, 9-50% Ga2O3, 7-33% Al2O3, 0-20% K2O, 0-15% Na2O, 0-6 Li2O and 5-30% K2O+Na2O, the glass ceramic microstructure containing a crystal phase comprising at least 5%, by weight, of aluminogallate spinel crystals. Another aspect disclosed is optical element selected from the group consisting of an optical fiber, a gain or laser medium, and an amplifier component, a saturable absorber, with the element comprising a transparent glass-ceramic of the same composition and containing a crystallinity of at least about 5% by weight of aluminogallate spinel crystals.

Abstract: The present invention relates generally to UV (ultraviolet) photosensitive bulk glass, and particularly to batch meltable alkali boro-alumino-silicate glasses. The photosensitive bulk glass of the invention exhibits photosensitivity to UV wavelengths below 250 nm. The photosensitivity of the alkali boro-alumino-silicate bulk glass to UV wavelengths below 250 nm provide for the making of refractive index patterns in the glass. With a radiation source below 250 nm, such as a laser, refractive index patterns are formed in the glass. The inventive photosensitive optical refractive index pattern forming bulk glass allows for the formation of patterns in glass and devices which utilize such patterned glass.

Abstract: The present invention provides for a new improved green privacy glass. In accordance with the teachings of the present invention, the iron is oxidized with the help of inexpensive manganese oxide. No chromium, cerium nor titanium oxides are added to obtain the desired green color. The glass has a %UV less than 13% at 4.0 MM. This low UV absorption could eliminate the need for a black band in glass to prevent the fading of the color in glass.

Abstract: A silicon carbide powder which can increase the densities of a green body and a sintered silicon carbide, a method of producing a green body having a high density and excellent handling properties, and a method of producing a sintered silicon carbide having a high density, in which methods the silicon carbide powder is used. The silicon carbide powder includes at a particulate volume ratio of 20% to 80% a silicon carbide powder whose model ratio is 1.7 &mgr;m to 2.7 &mgr;m and a silicon carbide powder whose model ratio is 10.5 &mgr;m to 21.5 &mgr;m. The silicon carbide powder is used in the method of producing a green body and in the method of producing a sintered silicon carbide powder.

Abstract: There is provided a ceramic coating of zirconium diboride, silicon carbide, zirconium phosphate and silicon phosphate, that protects carbon-based materials from oxidation in high temperature oxidizing environments. The coating is applied at room temperature with a brush, roller, squeegee, doctor blade, spray gun, etc., and cured at room temperature. The cured material forms a hard, protective ceramic shell. The coating can be applied to various carbon based materials including, but not limited to, amorphous carbon foam, graphitic foam, monolithic graphite, and carbon-carbon composites. Alternative compositions of the coating can be the partial or complete substitution of hafnium diboride for zirconium diboride. Additional modifications of the coating can be accomplished by partial substitution of the borides or silicides of Ti, Ta, Cr, Nb, Ti, V, Re, for zirconium diboride.

Abstract: A ceramic composite containing alkali-metal-beta- or beta″-alumina and an oxygen-ion conductor is fabricated by converting alpha-alumina to alkali-metal-beta- or beta″-alumina. A ceramic composite with continuous phases of alpha-alumina and the oxygen-ion conducting ceramic, such as zirconia, is exposed to a vapor containing an alkali-metal oxide, such as an oxide of sodium or potassium. Alkali metal ions diffuse through alkali-metal-beta- or beta″-alumina converted from &agr;-alumina and oxygen ions diffuse through the oxygen-ion conducting ceramic to a reaction front where alpha-alumina is converted to alkali-metal-beta- or beta″-alumina. A stabilizer for alkali-metal-beta″-alumina is preferably introduced into the &agr;-alumina/oxygen-ion conductor composite or introduced into the vapor used to convert the alpha-alumina to an alkali-metal-beta″-alumina.

Abstract: An NOx concentration in exhaust gas is measured downstream of an NOx storage converter. For determining an operating state, particularly damage to the NOx storage converter, when the NOx storage converter switches from an absorption mode to a regeneration mode, the values of characteristic features of an NOx desorption peak in the time curve of the NOx concentration are ascertained and compared to predetermined test patterns, with a comparison result being formed, from which a converter-state signal that characterizes the operating state of the NOx converter is determined.

Abstract: Methods of regenerating a coked catalyst by treatment with a hydrogen-containing gas, where the coke is not removed from the catalyst via combustion with an oxygen-containing gas, are disclosed. The hydrogen-containing gas can be hydrogen itself, syngas (a mixture of hydrogen and carbon monoxide), or, if the catalyst is a dehydrogenation catalyst or if a dehydrogenation catalyst is in-line with the coked catalyst, the reaction product of the catalytic dehydrogenation of a C2-5 alkane, preferably ethane. The method is an improvement over conventional catalyst regeneration methods which first oxidize the coke to form carbon monoxide and an oxidized form of the catalyst, and then reduce the oxidized form of the catalyst so it can be re-used. The present method removes the coke without requiring an oxidation step.

Abstract: Applicant has developed an improved adsorbent useful in removing contaminants from various hydrocarbon streams. The adsorbent contains a zeolite, an alumina and a metal component. The metal component (Madd) is present in an amount at least 10 mole % the stoichiometric amount of metal (M) (expressed as the oxide) needed to balance the negative charge of the zeolite lattice. In a specific application an adsorbent comprising zeolite X, alumina and sodium is used to purify an ethylene stream in order to remove CO2, H2S, methanol, and other S— and O— containing compounds.

Abstract: The low stability of some molecular sieves can be overcome during calcination by a solid state reaction between the molecular sieve and a salt. Molecular sieves including zeolites, metal substituted aluminosilicates, and metallosilicates can be stabilized by this method. The inventive process comprises mixing such molecular sieve with a salt, either directly or as a slurry; and then heating the resulting mixture to remove water, organics and adsorbed species.

Abstract: An adsorbent for HC in an exhaust gas is an agglomerate of double-structure particles, each of which includes an HC-adsorbing zeolite core, and a ceramic coat wrapping the zeolite core and having a plurality of through-pores communicating with a plurality of pores in the zeolite core. Each of the double-structure particles is at least one of a double-structure particle including the zeolite core comprising a single zeolite particle, and a double-structure particle including the zeolite core comprising a plurality of zeolite particles. Each of the through-pores in the ceramic coat has such a shape that the HC is easy to flow into the through-pore and difficult to flow out of the through-pore.

Abstract: The present invention relates to the use of at least one solid compound that when used with a polymerization catalyst in a polymerization process results in a phase change of the solid compound to a liquid that renders the polymerization catalyst substantially or completely inactive.

Abstract: The invention provides new polymerization catalyst activator compositions including a non-coordinating or ionizing activator having a siloxane moiety. The invention also provides a new supported catalyst activator composition and method of making the composition.