Abstract: An apparatus and method for batch processing semiconductor lasers producing substantially contamination free laser bar end surfaces for optimal growth of end surface layers are provided. The method includes loading a laser cell comprising a plurality of laser bars and an empty cassette capable of holding a plurality of laser bars into a cleaving chamber and pumping the cleaving chamber down to a desired pressure. Next, a cleaving cycle is performed in which an end laser bar is cleaved off the laser cell. The laser bar is deposited in the cassette, while the laser cell is positioned for a subsequet operation. The cleaving cycle repeats until a plurality of laser bars are cleaved off the laser cell and loaded into the cassette. The cassette is then moved into a deposition chamber where a layer of material is deposited on at least one end surface of all of the laser bars in the cassette.

Abstract: A method comprising forming a sacrificial layer over less than the entire portion of a contact area on a substrate, the sacrificial layer having a thickness defining an edge over the contact area, forming a spacer layer over the spacer, the spacer layer conforming to the shape of the first sacrificial layer such that the spacer layer comprises an edge portion over the contact area adjacent the first sacrificial layer edge, removing the sacrificial layer, while retaining the edge portion of the spacer layer over the contact area, forming a dielectric layer over the contact area, removing the edge portion, and forming a programmable material to the contact area formerly occupied by the edge portion.

Abstract: An atomic layer deposition method includes positioning a semiconductor substrate within an atomic layer deposition chamber. A first precursor gas is flowed to the substrate within the atomic layer deposition chamber effective to form a first monolayer on the substrate. The first precursor gas flowing comprises a plurality of first precursor gas pulses. The plurality of first precursor gas pulses comprises at least one total period of time between two immediately adjacent first precursor gas pulses when no gas is fed to the chamber. After forming the first monolayer on the substrate, a second precursor gas different in composition from the first is flowed to the substrate within the deposition chamber effective to form a second monolayer on the first monolayer. Other aspects and implementations are contemplated.

Abstract: A method for producing a semiconductor device of the present invention includes: heating a first semiconductor layer made of a Group III nitride-based compound semiconductor in gas containing nitrogen atoms; and growing a second semiconductor layer made of a Group III nitride-based compound semiconductor on the first semiconductor layer.

Abstract: A method of fabricating an integrated circuit including a monocrystalline silicon substrate, a layer of polycrystalline silicon on the top surface of the substrate and doped with at least two dopants with different rates of diffusion, in which method annealing is performed at a temperature and for a time such that a first dopant diffuses into a first zone and a second dopant diffuses into a second zone larger than the first zone.

Abstract: A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.

Abstract: Disclosed is a semiconductor device in which first and second MISFETs are formed, each of the first and second MISFETs including a source region, a drain region, a gate insulating film, a gate electrode and a covering insulating film. The source region and the drain regions are formed apart from each other within a semiconductor substrate. The gate insulating film is formed on the surface of the semiconductor substrate and positioned between the source region and the drain region, and the gate electrode is formed on the gate insulating film. The covering insulating film is formed to cover the side surface of the gate electrode, the gate insulating film and a part of the source region or the drain region. The first and second MISFETs differ from each other in the thickness of a first region of the covering insulating film positioned to cover the source region or the drain region.

Abstract: A photoresist pattern is formed, without being exposed, by using photoresist having a residual layer proportion characteristic by which the photoresist dissolves at a suitable rate in a developing solution. First, a target layer to be patterned and a photoresist layer are sequentially formed on a substrate having a pattern that defines a step on the substrate. Some of the photoresist layer is treated with the developing solution, to thereby form a photoresist pattern whose upper surface is situated beneath the step and hence, exposes part of the target layer. Next, the exposed part of the target layer, and the photoresist pattern are removed. A silicidation process may be carried out thereafter on the area(s) from which the target layer has been removed. The method is relatively simple because it does not involve an exposure process. Furthermore, the method can be used to manufacture devices having very fine linewidths, i.e.

Abstract: The formation of routing traces on an external surface of a semiconductor device, such as a flip-chip, which has a plurality of ball or bump sites patterned in specific locations, wherein the ball or bump sites are in electrical communication with external communication traces which are used to route signals from the flip-chip integrated circuitry. Such external communication traces generally result in unused space on the exterior surface of the flip-chip. This unused space can be utilized for forming routing traces to connect portions of the internal circuitry of the flip-chip rather than forming such routing traces internally, for forming routing traces to connect two or more semiconductor dice, or for forming routing traces for use as repair mechanisms.

Abstract: An integrated circuit structure and a method for packaging an integrated circuit are described. The integrated structure includes an integrated circuit that is inverted and solder bump mounted to a substrate. An underfill is used to encapsulate the solder bumps and form a rigid support layer between the integrated circuit and the substrate. A heatspreader, which has larger planar dimensions than the integrated circuit, is centrally attached to an upper surface of the integrated circuit with a thermally conductive material. Lateral portions of the heatspreader extending beyond the edges of the integrated circuit are attached to the substrate and sides of the integrated circuit by a thermally conductive underfill material. The thermally conductive underfill material thus employed, among other things, provides a robust mechanical support to the heatspreader and integrated circuit structure and eliminates the need for additional support structures such as conventional stiffener rings.

Abstract: The reactive element is introduced to the surface of the metal substrate in the form of an oxide powder and the aluminide-type coating is then formed.

Abstract: A method of connecting a conductive trace and an insulative base to a semiconductor chip includes providing a semiconductor chip, a conductive trace and an insulative base, wherein the chip includes a conductive pad and the insulative base contacts the conductive trace on a side opposite the chip, then forming a through-hole that extends through the insulative base and exposes the conductive trace and the pad, and then forming a connection joint that contacts and electrically connects the conductive trace and the pad.

Abstract: A solder ball fabricating process for forming solder balls over a wafer having an active layer is provided. A patterned solder mask layer is formed over the active surface of the wafer. The patterned solder mask layer has an opening that exposes a bonding pad on the wafer. Solder material is deposited into the opening over the bonding pad. A reflow process is conducted to form a pre-solder body. The aforementioned steps are repeated so that various solder materials are fused together to form a solder ball over the bonding pad.

Abstract: A method of forming a dual-implanted gate and a structure formed by the same. Stack structures comprising a polysilicon layer, a sacrificial layer and a mask layer are formed over a substrate with a gate oxide layer thereon. A dielectric layer is formed over the substrate covering the stack structures. The dielectric layer is planarized to expose the upper surface of the mask layer in the first and the second structure. The mask layer is removed to form a plurality of trenches. The stack structures are selectively implanted using ions having different electrical states. The sacrificial layer is removed. Thereafter, a barrier layer is formed over the interior surface of the trenches. A metallic layer is formed over the substrate completely filling the trenches. The dielectric layer is removed to form a plurality of gate structures. Spacers may on the sidewalls of the gate structures as well.

Abstract: An anti-reflective coating material layer is provided that has a relatively high etch rate such that it can be removed simultaneously with the cleaning of a defined opening in a relatively short period of time without affecting the critical dimensions of the opening. A method of forming such a layer includes providing a substrate assembly surface and using a gas mixture of at least a silicon containing precursor, a nitrogen containing precursor, and an oxygen containing precursor. The layer is formed at a temperature in the range of about 50° C. to about 600° C. Generally, the anti-reflective coating material layer deposited is SixOyNz:H, where x is in the range of about 0.39 to about 0.65, y is in the range of about 0.02 to about 0.56, z is in the range of about 0.05 to about 0.33, and where the atomic percentage of hydrogen in the inorganic anti-reflective coating material layer is in the range of about 10 atomic percent to about 40 atomic percent.

Abstract: A method of fabricating a sub-lithographic sized via is disclosed. A dual-polymer method is used to form a stacked layer of polymer materials wherein a first polymer layer has a first etch rate and a second polymer layer has a second etch rate. The first etch rate is preselected to be faster than the second etch rate when the first and second polymer layers are isotropically etched. The second polymer layer is made from a photo active material and is operative as an etch mask for the first photoresist layer. The etching is continued until the first polymer layer has a sub-lithographic feature size that is less than a lithography limit of a lithography system. A dielectric material is deposited on the etch mask and the first polymer layer. The first polymer layer is lifted-off to define a sub-lithographic sized via.

Abstract: Methods of forming conductive contacts are described. According to one implementation, the method includes forming a transistor gate structure over a substrate. The gate structure includes a conductive silicide covered by insulative material. A dielectric layer is formed over the substrate and the gate structure. A contact opening is etched into the dielectric layer adjacent the gate structure. After the etching, the substrate is exposed to oxidizing conditions effective to oxidize any conductive silicide within the contact opening which was exposed during the contact opening etch. After the oxidizing, conductive material is formed within the contact opening. According to another embodiment, after the etching, it is determined whether conductive silicide of the gate structure was exposed during the etching. The substrate is then exposed to oxidizing conditions only if conductive silicide of the gate structure was exposed during the etching.

Abstract: A method of depositing thin films comprising Ti and TiN within vias and trenches having high aspect ratio openings. The Ti and TiN layers are formed on an integrated circuit substrate using a Ti target in a non-nitrided mode in a hollow cathode magnetron apparatus in combination with controlling the deposition temperatures by integrating cooling steps into the Ti/TiN deposition processes to modulate the via and contact resistance. The Ti and TiN layers are deposited within a single deposition chamber, without the use of a collimator or a shutter.

Abstract: Nanopores for single-electron devices may be used as templates for placing of a desired number of nanoparticles at a desired location in the devices. Nanopores may be fabricated by providing on a substrate spaced apart electrode regions, a spacer region therebetween, and a cover layer on the spaced apart electrode regions and on the spacer region. A wet etching solution is contacted to the cover-layer. At least one of the spaced apart electrode regions is energized, to selectively wet etch the cover layer adjacent the spacer region and define a nanopore in the cover layer adjacent the spacer region. At least one nanoparticle is placed in the nanopore. Accordingly, nanopores can be aligned to a buried spacer region.

Abstract: An aluminum wiring is selectively formed within a contact hole or groove of a substrate. An intermediate layer which includes nitrogen is formed over the main surface of a substrate and over the interior surface of the contact hole or groove. A first surface portion of the intermediate layer which is located over the main surface of the substrate is treated with a plasma to form a passivity layer at the first surface portion of the intermediate layer. Then, without an intervening vacuum break, an aluminum film is CAD deposited only over a second surface portion of the intermediate layer which is located over the interior surface of the contact hole or recess. The plasma treatment of the first surface portion of the intermediate layer prevents the CAD deposition of the aluminum film over the first surface portion of the intermediate layer.

Abstract: A method for physical etching using a multilevel hard mask. A substrate having a multilayer structure thereon is provided. A BPSG layer, a masking material layer and a patterned photoresist layer are sequentially formed on the multilayer structure, wherein the masking material layer has a high selective etching ratio for the BPSG layer. A pattern of the patterned photoresist layer is transferred to the masking material layer, and then transferred to the BPSG layer. The masking material layer and the BPSG layer, which function as a multilevel hard mask, are used to physically etch the multilayer structure to form a trench therein.

Abstract: A method for reducing random bit failures of flash memory fabrication processes with an HTO film. The random bit failures are caused by HF acid penetration. The HTO film, which functions as an interface reinforcement layer, is formed on a sacrificial layer and a PL1 layer. With the aid of the HTO film, the flash memory is free of acid-corroded seams.

Abstract: A process for removal of a photoresist mask used to etch openings in low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and for removing etch residues remaining from either the etching of the openings or removal of the resist mask, while inhibiting damage to the low k dielectric material comprises. The structure is exposed to a reducing plasma to remove a portion of the photoresist mask, and to remove a portion of the residues remaining from formation of the openings in the layer of low k dielectric material. The structure is then exposed to an oxidizing plasma to remove any remaining etch residues from the openings in the layer of low k dielectric material or removal of the resist mask.

Abstract: An improved chemical vapor deposition or etching is shown in which cyclotron resonance and photo or plasma CVD cooperate to deposit a layer with high performance at a high deposition speed. The high deposition speed is attributed to the cyclotron resonance while the high performance is attributed to the CVDs.

Abstract: A method 10 for making a multi-layer circuit board 70 having at least one electrically conductive interconnection portion or “via” 72 which extends within the board 70 and at least one air-bridge 74. The method 10 includes the steps of forming protuberances 13 upon a core member 12, attaching pre-circuit assemblies 32, 34 to the core member 12, thereby forming the circuit board 70 while concomitantly and selectively extending at least one of the protuberances 13 within the formed circuit board 70.

Abstract: The present invention provides a method and apparatus for achieving conformal step coverage of one or more materials on a substrate using sputtered ionized material. A target provides a source of material to be sputtered by a plasma and then ionized by an inductive coil, thereby producing electrons and ions. In one embodiment, one or both of the signals to the substrate and the target are modulated. Preferably, the modulated signal to the substrate includes a negative voltage portion and a zero voltage portion.

Abstract: The present invention relates to a semiconductor device manufacturing method for forming an interlayer insulating film having a low dielectric constant by coating a copper wiring. The low dielectric constant insulating film is formed by reaction of a plasma of a film-forming gas containing an oxygen-containing gas of N2O, H2O, or CO2, ammonia (NH3), and at least one of an alkyl compound having a siloxane bond and methylsilane (SiHn(CH3)4−n: n=0, 1, 2, 3).

Abstract: This invention embodies an improved process for annealing integrated circuits to repair fabrication-induced damage. An integrated circuit is annealed in a pressurized sealed chamber in which a forming gas comprising hydrogen is present. Pressurization of the chamber reduces the contribution made by the final anneal step to total thermal exposure by increasing the diffusion rate of the hydrogen into the materials from which the integrated circuit is fabricated. Ideally, the forming gas contains, in addition to hydrogen, at least one other gas such as nitrogen or argon that will not react with hydrogen and, thus, reduces the danger of explosion. However, the integrated circuit may be annealed in an ambiance containing only hydrogen gas that is maintained at a pressure greater than ambient atmospheric pressure.

Abstract: An orthopedic casting material comprising a substrate impregnated with a water-curable resin comprising an aromatic polyisocyanate and a polyol, wherein the free NCO level of said prepolymer is from about 6% to about 10%. Preferably the free NCO level is from about 7% to about 8%. Preferably the polyol has a molecular weight of at least 2,000, and a hydroxyl number of from about 28 to about 56, preferably from about 35 to about 40. The casting material may be packaged as a kit with a casting aid comprising a substrate impregnated with a lubricating material.

Abstract: Specific fabric articles exhibiting very low air and/or gas permeability (even upon application of high inflation pressures) and very high tear strengths are herein disclosed and claimed. Such a specific fabric also permits the incorporation of discrete openings (through cutting, for example) through which air and/or gas introduced by an airbag inflation canister will travel. Such a specific fabric acts as a barrier to the complete introduction of high pressure inflation gases into an airbag cushion, thereby permitting a more controlled, safer inflation upon the occurrence of a collision event. Thus, the specific inventive fabric permits movement of inflation gas and/or air substantially solely through the openings within the fabric and not through the interstices between the individual fiber constituents.

Abstract: The invention relates to a glass and a glass-ceramic comprising beta-quartz and/or keatite solid solutions, and to a process for their production, and to their use as substrate material for coating. Glass-ceramic comprising beta-quartz and/or keatite solid solutions with a surface roughness without polishing of Ra<50 nm, a thermal expansion in the temperature range between 20° C. and 300° C. of <1.2•10−6/K, a transmission in the near infrared region at 1050 nm of >85% for a 4 mm thickness, and a composition in % by weight, based on the total composition, containing: Li2O 3.0-5.5   Na2O 0-2.5 K2O 0-2.0 &Sgr; Na2O + K2O 0.5-3.0   &Sgr; MgO + ZnO <0.3 SrO 0-2.0 BaO 0-3.5 B2O3 0-4.0 Al2O3 19.0-27.0 SiO2 55.0-66.0 TiO2 1.0-5.5   ZrO2 0-2.5 &Sgr; TiO2 + ZrO2 3.0-6.0 P2O5 0-8.

Abstract: The present invention provides a high redox, ultraviolet and/or infrared absorbing radiation absorbing, and colored glass using a standard soda-lime-silica glass base composition and additionally at least on essential solar absorbing and colorant set of components. The solar absorbing flat glass article has two opposing major surfaces with a thickness of 1.5 to 12 mm. and a redox value in the range of greater than 0.38 to about 0.6, a retained sulfate measured as (SO3) value in the range of greater than 0.005 to less than 0.18 weight percent, and is essentially free of coloration from inorganic polysulfides.

Abstract: The present invention relates to a ceramic dielectric material for communication components, which can be used in the microwave and millimeter wave frequency band. More particularly, the present invention relates to a dielectric ceramic composition for the microwave/millimeter wave frequency band having a very high quality factor and a low dielectric constant, and a method of manufacturing the dielectric ceramic using the same. The dielectric ceramic composition consists of spinel (MgAl2O4) as a major component and a small amount of lithium carbonate (Li2CO3) as a sub composition with a specific composition formula. The dielectric ceramic is manufactured from magnesia (MgO), alumina (Al2O3) and lithium carbonate (Li2CO3) as raw materials and through the ceramic processing of calcination, shaping and sintering. The obtained dielectric ceramic has the quality factor (Q×f) of 160,000 and the dielectric constant (&egr;r) of 8.5.

Abstract: A catalyst active in ammonia synthesis with improved activity and a process for the recovery of useful components from the catalyst.

Abstract: The invention provides a method for regenerating with high efficiency a deteriorated catalyst of reduced activity, said catalyst originating from a heteropolyacid catalyst containing heteropolyacid formed of molybdophosphoric acid and/or molybdovanadophosphoric acid, or a salt thereof, to a heteropolyacid catalyst which exhibits approximately equivalent activity level to that of the fresh catalyst. Said method comprises mixing a deteriorated catalyst and a nitrogen-containing heterocyclic compound under the conditions whereunder ammonium ions and nitrate anions are present at such ratio that the amount of total ammonium ions per mol of total nitrate anions does not exceed 1.7 mols, drying the mixture and calcining the same.

Abstract: A catalyst component, a catalyst, and a process for making the component and catalyst are disclosed herein. Also disclosed herein is a fluid catalytic cracking process for converting petroleum feedstocks to lower boiling products wherein the feedstock is contacted with the catalyst. The catalyst component is a crystalline microporous oxide catalyst to which a compound for promoting dehydrogenation and increasing Lewis acidity is effectively added. This catalyst component can be included in an inorganic oxide matrix material and used as a catalyst. Preferably, the compound for promoting dehydrogenation and increasing Lewis acidity is effectively added to a non-framework portion of the crystalline microporous oxide.

Abstract: A process for forming a composition useful as a catalyst for the polymerization of addition polymerizable monomers, the steps of the process comprising: a) contacting under exchange reaction conditions a tri(hydrocarbyl)aluminum compound with a tri(fluoroaryl)boron compound; and b) contacting the reaction product from step a) without recovery or isolation thereof, with a neutral Group 3-10 metal complex.

Abstract: An improved chromate catalyst on a highly porous silica support having high surface area and total pore volume, a method of using same to produce high performance polyethylene products, and the high performance polyethylene products, such as polyethylene pipe, produced thereby.

Abstract: A novel supported ionic liquid moiety which may further comprise immobilized ionic fluids and catalytic material is described. A method for making the composition is also described.

Abstract: A photocatalytic active carbon capable of demonstrating a stable deodorizing and adsorbing ability for a prolonged period of time is produced by depositing a coating of a photocatalyst on the surface of the active carbon by means of vapor deposition. Colored photocatalytic active carbon coloring active carbon including the photocatalytic active carbon, which while maintaining the adsorbing action and the decomposing and sterilizing action, comes to be rich in color variations and capable of improving visual design and handling are produced by subjecting the surface of the active carbon to coloring treatment and/or treatment with a compound having coloring or discoloring properties upon hydration.

Abstract: A practical catalyst exhibiting especially high CO shift reaction activity in a low temperature region where CO is favorably converted to H2 in equilibrium includes a carrier which is composed of titania as a main component, a noble metal which is supported on the carrier, and a sulfur-containing material which adheres to the carrier. The titania carrier to which the sulfur-containing material adheres exhibits high solid acid strength, and accordingly acts to absorb electrons from noble metal so that noble metal becomes partially oxidized. This results in the CO adsorbing ability decreasing to restrain poisoning of noble metal due to CO, whereby the CO shift reaction activity in a low temperature region is improved.

Abstract: The catalyst is prepared by recycling a spent catalyst discharged from a hydro-desulfurization process of an oil refinery in which the spent catalyst comprises an alumina support with a large specific surface area impregnated with low contents of vanadium and high contents of molybdenum. The thus prepared catalyst has more excellent selective removal activity of nitrogen oxides at a high temperature window by containing suitable amounts of metal components therein as well as a better poisoning resistance to sulfur oxides, compared with the conventional catalysts.

Abstract: A guard catalyst, comprising an alumina support and molybdenum and/or tungsten and nickel and/or cobalt supported on the alumina support, wherein the total ammonia integral adsorption heat of said alumina support does not exceed 25 J/g, the percentage taken up by the ammonia integral adsorption heat of the ammonia differential adsorption heat greater than 100 kJ/mol does not exceed 10% of the total ammonia integral adsorption heat. Compared to the catalysts of the prior art, the guard catalyst has higher catalytic activity, less coke deposit, lower reduction rate of pore volume, better stability of activity, and higher strength.

Abstract: This is a hydrogen generation process for use with fuel cells which includes a preferential oxidation step to reduce the concentration of carbon monoxide. The preferential oxidation step includes contacting a fuel stream comprising hydrogen and carbon monoxide in the presence of an oxygen at a preferential oxidation temperature of between about 70° and about 160° C. with preferential oxidation catalyst for reducing the concentration of carbon monoxide to produce a treated fuel gas stream comprising less than about 50 ppm-vol carbon monoxide. The preferential oxidation catalyst comprises ruthenium metal dispersed on a shaped alumina carrier, wherein at least 60 percent of the ruthenium metal is present in a band extending from the surface towards the center and having a width of about 50 percent of the distance from the surface to the center of the shaped alumina carrier. Superior performance at low preferential oxidation temperatures below 130° C.

Abstract: A particulate catalyst suitable for the hydrogenation of fats or oils containing 5 to 75% by weight of nickel may be made by slurrying a transition alumina powder having a surface-weighted mean diameter D[3,2] in the range 1 &mgr;m to 20 &mgr;m with an aqueous solution of a nickel ammine complex, followed by heating to deposit an insoluble nickel compound and then reducing the latter. Catalysts containing up to about 55% by weight of nickel have a nickel surface area above 130 m2/g of nickel. Catalysts having greater nickel contents made using alumina having an average pore diameter above 12 &mgr;m may have a lower nickel surface area but are surprisingly active and selective.

Abstract: An object of the present invention is to provide an image receiving layer (3) which alliveates or substantially dissolves at least one problem selected from a low quality of the image such as glossiness and sharpness, a low preservative property of the image such as heat resistance, and a high running cost. Moreover, an object of the present invention is to provide a thermal transfer recording image receiver (1) having such image receiving layer (3). To achieve the objects, the present invention provides a image receiving layer (3) for a thermal transfer recording image receiver (1) having a substrate (2) and the image receiving layer (3) characterized in that the image receiving layer (3) is formed from a composition comprising an acrylic polyol resin and other thermoplastic resin. Further, the present invention provides such thermal transfer recording receiver (1) having the image receiving layer as well as a thermal transfer recording method using the receiver.

Abstract: The invention relates to novel compounds of formula I: wherein R, A, B and X have the meaning given in claim 1; and the agronomically acceptable salts or N-oxides thereof, and to herbicidal compositions containing such compounds as active ingredients.

Abstract: Disclosed are novel methodologies for virulence enhancement of fungal and bacterial pathogens for biological control of target plants. Described is a selection process for phytopathogenic microorganisms that excrete selected amino acids. Pathogenicity studies demonstrate that these amino acid-excreting plant pathogens show greater virulence against target plants than do corresponding wild type strains. Host range evaluations of these mutants did not reveal any increase of virulence towards non-target plants. This novel approach to enhancement of microbial herbicides can be used across a broad spectrum of microbial groups to improve the efficacy of bio-control. Also disclosed is the use of selected mutants of plant pathogenic microorganisms that overproduce one or more inhibitory amino acids to enhance control of target plants.

Abstract: Liquid herbicidal composition, containing a grass herbicide that is suspended or dissolved in a non-aqueous liquid phase, a herbicide of the sulfonylurea type that is suspended in a non-aqueous liquid phase, and at least one surface-active substance.

Abstract: The present invention provides a method for the synergistic control of undesirable plants such as Poa, Polygonum and Setaria which comprises applying to the plants or their locus a synergistically effective amount of a combination of a dinitroaniline compound and an imidazolinone compound. Further provided are synergistic herbicidal compositions comprising dinitroaniline and imidazolinone compounds.