Abstract: A ferrite magnet obtained by adding a ferrite having a spinel-type structure to a ferrite having a hexagonal M-type magnetoplumbite structure, in which a portion of Sr, Ba, Pb or Ca is replaced with at least one element that is selected from the group consisting of the rare-earth elements (including Y) and Bi and that always includes La, during the fine pulverization process thereof. By adding a small amount of the element such as Co, Ni, Mn or Zn to the ferrite already having the hexagonal M-type magnetoplumbite structure during the fine pulverization process thereof, the magnetic properties can be improved.

Abstract: A refrigerant blend to replace refrigerant R-22 (chlorodifluoromethane) in refrigeration systems designed to use R-22 as the refrigerating fluid. The inventive refrigerant blend comprises R-134a (1,1,1,2-tetrafluoroethane), R-125 (pentafluoroethane), a hydrocarbon component, and, optionally, R-32 (difluoromethane). The hydrocarbon component comprises at least two hydrocarbons having boiling points that bracket the boiling point of R-134a (−15° F., −26° C.). The hydrocarbons in one group, designated as Group A, have boiling points lower than the boiling point of R-134a. The hydrocarbons in the other group, designated Group B, have boiling points higher than that of R-134a.

Abstract: The present invention generally relates to an improvement in the process for etching of alumina. The novel wet etchant solution combines complexing agents with pH control to achieve improved selectivity for etching of alumina in the presence of transition metals. The novel wet etchant provides improved etching of features in alumina during fabrication of thin film magnetic structures over the non-selective conventional dry etching processes.

Abstract: An europium activated cesium bromide phosphor having the formula of CsBr:xEu [0<x≦0.2], in which a relationship between an emission intensity (IE) of Eu2+ and a coloring intensity (IF) at F(Br−) center satisfies the condition of 0.2≦IE×IF, and/or in which a ratio of Eu2+ to Eu3+ contained in the phosphor in terms of emission intensity satisfies the condition of 5×10−5≦Eu3+/Eu2+≦0.1 gives an increased stimulated emission amount and is favorably employed for producing a radiation image storage sheet.

Abstract: A method and apparatus for separating gas mixtures containing synthesis gas (syngas) into separate streams of wet hydrogen containing significantly reduced amounts of CO2 and CO, with the CO2 being “sequestration ready” and containing less than 1% fixed gases. In the preferred embodiment, a mixture of limestone and iron oxide circulates between two fluidized beds whereby one bed is fluidized with a gas containing syngas, while the other bed is fluidized with a gas containing steam and oxygen. As the fluidizing gas containing syngas passes through the bed, the CO2 reacts with CaO to form CaCO3. Virtually all of the CO is removed by a water gas shift reaction, forming hydrogen and CO2, with the remainder being removed by reaction with the iron oxide, reducing Fe2O3 to FeO. Some hydrogen is also removed by reaction with the iron oxide, reducing Fe2O3 to FeO, while the remainder of the hydrogen passes through the fluid beds, leaving in a purified state, i.e., PEM fuel cell quality.

Abstract: The invention provides a composition that includes a stabilizer and a diluent, the diluent including a monohydric alcohol having twelve or more carbon atoms. Also described is a method of making a stabilizer component for use in a vinyl chloride polymer, the method including combining a stabilizer and a diluent to form a stabilizer component, wherein the diluent is a monohydric alcohol having 12 or more carbon atoms.

Abstract: A resistive paste is made by a mixture of a conductive metal powder which is made by mixing 85 to 94 percent by weight of copper powder, 5 to 10 percent by weight of manganese powder, and 1 to 5 percent by weight of tin powder; a mixture of 3 to 7 percent by weight of glass powder and 3 to 7 percent by weight of copper-oxide powder relative to the entire amount of said conductive metal powder; and 7 to 15 percent by weight of vehicle relative to the entire amount of the conductive metal powder and the mixture. The resistive paste is then sintered, and the resistive composition having the low resistance value and low TCR may be obtained. In addition, a resistor is made by forming the resistive element upon a substrate.

Abstract: An electrochromic medium for use in an electrochromic device comprising:

Abstract: Disclosed are formulations adapted to form a foamed cementitious composition, the foamed cementitious composition itself, a method of forming a hydraulic binder foam, and a method of conveying and applying the resulting foam to a substrate. A pumpable cementitious slurry is formed, the slurry is mixed with a gas such as air, and is subjected to mechanically created turbulence to generate gas bubbles and create a foam, which preferably is stabilized by a foam stabilizing agent such as polyvinyl alcohol present in the slurry. The foam is then conveyed to a nozzle or other suitable dispense point from which it is applied, for example sprayed, preferably uniformly, onto a substrate to be coated. Prior to dispensing, a set accelerator is preferably injected, which causes the foam to gel, which in turn improves the hangability of the product on a substrate. The spray material adheres to the substrate and hardens to form an insulative coating on the substrate.

Abstract: A material for harmonic generation has been made by substitutional changes to the crystal LaCa4 (BO3)3 also known as LaCOB in the form Re1xRe2yRe3zCa4(B03)3O where Re1 and Re2, (rare earth ion 1 and rare earth ion 2) are selected from the group consisting of Sc, Yttrium, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu; Re3 is Lanthanum; and x+y+z=1.

Abstract: A system for servicing a racing car or other car at a track, other race course, or similar destination employs an open platform for supporting the car by its tires in a horizontal position. The platform supports the car, and is itself supported by a crawler, in a carrier vehicle, for example a truck or trailer, when the carrier vehicle is transporting the car. The crawler and platform are also used to unload and load the car from and into the carrier vehicle. To unload the car at the destination, the crawler, with the platform and car on it, is driven out of the carrier vehicle and onto the ground. Next, the platform is elevated by extending its legs so that it rises off, is spaced from, and straddles the crawler. Then the crawler is driven out from under the platform. Then the platform is lowered to the ground., where it is used as a lift to elevate the car so that its undercarriage may be accessed. The platform may also be used to tune the chassis of the car.

Abstract: A light emitting device 100 has a structure in which a p type InGaAs layer 7 as an electrode contact layer and an ITO electrode layer 8 as an oxide transparent electrode layer are formed in the order in a first major surface 17 side of a light emitting layer section 24. In a second major surface 18 side of the light emitting layer section 24, an n type InGaAs layer 9 as an electrode contact layer and an ITO electrode layer 10 as an oxide transparent electrode layer are formed in the order. The ITO electrode layers 8 and 10 together with the p type InGaAs layer 7 and the n type InGaAs layer 9 are formed on the respective both major surfaces 17 and 18 of the light emitting layer section 24 so as to cover the respective both major surfaces 17 and 18 in the entirety thereof.

Abstract: Semiconductor optoelectronic devices such as diode lasers are formed on GaAs with an active region with a GaAsN electron quantum well layer and a GaAsSb hole quantum well layer which form a type II quantum well. The active region may be incorporated in various devices to provide light emission at relatively long wavelengths, including light emitting diodes, amplifiers, surface emitting lasers and edge-emitting lasers.

Abstract: The present invention provides a quantum structure product comprising a substrate having quantum ridges and quantum tips on at least one surface thereof. In some embodiments of the invention quantum ridges may support quantum wires and the quantum tips may support quantum dots. Grooves which separate the quantum ridges and quantum tips from each other may be shallow or deep, and may contain organic molecules, fullerene tubes, and fullerene balls.

Abstract: A method fabricates ICs in which organic semiconductor crystallites serve as active channels of semiconductor devices. The method includes providing a substrate with a surface that has a preselected pattern of adhesion sites located thereon. The adhesion sites are prepared to adhere crystallites of an organic semiconductor. The method also includes applying a plurality of crystallites of the organic semiconductor to the surface to enable a portion of the applied crystallites to adhere at the prepared adhesion sites.

Abstract: Crosslinkable liquid crystalline polymer compositions for use as dielectric materials in circuit materials, circuits, and multi-layer circuits are disclosed. The crosslinkable liquid crystalline polymer compositions comprise crosslinkable liquid crystalline polymers that preferably comprise end groups selected from the group consisting of phenyl maleimide, nadimide, phenyl acetylene, or combinations of the foregoing. Additionally, the crosslinkable liquid crystalline polymer compositions may further comprise particulate fillers and/or fibrous webs. The crosslinkable liquid crystalline polymer compositions provided improved electrical and mechanical properties.

Abstract: A MEMS (micro electro mechanical system) apparatus is equipped with a light-emitting circuit, having a light-emitting device, to emit light; a light-receiving circuit having a series circuit of series-connected light-receiving devices that receive the emitted light to generate a voltage; and a MEMS assembly driven by the generated voltage.

Abstract: A light emitting device is provided. The light emitting device contains an array of organic light emitting diodes (OLEDs) emitting a plurality of colors, and a layer of scattering media above the light emitting surface of the OLED array. The emission color of the OLEDs may be tuned by applying different power to different sets of OLEDs. The scattering media mixes the colors from each set of OLEDs, such that the device light output has a white color having a desired color temperature.

Abstract: An organic electroluminescent device comprises a pair of electrodes and a layer structure provided between the paired electrodes and including, at least, an emission layer comprising a specific type of oligomer. The layer structure may further comprise an electron injection layer and an electron transport layer, one of which comprises a specific type of oligomer. Alternatively, the layer structure may be of the type which comprises an organic layer having a charge transport interference layer in the inside thereof along with an emission layer.

Abstract: The present invention provides an oxide semiconductor electrode which can realize a combination of high transparency with large surface area and is highly responsive to ultraviolet light, as well as to visible light. The oxide semiconductor electrode comprises a conductive substrate and an oxide semiconductor layer provided on the conductive substrate. The oxide semiconductor layer is a porous layer comprising porous titania particles which have been joined to each other to define interparticulate communicating pores. Preferably, the pores possessed by the titania particles per se have a diameter of 10 to 40 nm, the interparticulate communicating pores have a diameter of 10 to 70 nm, and the titania particles have an average diameter of 10 to 70 nm.

Abstract: A test structure for a memory cell array determines a doping region of an electrode connection that, in a memory cell, connects an inner capacitor electrode of a trench capacitor to an associated selection transistor. The test structure has an electrical contact with a predetermined contact area disposed between a regular matrix configuration of four trench capacitors.

Abstract: A test structure for determining a doping region of an outer capacitor electrode of a trench capacitor in a memory cell array. The trench capacitors of the memory cell array are arranged in matrix form. The test structure has two parallel rows of trench capacitors. The outer capacitor electrode of each row of trench capacitors is electrically connected to one another and the basic area of at least one trench capacitor of each row is lengthened on the side facing the other row in such a way that the two trench capacitors overlap in a direction transverse to their extent.

Abstract: A test structure allows determining a short circuit between trench capacitors in a memory cell array in which the trench capacitors are arranged in matrix form. The test structure has, in two rows of trench capacitors, a connection of the trench capacitors of each row by tunnel structures and/or bridge structures. A contact area for contact connection is provided at each end section of a trench capacitor row.

Abstract: An example CMOS image sensor has pixel units and protection regions. The pixel unit has a light sensing region for converting an incident light into an electrical signal and an active region for controlling the transfer of the electrical signal. Each pixel unit is isolated by an element isolation layer. The protection region, which is located between each element isolation layer, prevents crosstalk generated between each pixel unit while the incident light is converted to the electrical signal. The protection region may include a well and a junction.

Abstract: A p-type transparent conducting oxide film is provided which is consisting essentially of, the transparent conducting oxide and a molecular doping source, the oxide and doping source grown under conditions sufficient to deliver the doping source intact onto the oxide.

Abstract: According to the invention, a Group III nitride compound semiconductor light-emitting element is provided with a light-emitting layer comprising two layers of different in ratio of AlGaInN composition, and emitting light with an emission peak wavelength in an ultraviolet region and light with an emission peak wavelength in a visible region. The light-emitting element and a fluorescent material excited by light in the ultraviolet region are combined to configure a light emitting device.

Abstract: A cube used to perform optical functions in a system, such as beam splitting or polarizing, or both, is manufactured by optically contacting a coated prism with an uncoated prism. The coated prism includes a dielectric stack having alternating layers of high and low index of refraction materials. To ensure secure optical contacting between the coated prism and uncoated prism, low interface reflection, and good throughput, a contacting layer is deposited on the dielectric stack. The contacting layer can be fused silica or SiO2, which has natural compatibility with the CaF2 materials that make up the uncoated prism and the coating layers.

Abstract: Light emission device and method for producing said device.

Abstract: A light emitting element having an organic compound, which can be extended its longevity is provided. According to the present invention, there is provided a constitution in which, in order to protect a light emitting element from moisture, an inorganic insulating film 312a, a stress relaxation layer 312b having transparency and a hygroscopic property, and an inorganic insulating film 312c are repeatedly laminated over a cathode. The stress relaxation layer 312b having transparency and the hygroscopic property uses at least one film selected from the group consisting of a film comprising a same material as that of a layer 310, containing an organic compound, sandwiched between a cathode and an anode, a layer capable of being formed by vapor deposition, and a layer capable of being formed by coating.

Abstract: A nitride-based semiconductor light-emitting device capable of improving luminous efficiency by reducing light absorption loss in a contact layer is provided. This nitride-based semiconductor light-emitting device comprises a first conductivity type first nitride-based semiconductor layer formed on a substrate, an active layer, formed on the first nitride-based semiconductor layer, consisting of a nitride-based semiconductor layer, a second conductivity type second nitride-based semiconductor layer formed on the active layer, an undoped contact layer formed on the second nitride-based semiconductor layer and an electrode formed on the undoped contact layer.

Abstract: In a light emitting device, a light emitting element which includes a transparent substrate and a stack of GaN-based compound semiconductor layers formed on the first surface of the transparent substrate is mounted on a lead frame or a printed circuit board so that the transparent substrate is located on the side of the stack of GaN-based compound semiconductor layers opposite to the lead frame or the printed circuit board. The second surface of the transparent substrate opposite to the first surface contains a portion inclined with respect to the first surface. Alternatively, an optical member is arranged in contact with the second surface of the transparent substrate, where a surface of the optical member located on the opposite side to the transparent substrate contains a portion inclined with respect to the first surface of the transparent substrate.

Abstract: To optimize chromaticity of light in a light-emitting device comprising light-emitting layers. A light-emitting device comprises light-emitting layers 14 and electrode layers 16. The light extracted from the light-emitting device includes the light, which is incident from the light-emitting layers 14 to the electrode layers 16. The film thicknesses of the electrode layers 16 (transparent layers 18) are set so that the chromaticity of the extracted light approaches a predetermined value.

Abstract: Back facet reflections are substantially minimized in a tilted, ridge wave-guide SLD. One end of the wave-guide terminates at the front facet and the other end terminates proximate, but not necessarily at, the back facet. The back facet termination includes a radiating structure causing light to dissipate prior to striking the rear facet.

Abstract: Light emitting diodes are provided with electrode and pad structures that facilitate current spreading and heat sinking. A light emitting diode may be formed as a die with a stacked structure having a first region and a mesa projecting from a surface of the first region. A first electrode may substantially cover the mesa and have a plurality of pads disposed thereon maximizing a contact area in relation to the first electrode. A second electrode may be disposed as a trace on the surface of the first region, the trace having a spiral, segmented/interdigitated, loop or pattern. Optionally, the trace includes corner spikes projecting outwardly toward edges of the first electrode.

Abstract: A light emitting device includes a semiconductor light emitting device chip having a top surface and a side surface, a wavelength-converting material overlying at least a portion of the top surface and the side surface of the chip, and a filter material overlying the wavelength-converting material. The chip is capable of emitting light of a first wavelength, the wavelength-converting material is capable of absorbing light of the first wavelength and emitting light of a second wavelength, and the filter material is capable of absorbing light of the first wavelength. In other embodiments, a light emitting device includes a filter material capable of reflecting light of a first wavelength and transmitting light of a second wavelength.

Abstract: A mask layer with an opening is formed on a main surface of a silicon substrate, which is exposed in the opening. Then, a hexagonal pyramidal island-shaped portion is formed from a first semiconductor nitride in the opening to complete a semiconductor element structure.

Abstract: An object of the present invention is to provide an electronic circuit device capable of reducing the occurrence of electromagnetic waves accompanying the propagation of a signal. The electronic circuit device comprises a plurality of transparent substrates, on which an optical sensor and an optical shutter are formed. An optical signal is inputted from the external into the electronic circuit device, and the optical signal is directly irradiated on the optical sensor disposed on the transparent substrate, or the optical signal is transmitted through the transparent substrate and inputted into an optical sensor on the other substrate. The optical sensor converts the optical signal into an electric signal, and the circuit disposed on the substrate is operated. The optical shutter is controlled by the output of the circuit, the light is inputted from the external into this optical shutter, and whether the light has been transmitted or not is determined, thereby taking out the signal.

Abstract: There exists a need in the art for an IC package that prevents the popcorn effect through every process step in forming an electronic device, as well as during operation of the device. This need is met by an integrated circuit package and a method of manufacturing an integrated circuit package which, during dispensing of an adhesive layer includes at least one via formed by dispensing the adhesive layer in a pattern such that it enables the release of vapor trapped in the integrated circuit package after the attachment of the heat spreader.

Abstract: A heterojunction bipolar transistor (HBT) is disclosed that includes successive emitter, base and collector and sub-collector epitaxial layers and emitter, base and collector contact metals contacting the emitter, base and sub-collector layers respectively. A passivation material is included that covers the uncovered portions of the layers and covers substantially all of the contact metals. The passivation material has a planar surface and a portion of each of the contact metals protrudes from the surface. Planar metals are included on the planar surface, each being isolated from the others and in electrical contact with a respective contact metal. A method for fabricating an HBT is also disclosed, wherein successive emitter, base, collector and sub-collector epitaxial layers are deposited on a substrate, with the substrate being adjacent to the sub-collector layer.

Abstract: Contacts for a nitride based transistor and methods of fabricating such contacts provide a recess through a regrowth process. The contacts are formed in the recess. The regrowth process includes fabricating a first cap layer comprising a Group III-nitride semiconductor material. A mask is fabricated and patterned on the first cap layer. The pattern of the mask corresponds to the pattern of the recesses for the contacts. A second cap layer comprising a Group III-nitride semiconductor material is selectively fabricated (e.g. grown) on the first cap layer utilizing the patterned mask. Additional layers may also be formed on the second cap layer. The mask may be removed to provide recess(es) to the first cap layer, and contact(s) may be formed in the recess(es). Alternatively, the mask may comprise a conductive material upon which a contact may be formed, and may not require removal.

Abstract: A high electron mobility transistor comprises a GaN-based electron accumulation layer formed on a substrate, an electron supply layer formed on the electron accumulation layer, a source electrode and a drain electrode formed on the electron supply layer and spaced from each other, a gate electrode formed on the electron supply layer between the source and drain electrodes, and a hole absorption electrode formed on the electron accumulation layer so as to be substantially spaced from the electron supply layer. Since the hole absorption electrode is formed on the electron absorption layer in order to prevent holes generated by impact ionization from being accumulated on the electron accumulation layer, a kink phenomenon is prevented. Good drain-current/voltage characteristics are therefore obtained. A high power/high electron mobility transistor is provided with a high power-added efficiency and good linearity.

Abstract: HBTs in an HBT array are configured non-linearly, i.e., staggered, thus reducing the impact of thermal coupling between adjacent HBTs in the array and bypassing the minimum collector-to-collector spacing design rules required for a linear HBT array. Using this non-linear configuration, adjacent HBTs are misaligned with respect to each other. In a preferred embodiment, adjacent HBTs in the array are configured in a corner-to-corner arrangement, and in a more preferred embodiment, the collectors of the adjacent HBTs are aligned or are common, i.e., the collector of one HBT is shared with the collector of an adjacent HBT. In a most preferred embodiment, the HBTs are ballasted in an emitter-ballast/base-ballast pattern (referred to as “mixed ballasting” or “dual-ballasting”).

Abstract: A transistor includes a base, a collector, and an emitter comprising a group III/VI semiconductor. Microcircuits having at least one metal oxide semiconductor (MOS) transistor and the previously described transistor are provided. Processes for manufacturing a transistor and a BiMOS microcircuit are also provided.

Abstract: A semiconductor device includes a low resistance semiconductor substrate, a high resistance semiconductor layer formed on the substrate, an insulation layer formed on the semiconductor layer, and a transistor element composed of a collector region, abase region, and an emitter region formed in the semiconductor layer. The device further includes an emitter electrode formed in the insulation layer to be connected to the emitter region, a sub-emitter electrode formed in the insulation layer connected to the emitter electrode, a low resistance impurity-diffusion region formed in the semiconductor layer such that the sub-emitter electrode is connected to the substrate through the impurity-diffusion region, a base electrode formed in the insulation layer to be connected to the base region, and a base-bonding pad formed on the insulation layer to be connected to-the base electrode.

Abstract: An N−-type silicon substrate (1) has a bottom surface and an upper surface which are opposed to each other. In the bottom surface of the N−-type silicon substrate (1), a P-type impurity diffusion layer (3) of high concentration is entirely formed by diffusing a P-type impurity. In the upper surface of the N−-type silicon substrate (1), a P-type isolation region (2) is partially formed by diffusing a P-type impurity. The P-type isolation region (2) has a bottom surface reaching an upper surface of the P-type impurity diffusion layer (3). As viewed from the upper surface side of the N−-type silicon substrate (1), the P-type isolation region (2) is formed, surrounding an N− region (1a) which is part of the N−-type silicon substrate (1). The N− region (1a) surrounded by the P-type isolation region (2) is defined as an element formation region of the N−-type silicon substrate (1).

Abstract: This invention describes circuit techniques providing a means for achieving reliable data retention and low leakage current in single step latches with switch transistors. The techniques require changes only in the circuit configuration. Neither higher cost technology such as multiple-threshold LVT/HVT transistors nor special control circuits are needed.

Abstract: An enhanced light extraction OLED device including a transparent substrate; light scattering layer disposed over a first surface of the transparent substrate; a transparent first electrode layer disposed over the light scattering layer; an organic EL element disposed over the transparent first electrode layer and including one or more organic layers but at least one light emitting layer in which light is produced; and a transparent second electrode layer disposed over the organic EL element.

Abstract: An apparatus for interfacing an integrated circuit with external circuitry includes a transistor having an emitter coupled to a node for receiving a control current (IP) from the integrated circuit. A beta compensator disposed within the integrated circuit provides a compensating current (IM) to the node. The compensating current IM is proportional to a base current (IB) of the transistor. A method of interfacing the integrated circuit with external circuitry includes the step of providing the control current (IP) from the integrated circuit to a node coupled to a transistor emitter. A compensating current (IM) is provided to the node in response to the transistor base current (IB). The net node current provided to the emitter is IP+IB so that the transistor collector current is substantially the same as the control current. The transistor collector is coupled to the external circuitry.

Abstract: A discrete semiconductor device (1) is vertically sandwiched between an upper wall of a case body (5) and a case bottom plate (7) to be fixed inside a case. The discrete semiconductor device (1) is fitted in the case to be positioned on a predetermined portion inside the case with high accuracy. A space defined by a side surface of the discrete semiconductor device (1) and an inner wall of the case forms a duct (9) for a coolant used for cooling the discrete semiconductor device (1). The discrete semiconductor device (1), except main electrodes (2A and 2B) and signal terminals (3), is immersed in the coolant. With this structure provided is a power semiconductor device which allows an increase in radiating efficiency of a power semiconductor element and reduction in manufacturing cost.

Abstract: A voltage generation circuit of the invention applied for a non-volatile semiconductor memory device has a memory cell array including multiple non-volatile memory elements. The voltage generation circuit includes a booster circuit having at least a first booster module that boosts a power supply voltage and outputs a first boosted voltage corresponding to either of a program mode and an erase mode, and a second booster module that boosts the power supply voltage and outputs a second boosted voltage, which is different from the first boosted voltage, corresponding to a verify mode.