Abstract: A master clock signal source (10) generates a master clock signal having a frequency equal to N times the bit rate of received data, where N is a positive integer. A modulo-N counter (12) counts the master clock signal. An edge detecting circuit (4) detects a transition of the received data from a H level to a L level. A counter (8) counts the master clock signal and resets the modulo-N counter (12) if the count counted during a time period in which three edge representative signals occur is 2N. In accordance with the count in the modulo-N counter 12, a clock generating unit 14 generates a clock signal.

Abstract: A flip-flop is disclosed. The flip-flop includes a first latch for receiving at least one bit and a second latch coupled to the first latch for storing the at least one bit from the first latch. The size of the second latch is minimized to reduce power consumption. The flip-flop also includes a multiplexor coupled to the first latch and to the second latch for outputting the at least one bit from the first latch, when a clock to the multiplexor is active and for outputting the at least one bit from the second latch when the clock is inactive. A system and method in accordance with the present invention optimize power consumption in a flip-flop through the use of a multiplexor for the output function. As a result, the size of the slave latch can be minimized, which reduces the overall power consumption of the device.

Abstract: A threshold voltage of a transistor is fluctuated because of fluctuation in film thickness of a gate insulating film or in gate length and gate width caused by differences of used substrates or manufacturing steps. In order to solve the problem, according to the present invention, there is provided a clocked inverter including a first transistor and a second transistor connected in series, and a compensation circuit including a third transistor and a fourth transistor connected in series.

Abstract: A flexible wireless MEMS microphone includes a substrate of a flexible polymeric material, a flexible MEMS transducer structure formed on the substrate by PECVD, an antenna printed on the substrate for communicating with an outside source, a wire and interface circuit embedded in the substrate to electrically connect the flexible MEMS transducer and the antenna, a flexible battery layer electrically connected to the substrate for supplying power to the MEMS transducer, and a flexible bluetooth module layer electrically connected to the battery layer. The flexible MEMS transducer includes a flexible substrate, a membrane layer deposited on the substrate, a lower electrode layer formed on the membrane layer, an active layer formed by depositing a piezopolymer on the lower electrode layer, an upper electrode layer formed on the active layer, and a first and a second connecting pad electrically connected to the lower and upper electrode layers, respectively.

Abstract: A mixer circuit is composed of a differential amplifier circuit and a DBM circuit. The differential amplifier circuit has a first bipolar transistor, a second bipolar transistor, a first resistor provided between the respective bases of the first and second bipolar transistors, and a capacitor provided between the base of the second bipolar transistor and the ground. Since the first resistor and the capacitor are provided such that the circuit undergoes RC oscillation in response to the third harmonic of an input signal, the third and higher-order harmonics can be reduced.

Abstract: A timing generator for use in a semiconductor tester is disclosed. The timing generator includes a delay line having a plurality of delay elements with respective phase-shifted outputs and a multiplexer. The multiplexer includes a plurality of inputs for receiving the phase shifted outputs, and an output. The multiplexer further includes a plurality of switch circuits corresponding to the input circuits and disposed between each input circuit and the output to selectively isolate each input circuit from the output. The timing generator also includes phase detection circuitry for detecting the phase shift between the multiplexer output and a reference signal.

Abstract: A high frequency switch configured particularly with two FET switches. One end of a second FET switch is connected between an I/O port and a reception port and the other end is ground. A strip line is connected between the second FET switch and the I/O port, and has the electrical length equivalent to {fraction (1/4 )} wavelength of the high frequency signal input from a transmission port.

Abstract: A semiconductor integrated circuit device includes a logic circuit to perform a predetermined process, a clock generator to supply a clock signal to the logic circuit, and a speed controller to control the operation speed of the logic circuit. The clock generator changes the frequency of the clock signal by a frequency control signal during a time when the logic circuit is operating, and the speed controller controls the operating speed of the logic circuit in accordance with a change in the clock signal.

Abstract: A charge pump includes a plurality of capacitors that are alternately charged and serially coupled. When serially coupled, the voltage across a given capacitor will equal the voltage at its negative terminal and the voltage across the preceding capacitor.

Abstract: An integrated semiconductor circuit has a potential detector for detecting a potential boosted by a high voltage generator. One terminal of a first capacitor is connected to a potential detection terminal via a first switching device, the other terminal thereof being connected to a reference potential terminal. A terminal of a second capacitor is connected, via a second switching device, to a first node at which the first switching device and the first capacitor are connected, the other terminal thereof being connected to the reference potential terminal. A third switch is connected between a second node at which the second switching device and the second capacitor are connected and the reference potential terminal. A clock generator generates clock signals to simultaneously and periodically turn on the first and the third switching devices whereas turn on the second switch periodically in an opposite timing for the first and the third switching devices.

Abstract: The semiconductor device includes a first current mirror circuit combining analog power sources and digital power sources to receive small amplitude signals and constant-voltage input signals, a second current mirror circuit for receiving a signal output from the first current mirror circuit and for level-converting the signal from analog power source to digital power source, a first node provided in the first current mirror circuit, a second node provided in the second current mirror circuit, and an inverter circuit for receiving a signal output on the basis of the voltage levels of the first node and the second node and for outputting a CMOS level signal.

Abstract: A loop filter and a method for adjusting its compensating current to make a control voltage of the loop filter more stable. The loop filter includes a charge/discharge path for receiving a control current and constituted by a first resister and a capacitor, a second resistor connected to the first terminal of the first resistor, an OP amplifier having an output terminal connected to the second resistor, a first input terminal connected to the capacitor, and a second input terminal, and a compensating unit connected to the output and second terminals of the second resistor. The loop filter further comprises a current source to provide a compensating current to the compensating unit. The loop filter utilizes the compensating unit to compensate the offset between the two input terminals of the amplifier. Therefore, the loop current of the OP amplifier can be reduced or eliminated.

Abstract: A detecting circuit (REFH, CM11, LA1, TN1, RN1) which detects an overcurrent flowing through a power-MOS transistor (401) in an output stage to output a first signal (ITN1) is disposed in a first driving circuit (303H) on the side of a high-side driver. Another detecting circuit (REFL, CM21, LA2, TN2, RN2) which detects an overcurrent flowing through a power-MOS transistor (402) in the output-stage to output a second signal (ITN2) is disposed in a driving circuit (303L) on the side of a low-side driver. The first signal (ITN1) is converted to a third signal (ITT2) based on a negative power supply (VPP−), by a signal converting circuit. The third signal is added to the second signal. In response to the addition signal, a pulse signal to be input to the driving circuits (303H and 303L) is blocked.

Abstract: The signal amplifier of this invention includes a noise amplifier that amplifies a difference between a first ground potential and a second ground potential, and an adding amplifier that superposes an analog input signal on an output potential of the noise amplifier, and amplifies a difference between the first ground potential and a potential having the analog input signal and the output potential superposed. Thus, the adding amplifier superposes the noises amplified by the noise amplifier on the analog input signal, and thereafter amplifies the difference between the first ground potential and the potential thus superposed. Thereby, the signal amplifier is able to amplify only the analog input signal, without amplifying the noises of the first ground potential or the second ground potential.

Abstract: A variable gain amplifier of low amplitude distortion, and low noise, having a large variable range, is provided. A variable gain differential amplifier that controls a gain by use of bias current is used as each of unit amplifiers (VGAs) making up the variable gain amplifier. A large variable gain range is obtained by series-connecting a plurality of the variable gain differential amplifiers. An attenuator is installed on the input side of the unit amplifier (VGA) at least in the initial stage. By doing so, it becomes possible to prevent amplitude distortion from occurring to the respective VGAs. An attenuator utilizing voltage division by capacitors, generating no noise, is used for lowering noise. Further, the variable gain amplifier is provided with a fixed gain amplifier installed in the final stage as necessary in order to obtain a total gain as desired.

Abstract: The controller controls the amplifier and a modulated power supply, supplying power to the amplifier, by detecting an RF envelope of a signal input to the amplifier. Predistortion of the amplifier synchronous with changes of bias is provided using a look-up table. Specifically, amplitude predistortion, phase predistortion and DC voltage level adjustments are made to the RF signal. Adjustments for gain and phase variation are applied synchronously with bias changes.

Abstract: An operational amplifier comprises: differential input stages to which differential signals can be inputted with full operating range; current source circuits coupled to determine current values of the differential input stages, phase inverter circuits which are provided between transistors of an output stage circuit and the current source circuits; a driver stage circuit and the output stage circuit. The phase inverter circuits control currents of the current source circuits depending on the output signal potential level. By using this structure, it becomes possible to realize a high slew rate throughout the full operating range.

Abstract: A sense transistor is placed in a current path between a reference voltage source and ground. The base terminal of the sense transistor is coupled to the base terminal of an amplifying transistor. Thus, current in the sense transistor corresponds to signal power output by the amplifying transistor. The sense current causes a sense voltage at the collector terminal of the sense transistor. This sense voltage is applied to one input of an error amplifier. The other error amplifier input receives a power control voltage. The error amplifier output is routed back to the base terminal of the amplifying transistor in a negative feedback loop, thereby keeping the power of the signal output by the amplifying transistor at a constant level. In some embodiments the error amplifier output is made independent of changes in the reference voltage. Multiple pairs of corresponding amplifying and sense transistors can be used.

Abstract: A phase-locked loop circuit has a DLL circuit in a stage preceding an analog PLL circuit. The DLL circuit detects a phase difference between a reference clock signal and a feedback signal, changes the detected phase difference to a phase difference increased so as to be greater than a steady state phase error which the analog PLL circuit has, and supplies the resultant phase difference to the analog PLL circuit. While the phase difference between the reference clock signal and the feedback signal is being detected by the DLL circuit, the analog PLL circuit operates to reduce the increased phase difference to the steady state phase error. As a result, the phase difference between the reference clock signal and the feedback signal is reduced to a sensitivity limit of a phase comparator in the DLL circuit.

Abstract: A circuit comprises a frequency synthesizing circuit with a voltage-controlled oscillator whose frequency is preset to a preset value. The voltage-controlled oscillator generates an oscillating signal in response to an input voltage. The frequency synthesizing circuit is configured to operate in a locked loop mode under control of an error signal representative of a phase frequency differential between the divided oscillating signal and a reference signal. A digital processing unit can disable the frequency synthesizing circuit to operate in phase locked loop mode. Once the synthesizing circuit is disabled, the digital processing unit determines a first and a second frequency of the oscillating signal in response to respective first and second loop filter input voltage values. The unit further generates a control value from the two frequencies, the frequency divider dividing ratio and the reference signal.

Abstract: In a frequency multiplier and a method of multiplying a frequency of an external clock signal, a data output buffer, and a semiconductor device including the frequency multiplier and the data output buffer, the frequency multiplier receives an external clock signal having a predetermined frequency and outputs an internal clock signal having greater frequency than the predetermined frequency. In the semiconductor device, the data output buffer outputs data tested in response to test data. Therefore, it is possible to test a plurality of memory cells at a time by using a clock signal having a low frequency. In addition, the time and cost required for the test can be greatly reduced, and conventional testing equipment that operates at a relatively low frequency can be effectively used.

Abstract: A process monitor circuit useful for integrated circuit designs to provide manufacturing process tests for SRAM circuit structures incorporated in an integrated circuit design. In one aspect of the invention, the process monitor cell includes a plurality of SRAM circuit cells chained together in a manner to permit testing of a desired range of SRAM transistor power and a desired range of associated propagation delays. The process monitor cell thereby provides an accurate estimate of the quality of the fabrication process used to generate other functional SRAM cells within the integrated circuit design.

Abstract: The object to the present invention is to provide a magnetron which can reduce spurious oscillation such as the &pgr;-1 mode which presents a problem particularly in magnetrons and can reduce spurious radiations without placing filters. The magnetron of the present invention includes an anode 1 formed by plural vanes 12 in such a manner that inner ends 12 are radially extended toward the center of the anode shell 11 from the inner wall of a cylindrical anode shell, and a cathode 2 provided at the center of the anode 1. The magnetron of the present invention further includes a pair of pole pieces 4 provided in such a manner that a magnetic field can be applied on the interaction space 2 where the inner ends 12a of the vanes 12 and the cathode 2 face with each other.

Abstract: An object of the present invention is to provide an oscillator contributing to a reduction of power dissipation. An oscillator 10 comprises four inductors 11—1, 11—3, 11—2, and 11—4 connected in series to constitute a closed circuit, and four capacitors 12—1, 12—3, 12—2, and 12—4 one ends of which are connected to nodes that are connecting points of the inductors, and another ends of which are held at a power supply VDD. The oscillator 10 is formed on a semiconductor substrate.

Abstract: A mechanical oscillator is provided for use in micro-electromechanical systems (MEMS) for application in radio frequency filters and oscillators, motion and pressure sensors and other micro applications. The oscillator is of monolithic construction and has a high Q with little energy loss because of teeth attached to the oscillating member which contain energy and prevent losses.

Abstract: A feedback oscillator device formed with an integrated circuit having a semiconductor material substrate on a ground plane. The circuit has an amplifier having an input and an output is provided at least in part on said semiconductor material substrate. A directional coupler is used to couple the amplifier output signal to the amplifier input through a parallel separated transmission lines transfer system and a capacitor such as a varactor. The substrate can be of gallium arsenide.

Abstract: An electronic module configured to suppress electromagnetic radiation is disclosed. The electronic module has a plurality of electronic components disposed therein. The module includes a module housing, a circuit board, and a plurality of capacitors. The module housing is made of an electrically conductive material. The circuit board has a ground plane and is fixed to the module housing. The plurality of capacitors are coupled at first end to the ground plane and at a second end to the housing. Further, the capacitors are connected electrically in parallel and are uniformly spaced within the electronic module.

Abstract: The present invention relates to a method for tuning a radio filter. The filter comprises an input connection, an output connection and at least two resonator modules coupled in cascade, each having a running mechanism and a probe. A first resonator module is connected to the input connection and a final resonator module is connected to the output connection. The filter is adapted to receive at least one signal within a frequency range. The method comprises essentially two steps: coarse tuning, which is dependent on the frequency content of the received signal(s), and fine tuning, which is dependent on a calculated deviation between a set value vector and a measured signal parameter vector. A relationship between the set value vector and the signal parameter vector is established for calculating the deviation. The invention also relates to a radio filter and a system comprising such a radio filter.

Abstract: A high power amplifier has a first balun propagating a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal; first and second power amplifier circuits connected to the first and second opposite-phase output terminals of the first balun and having the same characteristics;a third power amplifier circuit connected to the in-phase output terminal of the first balun and having output power substantially twice as much as the output power of the first or second power amplifier circuit; and a second balun having first and second opposite-phase input terminals for receiving the outputs of the first and second power amplifier circuits, having an in-phase input terminal for receiving the output of the third power amplifier circuit, combining the outputs of th

Abstract: An ADSL subscriber loop equalizer architecture 100 employs a circuit having a capacitor 102 connected to ground as a basic building block; where the capacitor 102 is much smaller than equivalent capacitors that must be employed using known ADSL CP subscriber loop equalizer architectures. The ADSL subscriber loop equalizer is adaptive to provide different levels of equalization in response to a selector switch setting.

Abstract: A discontinuity, such as a via, in a signal transmission line can introduce a parasitic element that affects the signal transmission. The method in accordance with embodiments of the present invention are directed to counteracting the transmission line parasitic element discontinuity. The method includes determining the amount of parasitic capacitance or inductance that is introduced at a portion of the transmission line, such as by the via. A suitable amount of delay is introduced to the transmission line by way of correction impedance in order to counteract the affects of the parasitic element. The delay is calculated taking into account at least in part the correction impedance and the parasitic element effect. The correction impedance is suitably added to a portion of the transmission line at which the parasitic element is present.

Abstract: A four port hybrid microstrip circuit of modified Lange type, comprising a microstrip pattern including a first strip conductor between an input port (P1) and a direct port (P2) and a second strip conductor between an isolated port (P3) and a coupled port (P4). These two conductors are divided into parallel sections being mutually interdigitated and divided ibnto two parts (10,20) located side by side to each other.

Abstract: The present invention provides a surface acoustic wave filter and others that reduce ripples in a reception frequency band while ensuring sufficient attenuation in a transmission frequency band. A surface acoustic wave filter includes a surface acoustic wave resonator that allows a reception frequency band to pass while attenuating a transmission frequency band, and a surface acoustic wave filter connected in series with the surface acoustic wave resonator to allow the reception frequency band to pass while attenuating the transmission frequency band. An inductor is connected to one end of the surface acoustic wave resonator, a connection point between the surface acoustic wave filter and the surface acoustic wave resonator, and/or the other end of the surface acoustic wave resonator.

Abstract: A thin film resonator comprising a piezoelectric material and having a controllable or tunable resonant frequency. The resonator is formed on a substrate having a cavity formed therein below the piezoelectric film material. A bending electrode is disposed within the cavity and the application of a voltage between the bending electrode and one of the resonator electrodes, creates an electric field that causes the substrate region to bend. These stresses caused by the bending are transferred to the thin film resonator, subjecting the piezoelectric film to stresses and thereby changing the resonant properties of the thin film resonator.

Abstract: A surface acoustic wave device includes a Y-cut, X-propagation LiTaO3 substrate, at least one interdigital transducer provided on the LiTaO3 substrate and made of Al or a metal containing Al as a major component, and an SiO2 film provided on the surface of the LiTaO3 substrate so as to cover the interdigital transducer, wherein the thickness Hs of the SiO2 film normalized by the wavelength &lgr; of a surface acoustic wave and the cut angle &thgr; of the LiTaO3 substrate are set to be in any one of the ranges represented by formulae (1) to (8):

Abstract: A surface acoustic wave device includes a LiNbO3 substrate with a Euler angle in an area defined by a rectangle having four comers with coordinates (1) (0°, 7°, 101°), (2) (0°, 23°, 79°), (3) (0°, 23°, 79°), and (4) (0°, 7°, 79°), for example, and an electrode film made of Au, wherein surface acoustic waves including a longitudinal wave component as a main component are propagated thereon. The surface acoustic wave device uses longitudinal surface acoustic waves having a phase speed greater than with the “slow transverse wave”, and has a great electromechanical coupling coefficient and small propagation loss, and is suitable for handling high-frequency signals.

Abstract: A multilayer ceramic structure (30) includes a first ceramic layer (32), a second ceramic layer (34) adjacent to the first ceramic layer, and a transmission line (38) formed between the first and second ceramic layers. The transmission line includes first and second portions (44, 46) having a first width, third and fourth portions (47, 48) formed between the first and second portions and having a second width that is narrower than the first width, and a fifth portion (49) formed between the third and fourth portions. A probe (40), comprising a conductively filled via, is attached at one end to the fifth portion, the probe passing through the second ceramic layer for providing a test point (42). The structure compensates for return loss induced by the probe.

Abstract: Structures and methods are provided for dual referenced microstrip structures having low reference discontinuities between a microstrip trace referenced to a primary reference plane as compared to a microstrip trace referenced to a secondary reference plane.

Abstract: A switching system includes a first transistor having a first gate and coupled between a first terminal and a second terminal and a second transistor having a second gate and coupled between the second terminal and a third terminal. The first transistor and the second transistor are configured to conduct a signal current between the first terminal and the third terminal. An impedance component coupled to the first gate and the second gate is configured to isolate a first gate signal voltage at the first gate or isolate a second gate signal voltage at the second gate to reduce a distortion of the signal current.

Abstract: A microelectromechanical device is provided which includes a beam configured to apply an opening force on a closed switch. The opening force may be substantially independent of a force stored in the closed switch. A combination of the force applied by the beam and the force stored in the closed switch may be sufficient to open the switch after removal of a force associated with actuation of the switch. Another microelectromechanical device includes a switch beam spaced above a closing gate and a contact structure. The device may also include an additional beam configured to apply a force on the switch beam in a direction away from the contact structure. A method for opening a switch includes reducing an attractive force between a switch beam and a closing gate. The method also includes externally applying a mechanical force on the switch beam in a direction away from the closing gate.

Abstract: A circuit breaker includes a movable contact, a fixed contact, a switching device, a switching operation handle, and an over-current tripping device. The switching device has a switching lever connected to the handle, a toggle linkage having an upper link and a lower link for connecting to the movable contact, a tripping mechanism for activating the toggle linkage in response to over-current, and an operation spring tightly stretched between the switching lever and the toggle linkage. A locking member is provided in the switching device for interconnecting the toggle linkage and the switching lever and for restricting a movement range of the switching lever according to an operational position of the toggle linkage. When main-circuit contact points are stuck, the locking member restricts the movement of the switching lever and prevents the handle from moving to the OFF position.

Abstract: A 3-line balun transformer which has a simple structure and is easy to design and manufacture. The balun transformer comprises an unbalanced port for inputting or outputting an unbalanced signal, first and second balanced ports for outputting or inputting balanced signals, respectively, the balanced signals being the same in level and 180 degrees out of phase with each other, a first line having its first end connected to the unbalanced port and its second end connected to ground, a second line arranged in parallel with the first line while being spaced apart from the first line by a predetermined distance, the second line having its first end and its second end connected to the first balanced port, and a third line arranged in parallel with the second line while being spaced apart from the second line by a predetermined distance, the third line having its first end connected to the first end of the second line and its second end connected to the second balanced port.

Abstract: The present invention is characterized in that, in a powder magnetic core obtained by compaction of an iron-based magnetic powder covered with an insulation film, a saturation magnetization Ms is Ms≧1.9 T in a 1.6 MA/m magnetic field; a specific resistance &rgr; is &rgr;≧1.5 &mgr;&OHgr;m; a magnetic flux density B2k is B2k≧1.1 T in a 2 kA/m magnetic field; and a magnetic flux density B10k is B10k≧1.6 T in a 10 kA/m magnetic field. In accordance with the present invention, it has been possible to industrially carry out compacting iron-based magnetic powders under remarkably high compacting pressures. As a result, high-performance powder magnetic cores are obtained which have a high density, and which are good in terms of the specific resistance and magnetic permeability.

Abstract: A linear actuator includes a first yoke part, a second yoke part opposing the first yoke part from a direction perpendicular to the axial direction thereof, an intermediate yoke part forming a first gap and a second gap, a coil disposed within a space delineated by the intermediate yoke part and the second yoke part, which forms a magnetic field between the first yoke part and the intermediate yoke part. The orientation this magnetic field is opposite between the first gap and the second gap, and orientation thereof alternates. The actuator further includes a magnet at one axial-direction end relative to the coil, which generates a fixed magnetic field in the two gaps, directed either from the intermediate yoke part toward the first yoke part or from the first yoke part toward the intermediate yoke part, and an armature disposed that is movable in the axial direction in the first gap and the second gap.

Abstract: A superconducting transformer includes two pairs of axially extending windings (1, 2, 3 and 4). The windings are each in the from of a right cylindrical solenoid having a circular cross-section which are substantially concentrically nested. Each winding (1, 2, 3 and 4) includes a plurality of turns formed from superconducting tape. Each winding respectively includes a first end and a second end (5 and 6, 7 and 8, 9 and 10, and 11 and 12) which are configured for electrical connection with at least one of the other ends, and alternating power source (13), a load (14), or other passive or active electrical components. The ampere turns of a first pair of the windings (1 and 3), is substantially the same as the ampere turns of a second pair of the windings (2 and 4).

Abstract: A magnetic clamping arrangement (10) for holding the arrangement, and in particular a body (5), operably clamped with respect to a ferromagnetic surface (6) by way of a body datum face (8), comprises housing means (12) mounted on the body, and electromagnet (16) carried by the housing means. The electromagnet comprises a core (18), having three limbs 20.1, 20.2 and 20.3, each terminating in a pole face 22.1, 22.2 and 22.3, being formed by a plurality of ferromagnetic transformer laminations (26). stacked together and slideable with respect to each other in a direction to and from the pole faces. Lamination bias means (36), in the form of masses 38, 40.1 and 40.2 of resilient compressible material, delined quiescent pole faces from which individual laminations may depart by sliding when forced against a surface having ridges and/or grooves extending in the lamination planes, but exerts a restoring force on such laminations so displaced.

Abstract: An inductive device (10) comprises a magnetic core (16) including a portion of a plurality of wires (18), an electric winding (20) extending around said magnetic core, with one or more of the plurality of wires (18) at least partially encircling the electric winding (20) and having first and second end portions (26) arranged so as to form a gap (24) therebetween, and a flux coupling structure (28) disposed in a vicinity of the gap (24) so as to enhance coupling of magnetic flux between the first and second end portions (26).

Abstract: A stacked coil device comprising: an inner electrode layer formed of at least two layers and having a non-magnetic electrode layer and an inner magnetic layer as one unit, the non-magnetic electrode layer provided with an opening at a center thereof and provided with an electrode pattern on at least one surface of an upper surface and a lower surface thereof and the inner magnetic layer positioned at the center opening and a lateral surface of the non-magnetic electrode layer; a cover layer in contact with both surfaces of the inner electrode layer; and an external electrode terminal partially and electrically connected to the electrode pattern.

Abstract: The conventional high voltage elements (1, 8) constituting it are located in such a way that the ground level (2) is situated in the central zone and from this zone the negative potential progressively increases towards one of the ends (3) while the positive potential progressively increases towards the opposite end (4). It is preferably applicable to radiogenic vessels (9), which also present the particular feature that all the elements constituting them present a voltage distribution identical to that of the transformer, in order to establish equipotential lines that do not require the incorporation of insulating elements, and which also enable the elements to be positioned very close to each other in such a way that the volume, its weight and its cost are considerably reduced.

Abstract: A current interrupter assembly includes an insulating structure, a current interrupter embedded in the structure, a conductor element embedded in the structure, a current interchange embedded in the structure and connected to create a current path between the current interrupter and the conductor element, and a semiconductive layer covering at least a portion of the conductor element so as to reduce voltage discharge between the conductor element and the structure.