Abstract: A switching power supply with overcurrent protection is provided that comprises a current detection resistor (8) for detecting electric current through an FET (5); a capacitor (11) for accumulating electric charge in response to overcurrent through the current detection resistor (8) due to late OFF switching of the FET (5); and a transistor (12) for reducing source voltage applied to a feed terminal of a control circuit (7) below an operation voltage. When accumulated electric charge in the capacitor (11) exceeds a predetermined level, the transistor (12) is operated to reduce source voltage for the control circuit (7) below operative voltage to stop operation of the control circuit (7) and to thereby restrain overcurrent during delayed time until OFF switching of the FET (5).

Abstract: A semiconductor integrated circuit device is disclosed that can provide greater flexibility of layout while essentially ensuring circuit characteristics, and at the same time providing an minimum electrostatic discharge breakdown withstand value according to Charged Device Model (CDM) at all input/output (I/O) terminals. For each I/O terminal a size of a CDM protective device can be optimized in response to reference electric potential wiring resistance between an input protective device, a MOSFETs that can constitute an internal circuit, and an input resistance.

Abstract: An active inductance circuit for ESD parasitic cancellation is described. A feedback circuit on a transconductance amplifier is utilized to transform and reflect the impedance of an active inductor to minimize effects of parasitics produced by ESD circuitry. The active inductance circuit may be programmably implemented, allowing tunable component values.

Abstract: An electrical switchgear device includes a conductor, a base, and a current sensor positioned to detect current in the conductor and attached to the base using a support element. The device also includes an apparatus mounted to the base to interrupt current through the conductor when a signal from the current sensor indicates a predetermined condition. A housing positioned on the base encapsulates the current sensor, the support element, the current interrupting apparatus, and a portion of the conductor.

Abstract: A compressor terminal fault interruption method and interrupter for disconnecting power to a compressor terminal when terminal venting failure is imminent including a current sensing circuit for sensing current provided to the terminal by a power source and outputting a sensed signal representing the current provided to the terminal and a control circuit. The control circuit includes a first circuit for outputting a reference signal representing input current much higher than locked rotor current, a second circuit connected to the current sensing circuit and the first circuit for comparing the sensed signal to the reference signal, and a third circuit connected to the second circuit for disconnecting power to the terminal when the sensed signal exceeds the reference signal, thereby preventing excessive current from reaching the compressor terminal.

Abstract: A distributive capacitor 205 and impedance matching network 201 and transmitter 101 that use the capacitor and are suitable for high density integration applications include a printed circuit substrate 303 comprising one of a printed circuit board and a silicon based substrate, a first conductive layer 305 disposed on the printed circuit substrate, a layer of dielectric material 307 disposed on the first conductive layer and having a thickness, the dielectric material having a dielectric constant more than five times greater than the dielectric constant of the printed circuit substrate; and a second conductive layer 309 disposed on the layer of dielectric material and having a second length 311 and a second width 603 that are selected so that the distributive capacitor operates as a transmission line.

Abstract: An electrostatic discharge ESD protection circuit is provided which can selectively be set to operate with a buffer which is programmably controlled to be compatible with different types of circuitry, such as PCI, GTL, or PECL circuits. The ESD circuit includes a lateral NPN BJT transistor which provides a path to ground during ESD without experiencing the gate oxide damage of a typical MOS type device. Additional BJTs are included in Darlington-pair configuration to connect the pad to the lateral BJT during an ESD event and not experience oxide damage. An additional BJT is included along with a series of diode connected transistors to selectively clamp the pad voltage. The pad voltage is clamped to a desired value by controlling fuses connecting the series of diode connected transistors.

Abstract: The present invention relates to demagnetizing objects in a fusion cake, objects used in vehicle construction, turbines, diesel engines and other equipment. A system of the present invention comprises four rectilinear working conductors in the shape of busbars which are assembled in pairs on each lateral side of the object to be treated over the whole length thereof, wherein said busbars are arranged one above the other at a distance determined by the object height. The system also comprises power supply modules and side working modules supporting the working busbars. Unipolar generator can be used for power supply. The side modules can be transformed to enable processing of objects having various widths, heights and lengths. The system can be transported over land, and, when the module bodies are made water-tight, it can be used for processing floating objects and transported by sea.

Abstract: Remote activation mechanism for equipment hold down and release, composed of a fixed base (1); a disk with capacity to rotate (2); a ring (3) subdivided in independent segments; a helical torsion spring (4) mounted around the segmented, being in one end joined to the fixed base (1) and the other end to the disk (2); a retainer (5) to attach the hardware, that passes through the fixed base (1) and has means to be blocked by the segmented ring (3); a disk blocking system; and a disk liberation system (2). The disk (2) can potentially rotate from a position in which the helical torsion spring (4) is loaded hugging radially the segmented ring (3), up to a position in which the helical torsion spring (4) is unloaded, allowing the ring segments move radially away to release the retainer (5). The disk blocking system can be based on rollers or balls (12) with possibility of being inserted partially in disk grooves or in crown grooves.

Abstract: A drive circuit is provided in a full H-bridge and half H-bridge configuration for controlling one or more piezoelectric fuel injectors. The drive circuit includes a voltage input for receiving a voltage signal, an energy storage device coupled to the voltage input for storing an electrical charge, a bidirectional current path coupled to one or more piezoelectric injectors, an inductor coupled in series with the piezoelectric injector(s) in the bidirectional current path, and switching circuitry for controlling current flow through the piezoelectric injector(s) and the inductor to open and close the piezoelectric injector(s). The switching circuitry is controlled to provide a recirculation current to recover energy stored in the piezoelectric injector(s) for storage in the energy storage device.

Abstract: An electrostatic chuck comprises a sample stage 9 provided with electrodes 1, 2 and 3 for applying n-phase alternating voltage wherein n is equal to or greater than 2, and a circuit for applying the n-phase alternating voltage. The present electrostatic chuck realizes smooth and speedy attraction/separation of the substrate without the need for a charge elimination process, and the present chuck solves the problem of substrate vibration.

Abstract: A wafer chuck used in manufacturing processes of integrated semiconductors and liquid crystal panels, more particularly, an electrostatic silicone rubber chuck for ion injectors used in an ion injection process.

Abstract: A high voltage capacitor has a monolithic body made of layers of dielectric material and further has first and second external contacts located on the body. First and second nonoverlapping electrodes electrically connected to the respective first and second contacts are located on respective first and second layers of dielectric material within the body. A floating electrode not connected to either of the contacts is located on a different, third layer of dielectric material. The floating electrode overlaps the first and second electrodes and forms two serially connected capacitors therewith.

Abstract: A protective cover mounting apparatus for a hermetic compressor for removably mounting a protective cover to protect electrical parts disposed on a terminal portion of a hermetic compressor casing comprises a pair of first protrusions respectively formed on two facing sides of the protective cover for protecting electrical parts disposed on a terminal portion of a hermetic compressor casing, a second protrusion formed on a side that is removed from the casing when the protective cover is mounted on the casing, a clamp pivotably disposed on the casing and including a pressing portion and a holding portion formed to correspond to the first and second protrusions.

Abstract: A port replicator. The port replicator includes a housing, a transmission assembly, and a lift assembly. The transmission assembly, disposed in the housing, includes an engaging portion and a push unit. The push unit is moveably disposed on the housing. The engaging portion protrudes from the housing when the push unit is located at a first position. The engaging portion moves toward the housing when the push unit moves to a second position. The lift assembly, including a separation unit, is disposed in the housing in a manner such that it moves along with the transmission assembly. The separation unit is moveably disposed on the housing. The push unit moves to the second position to move the separation unit to a fourth position when the push unit is located in the first position and the separation unit is located at a third position.

Abstract: The present invention is to provide a network device having a parallelepiped housing comprising a plurality of slots on two opposite sides and two opposite edges at each of an underside and a top and a plurality of pads each fastened the slots to form a short distance between a supporting surface and the underside of the housing by the projected pad. Also, housings of the same type of network devices can be stacked or horizontally coupled together by fastening the pads in the slots to form a gap between two stacked housings by the coupled pads for dissipating heat of the housings therefrom.

Abstract: The invention relates to a disc drive system which includes cushioning material positioned between the interior of disc drive housing and a disc drive. Such a system advantageously provides a removable disc drive system which isolates shocks from the disc drive. The disc drive system includes a housing bottom, a mounting plate coupled to the housing bottom, and a disc drive coupled to the mounting plate via cushioning pieces.

Abstract: A chassis for circuit cards has a housing, a front end, a connector end, and a top cover. The housing has an airflow slot on its underside, and the top cover is open in nature, the combination of which allows the flow of forced convection air from top to bottom (or vice versa) to cool the circuit cards. The connector end has alignment pins which assist in blind mating of the chassis in difficult to access areas. Stabilizer rods, spacers and spacer brackets, made from stainless steel, hold the circuit cards in place and protect them from shock, vibration, and other trauma. The front end has a jacking type screw which enables one to exert sufficient pressure so that the greater than 200 I/O pins at the connector end are easily forced into receiving sockets.

Abstract: An integrated cooling unit configured to effect the removal of heat via a circulating liquid coolant includes a reservoir to contain the liquid coolant, a tubing arrangement disposed at an outer surface of the reservoir, a pump disposed within the reservoir, and a fan configured to provide a flow of air across the tubing arrangement to remove the heat. The tubing arrangement is fluidly communicable with a heat exchanging device, and the pump is configured to circulate the liquid coolant through the tubing arrangement to the heat exchanging device.

Abstract: A heat dissipation apparatus has an elongated heat conduit (such as a heat pipe) in thermal communication with a heat spreader for thermally contacting a heat-generating device. The heat spreader has a phase-change mechanism to spread heat within the heat spreader. In one implementation, the phase-change mechanism includes paths for heated vapor flow and cooled liquid flow.

Abstract: A heat-sinking apparatus (62, 64, 66, and 68) containing a light-transparent pane (72) is configured in a way that enables the pane to be brought into contact with a device (40) such as a semiconductor device without significantly damaging the pane. A main spreader body (120) of a heat spreader (66) in the heat-sinking apparatus preferably consists largely of copper and is connected to the pane, preferably consisting largely of diamond, by way of a combination of metals that facilitates heat transfer from the pane to the heat spreader.

Abstract: An apparatus for providing heat sinks or heat spreaders for stacked semiconductor devices. Alignment apparatus may be included for the alignment of the stacked semiconductor devices. An enclosure may be used as the heat sink or heat spreader.

Abstract: A heat-dissipating circuit board assembly is composed of a heat-conducting base board and a circuit board. The heat-conducting base board includes an insulating heat-conducting layer disposed thereon and a plurality of bonding pads disposed on the insulating heat-conducting layer and never connected with one another. The circuit board that is single-layered or multiple-layered includes a plurality of electronic components at at least one side thereof and a plurality of heat-dissipating zones at a side thereof. The heat-dissipating zones are connected with heat-generating elements of the electronic components and in a corresponding position to the bonding pads. The heat-conducting base board is connected with the heat-conducting base board by the melted bonding pads that are melted by heating and further disposed therebetween.

Abstract: A mounting assembly includes a mounting bracket (10) having a side panel (14), and a clip (40) attached on the side panel. A pair of through holes (18) is defined in the side panel. The clip includes a press portion (42), and a pair of palms (48) on opposite sides of the press portion. Each palm has barbs (49) extending toward the press portion. When the press portion is inwardly pressed, the clip elastically deforms, the palms move away from each other, and the palms extend through the through holes to be received in corresponding locking holes (32) defined in a corresponding data storage device (30). The barbs firmly engage with the storage device at the locking holes, thereby securing the storage device in the mounting bracket. When the press portion is inwardly pressed again, the storage device is unlocked from the mounting bracket.

Abstract: A multilayer ceramic electronic component includes a laminated ceramic body provided with terminal electrodes on side surfaces thereof and a cover for covering the laminated ceramic body. Ground terminal electrodes are provided in notches provided in opposed side surfaces opposing of the laminated ceramic body, a plurality of terminal electrodes is arranged in parallel in each of notches provided in the other side surfaces opposing each other. These terminal electrodes are formed by dividing terminal via hole conductors. The cover is disposed so as to cover elements mounted on the laminated ceramic body, and foot portions of the cover are disposed in the notches and are bonded to the ground terminal electrodes.

Abstract: A circuit card includes a key receptacle and at least one movable braking member, holding the circuit card in place within a card receptacle of an electronic device when a key is not fully inserted within the key receptacle. When the key is so inserted, the circuit card can be easily removed. Preferably, the key includes a releasable latch holding the key within the key receptacle.

Abstract: A system having a removable protective enclosure for an electronic component. The protective enclosure may have a base and a circuit board that may be captured by the base without use of a tool or a separate fastener. A memory module may be disposed on the circuit board. The protective enclosure may be adapted to be mechanically and electrically coupleable to an enclosure.

Abstract: A power feedforward amplifier uses integral cavities to provide RF isolation between subcircuits of the power amplifier. The chassis includes a main chassis body and a lid structure adapted to couple with the chassis body and define the subcircuit cavities. The inner lid includes an amplifier dividing wall and interstage walls adapted to isolate the main and error amplifier subcircuits of the feedforward power amplifier and further to isolate individual components of the subcircuits. In one embodiment, the amplifier subcircuits are mounted on a single circuit board and isolated from each other by the dividing wall. A delay line subcircuit portion is integral with the main chassis body and is coupled beneath the error amplifier subcircuit to contain and electromagnetically shield a delay line filter subcircuit while providing direct connection with the error amplifier.

Abstract: A fastening assembly, used for fixedly fastening a first and a second structure (1100, 1200) of a device together, comprises an anchoring block (1500), an insert plate (1400), and a screw (1300). The first structure is provided with a hole (1110). The anchoring block, fixedly arranged on the second structure, includes two parallel holding flanges (1510, 1512) and two parallel protruding ribs (1520), wherein the holding flange (1510) further includes a slot (15101). The protruding ribs extend approximately perpendicular to the two holding flanges on two sides thereof. The insert plate is held between the holding flanges, and is provided with a threaded hole (1410) and a pair of hooked clamping members (1420) that respectively tightly clamp the protruding ribs. The screw extends through the hole of the first structure and engages in the threaded hole of the insert plate to fixedly fasten the first and second structures of the device together.

Abstract: A system and method for distributing power to an integrated circuit. In one embodiment, a power laminate may be mounted to a printed circuit board (PCB). The integrated circuit for which power is to be distributed may be electrically coupled to the PCB. The power laminate may include one or more power planes and one or more reference (i.e. ground) planes, with each pair of power/reference planes separated by a dielectric layer. The power laminate may also include a connector or other means for receiving power from an external power source. The power laminate may be electrically coupled to the integrated circuit, thereby enabling it to provide core power to the integrated circuit. The power laminate may also include a voltage regulator circuit, and a plurality of decoupling capacitors. In one embodiment, the power laminate may include a plurality of apertures which allow for the passing of connections between the integrated circuit and the PCB.

Abstract: An electrical circuit arrangement provides a low power rectified low voltage from an AC line voltage. The circuit consists of two circuit blocks combined together via an intermediate circuit, of which the first circuit block contains a capacitive input stage for producing a voltage-limited intermediate voltage that is substantially less than the line voltage, and a second circuit block that contains an asymmetric half-bridge that receives the intermediate voltage and produces an AC voltage that is decoupled from the line voltage via a transformer that is operated at the substantially lower voltage. The output of the transformer is rectified to provide the low-level DC output.

Abstract: A DC power supply apparatus for supplying a DC power to a plasma generating device, includes: an input section for converting an inputted AC power into a DC power; a current type of inverter connected with a next stage of the input section; a transformer having a primary winding and a secondary winding, the primary winding being connected with the current type of inverter; a rectifying section for rectifying an AC power generated in the secondary winding of the transformer; and a smoothing circuit for smoothing the rectified power which is rectified by the rectifying section; wherein an electric energy to be supplied to the plasma generating device is controlled by controlling a switching operation of the current type of inverter as a current source.

Abstract: Circuit and method for controlling circuitry in a power converter device during a soft-start process is provided. Synchronous rectifier control circuitry is adapted to gradually apply a gate drive signal derived from the main switch of the power converter device to a freewheeling synchronous rectifier of the switching circuitry during the soft-start process. The control circuitry gradually releases the amplitude or the pulse-width of the gate drive signal to the freewheeling synchronous rectifier to avoid a large duty ratio in the synchronous rectifier during start-up so that a negative current does not build up in the output inductor.

Abstract: A low loss DC/DC converter uses the reset technique to reset the magnetizing current from the forward transformer during the OFF period, reducing voltage stress and extend the maximum work duty. The third winding reset circuit is an improved version of a conventional third winding reset circuit for a forward converter.

Abstract: A three phase alternating current generator-motor that serves as a starter motor or the alternator includes switching elements for controlling current. When the three phase alternating current generator-motor generates electricity, current flowing to the switching elements is suppressed by current control units in accordance with quantity of generated electricity. A plurality of rectifying diodes are provided in the three-phase alternating current generator-motor are connected in parallel with the corresponding switching elements.

Abstract: A system and method for DC/DC conversion are provided in which a high accuracy digital pulse width modulator controller circuit controls a power switch to obtain a desired DC output. The control circuit amplifies the difference of a DC output sample in relation to voltage reference. The amplified difference is then compared with a portion of the DC output. The compared result is used for controlling the power switch. A ripple coming from the DC output side is overlaid upon either one of the inputs to the comparator depending upon the polarity of the ripple signal.

Abstract: A method for controlling a matrix converter with nine bidirectional power switches arranged in a 3×3 switch matrix is described. Switching states of a modulation period are each calculated with associated time intervals by using a space vector modulation method. According to the invention, these calculated switching states are each divided into switching states of an output phase of the matrix converter, with time intervals assigned to the switching states, wherein the time intervals and the output-phase-related switching states are placed into one-to-one correspondence. Depending on the measured input voltages, the output-phase-related switching states with associated time intervals are combined into a pulse train of a modulation period, so that a sequential commutation always occurs to a nearest input voltage. This significantly reduces the switching losses of a matrix converter.

Abstract: A method and structure for an array of content addressable memory (CAM) cells is disclosed. Each of the CAM cells has a search line and a bitline parallel to the search line. Across the array, search lines and bit lines of the CAM cells are interdigitated so that the search lines and bitlines alternate across the array. CAM cell macro's are inverted with respect to adjacent macros to balance parasitic capacitances across the array.

Abstract: A ternary content addressable memory (CAM) cell includes a dynamic random access memory (DRAM) cell storing data values and a DRAM cell storing mask values. The mask values control a masking circuit. The CAM cell also includes a compare circuit coupled among the DRAM cell and the masking circuit. The compare circuit of an embodiment receives data and comparand data and affects a logical state of a match line in response to a predetermined relationship between the data and comparand data. The compare circuit includes a first pair of transistors coupled for conduction state control by the comparand data and a second pair of transistors coupled for conduction state control by the data. The first pair of transistors includes two n-channel transistors. The second pair of transistors includes one n-channel and one p-channel transistor. A sense amplifier couples to the match line to detect changes in match line logical state.

Abstract: Content addressable memory (CAM) devices according to embodiments of the present invention conserve match line and bit line power when CAM array blocks therein are searched. These CAM array blocks are searched in a pipelined segment-to-segment manner to increase search speed. The pipelined search operations may also be interleaved with write and read operations in an efficient manner that reduces the occurrence of pipeline bubbles.

Abstract: The present invention relates to a system and method for providing distributed, highly configurable modular predecoding. The system includes a hierarchical memory structure, including a predecoder adapted to perform a first layer of address predecoding and at least one local predecoder interacting with the global predecoder and adapted to perform a second layer of address predecoding.

Abstract: A memory device capable of rewriting data with smaller current consumption than a case of feeding a rewrite current every bit line is obtained. This memory device including a first bit line and a second bit line having a current path independently of the first bit line, and renders write current paths of the first and second bit lines in common. Thus, the memory device can rewrite data with smaller current consumption as compared with the case of feeding the rewrite current every bit line.

Abstract: A nano-scale flash memory comprises: (a) source and drain regions in a plurality of approximately parallel first wires, the first wires comprising a semiconductor material, the source and drain regions separated by a channel region; (b) gate electrodes in a plurality of approximately parallel second wires, the second wires comprising either a semiconductor material or a metal, the second wires crossing the first wires at a non-zero angle over the channel regions, to form an array of nanoscale transistors; and (c) a hot electron trap region at each intersection of the first wires with the second wires. Additionally, crossed-wire transistors are provided that can either form a configurable transistor or a switch memory bit that is capable of being set by application of a voltage. The crossed-wire transistors can be formed in a crossbar array.

Abstract: A ferroelectric field effect transistor (FET) has a gate, source, drain, and substrate. A negative voltage is applied to the gate. Ground potential is applied to the source, drain, and substrate. The negative voltage has a magnitude at least equal to the coercive voltage of the FET. A positive voltage is then applied to the gate. Ground potential is applied to the source and substrate. The positive voltage is no less than the coercive voltage. Either a positive voltage or a ground potential is applied to the drain to write a logic state to the FET. A voltage is applied to the gate. Ground potential is applied to the source. A positive voltage is applied to the drain. The drain current is measured and compared to a compare current. The relative size of the drain current compared to the compare current is indicative of the stored logic state in the FET.

Abstract: Memory devices and methods are presented for selectively reading or writing rows or columns of memory cells in a ferroelectric memory array, wherein sense amps are selectively coupled with row lines or column lines and decoder outputs are coupled with column lines or row lines for row or column memory access operations, respectively.

Abstract: A memory device and method of manufacturing thereof having a voltage regulator with distributed output transistor. A novel approach for the bitline high voltage (VBLH) generation is used to save chip area by allowing narrower power bussing. The output transistor is distributed along the array edge. In addition, the transistor is divided into sections with different channel widths to compensate for current drive losses due to voltage drops along the VDD power bus. The IR-drop on the VBLH line is eliminated, and a constant output voltage is provided along the array edge.

Abstract: A NAND or NOR content-addressable memory (CAM) cell, which selectively use single port, tow ports, or three ports for operations depending on design requirements. Only n-channel transistors or p-channel transistors design these NAND or NOR CAM cells. In such designs, one-port bit line with one-port word line, or one-port bit line with two-port word lines, or two-port bit lines with two-port word lines are provided for meeting different operations and pruposes.

Abstract: MTJ elements are accumulated in a plurality of portions on a semiconductor substrate. Upper lines and lower lines extending in the X direction are connected to the MTJ elements. The number of MTJ elements arranged in each portion is gradually increased from a lower portion towards an upper portion. With respect to the upper lines, the upper lines arranged in the lower portion are connected to transistors present near an array of the MTJ elements, and the upper lines arranged in the upper portion are connected to transistors distant from the array of the MTJ elements. Also with respect to the lower lines, the lower lines in the lower portion are connected to transistors nearer to the array of the TRM elements than the lower lines in the upper portion.

Abstract: Source lines having a high electrical resistance are placed to extend in the same direction as that in which reference cells are arranged. A balance is thus achieved, in terms of the length of the path on lines extending in the direction orthogonal to that in which reference cells are arranged, between current paths passing respectively through a selected memory cell and a selected reference cell, regardless of the result of address selection. Accordingly, a difference in electrical resistance between these current paths reflects a difference in electrical resistance between the selected memory cell and the selected reference cell regardless of the address selection, which improves a data reading margin.

Abstract: For particularly flexible and space-saving information storage, in the case of a floating gate memory cell and a corresponding semiconductor memory device, the invention includes providing a floating gate configuration with a plurality of floating gates. Each of the floating gates is configured for substantially independent information storage. As a result, a plurality of information units can be stored independently of one another in the memory cell.