Patents Issued in July 6, 2004
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Patent number: 6760253Abstract: A non-volatile semiconductor memory device in which one I/O line is provided corresponding to one block region. 2N (four, for example) memory cells are provided in one block region. The adjacent memory cells are connected by a connect line. A bit line is connected to each connect line. Four bit lines are provided in one block region. The four bit lines in one block region are commonly connected to the I/O line through first select gates. A second select gate is provided between the bit line which is located at the boundary between the i-th and (i+1)th block regions which are adjacent to each other in a row direction and the I/O line corresponding to the i-th block region.Type: GrantFiled: August 28, 2002Date of Patent: July 6, 2004Assignee: Seiko Epson CorporationInventor: Teruhiko Kamei
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Patent number: 6760254Abstract: A semiconductor memory circuit is disclosed, which comprises a plurality of memory cell blocks, a plurality of sub data lines, a first bank region including the plurality of memory cell blocks and the plurality of sub data lines, at least one of second bank region arranged, a plurality of data read lines, a plurality of first amplifier circuits connected to the plurality of data read lines, a plurality of auto data lines, a plurality of second amplifier circuits connected to the plurality of auto data read lines, a plurality of switch circuits provided in correspondence to the plurality of memory cell blocks, wherein data in the plurality of memory cells of the second bank region are readable from the plurality of first amplifier circuits, even when data in the plurality of memory cells of the first bank region is being read from the plurality of second amplifier circuits.Type: GrantFiled: September 6, 2002Date of Patent: July 6, 2004Assignee: Kabushiki Kaisha ToshibaInventor: Tadayuki Taura
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Patent number: 6760255Abstract: A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data.Type: GrantFiled: April 23, 2003Date of Patent: July 6, 2004Assignee: SanDisk CorporationInventors: Kevin M. Conley, John S. Mangan, Jeffrey G. Craig
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Patent number: 6760256Abstract: A non-volatile semiconductor memory device includes a non-volatile memory element group having a first storage area which stores booting data and a second storage area to store storage addresses of the first storage area. The device further includes a detecting circuit which detects turn-ON of a power supply. The device further includes a register to which the storage address stored in the second storage area is read out and transferred from the non-volatile memory element group when the detecting circuit detects turn-ON of the power supply, and a control circuit which performs a control operation to output booting data stored in the first storage area and corresponding to the storage address transferred to the register after an initialization operation performed at the power supply turn-ON time is terminated.Type: GrantFiled: November 21, 2002Date of Patent: July 6, 2004Assignee: Kabushiki Kaisha ToshibaInventor: Kenichi Imamiya
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Patent number: 6760257Abstract: Programming a flash memory cell comprises receiving a first Vt corresponding to a first bit stored in the flash memory cell and receiving a second Vt corresponding to a second bit stored in the flash memory cell. In additon, programming the flash memory cell comprises programming one of the first bit and the second bit of the flash memory cell with a first programming voltage if the first Vt and the second Vt both correspond to a low Vt state prior to programming the flash memory cell. Furthermore, the first programming voltage is &Dgr;V lower than a second programming voltage that is used to program one of the first bit and the second bit of the flash memory cell if either of the first Vt and the second Vt correspond to a high Vt state prior to programming the flash memory cell.Type: GrantFiled: August 29, 2002Date of Patent: July 6, 2004Assignee: Macronix International Co., Ltd.Inventors: Jen-Ren Huang, Ming-Hung Chou, Jen-Ren Chiou
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Patent number: 6760258Abstract: A new method of fabricating and programming and erasing a Flash EEPROM memory cell is achieved. A tunneling oxide layer is formed overlying a semiconductor substrate. A first polysilicon layer, an interpoly oxide layer and then a second polysilicon layer are deposited. The second polysilicon layer, the interpoly oxide layer, the first polysilicon layer, and the tunneling oxide layer are patterned to form control gates and floating gates for planned Flash EEPROM memory cells. Ions are implanted to form drain junctions where the drain junctions are shallow and abrupt. Ions are implanted to form angled pocket junctions adjacent to the drain junctions. The angled pocket junctions are implanted at a non-perpendicular angle with respect to the semiconductor substrate and are counter-doped to the drain junctions. Ions are implanted to form source junctions that are deeper and less abrupt than the drain junctions.Type: GrantFiled: January 8, 2003Date of Patent: July 6, 2004Assignee: Chartered Semiconductor Manufacturing Ltd.Inventors: Tze Ho Simon Chan, Yung-Tao Lin
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Patent number: 6760259Abstract: Particular blocks are a boot block and parameter block having a storage capacity smaller than that of a general block. In the case where a boot block is not required, a signal BOOTE is set at an L level. In the case where a signal BLKSEL is at an H level in an erasure mode, a control unit selects four blocks aligned in a horizontal direction at the same time. The control unit also selects two blocks simultaneously in the vertical direction. As a result, the particular eight blocks are selected. The boot block and parameter block can be erased collectively as one block having a capacity similar to that of a general block. Therefore, a flash memory corresponding to the case of including a boot block and not including a boot block can be implemented simultaneously with one chip. Thus, the designing and fabrication process can be simplified.Type: GrantFiled: July 23, 2003Date of Patent: July 6, 2004Assignee: Renesas Technology Corp.Inventors: Tomoshi Futatsuya, Takashi Hayasaka, Taku Ogura
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Patent number: 6760260Abstract: A semiconductor memory apparatus includes a memory cell array having a multiplicity of data lines and a multiplicity of local amplifiers, each of the local amplifiers being associated with a data line. An amplifier group includes at least two amplifiers selected from the multiplicity of local amplifiers. Each amplifier has at least a pair of selection transistors for selecting a particular amplifier from the amplifier group. The selection transistors have a common gate, an unshared intrinsic diffusion region, and a shared intrinsic diffusion region, the shared intrinsic diffusion region being shared with an adjacent selection transistor from an adjacent amplifier.Type: GrantFiled: October 11, 2002Date of Patent: July 6, 2004Assignee: Infineon Technologies AGInventors: Robert Fuerle, Eckehard Plättner, Manfred Plan
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Patent number: 6760261Abstract: A circuit and method for suppressing the effect of noise on a data strobe signal DQS in a double data rate (DDR) SDRAM is provided. The circuit includes a data input latch circuit for receiving data to be stored and for latching the data in a memory array in response to a control signal; and a control signal generator for generating the control signal in response to a data strobe signal wherein the control signal has a predetermined minimum pulse width of the data strobe signal. The control signal generator includes a reset/set flip-flop for generating the control signal, wherein the flip-flop is set by the data strobe signal; and a low pass filter for receiving the data strobe signal and for outputting a reset signal to the flip-flop if the data strobe signal is greater than the predetermined minimum pulse width.Type: GrantFiled: September 25, 2002Date of Patent: July 6, 2004Assignee: Infineon Technologies AGInventors: Torsten Partsch, George William Alexander
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Patent number: 6760262Abstract: An integrated circuit detects the voltage level of the supply voltage to the integrated circuit. Circuity on the integrated circuit including the charge pump circuity adjusts to operate more effectively or efficiently at the voltage level of the supply voltage.Type: GrantFiled: March 4, 2003Date of Patent: July 6, 2004Assignee: SanDisk CorporationInventors: Andreas M. Haeberli, Sau C. Wong, Hock C. So, Carl W. Werner, Cheng-Yuan Michael Wang, Leon Sea Jiunn Wong
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Patent number: 6760263Abstract: A method and device for controlling the data latch time. The method dynamically adjusts the latch time of the data strobe signal, so that the offset generated in the memory data signal or the data strobe signal due to the interference that results from the factors of the temperature variance or the voltage variance that impacts to the control chip and thus causes the inaccurate reading of the memory data can be avoided.Type: GrantFiled: December 26, 2002Date of Patent: July 6, 2004Assignee: VIA Technologies, Inc.Inventor: Ming-Shi Liou
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Patent number: 6760264Abstract: A method and apparatus of reducing the time for enabling a dynamic random access memory (DRAM) upon initial application of power, comprises generating an internal RAS signal upon initial power up to generate internal voltages. The internal RAS pulse is asserted after a short time delay ends. After the internal RAS pulse is asserted, voltages on a digit line pair are amplified with a sense amplifier. Then, the amplified voltages on the digit line pair are equilibrated with an equilibration circuit. The equilibrated voltage is also coupled through the equilibration circuit to charge a common plate of a memory cell capacitor.Type: GrantFiled: August 20, 2002Date of Patent: July 6, 2004Assignee: Micron Technology, Inc.Inventor: Stephen L. Casper
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Patent number: 6760265Abstract: A read amplifier includes a read stage, a reference stage and a differential output stage that includes PMOS and NMOS transistors. The transistors of the differential stage include only one PMOS transistor and only one NMOS transistor in series. The PMOS transistor has its gate linked to one node of the read stage. The NMOS transistor has its gate linked to one node of the reference stage. The mid-point of the PMOS and NMOS transistors of the differential stage form a data output node of the read amplifier.Type: GrantFiled: November 19, 2002Date of Patent: July 6, 2004Assignee: STMicroelectronics SAInventor: Francesco La Rosa
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Patent number: 6760266Abstract: A sense amplifier (1300, 1500) is provided for sensing the state of a toggling type magnetoresistive random access memory (MRAM) cell without using a reference. The sense amplifier (1300, 1500) employs a sample-and-hold circuit (1336, 1508) combined with a current-to-voltage converter (1301, 1501), gain circuit (1303), and cross-coupled latch (1305, 1503) to sense the state of a bit. The sense amplifier (1300, 1500), first senses and holds a first state of the cell. The cell is toggled to a second state. Then, the sense amplifier (1300, 1500) compares the first state to the second state to determine the first state of a toggling type memory cell.Type: GrantFiled: June 28, 2002Date of Patent: July 6, 2004Assignee: Freescale Semiconductor, Inc.Inventors: Bradley J. Garni, Mark F. Deherrera, Mark A. Durlam, Bradley N. Engel, Thomas W. Andre, Joseph J. Nahas, Chitra K. Subramanian
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Patent number: 6760267Abstract: A flash memory array arrangement having a plurality of erase blocks which can be separately erased. The erase blocks have separate source lines, the state of which is controlled by a source line decoder. In array read, program and erase operations, the source lines of the deselected erase blocks, the blocks that are not being read, programmed or erased, are set to a high impedance level. If a cell in one of the deselected erase blocks is defective in some respect such that the cell is conducting leakage current, the high impedance source line associated with the cell will reduce the likelihood that the defective cell will prevent proper operation of the selected erase block.Type: GrantFiled: June 17, 2002Date of Patent: July 6, 2004Assignee: Micron Technology, Inc.Inventors: Christophe J. Chevallier, Vinod C. Lakhani
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Patent number: 6760268Abstract: A memory (110) uses memory cells not intended for user programming referred to as ‘dummy’ cells (202, 206). When selected, the dummy cells provide a current that establishes a reference voltage substantially equal to one-half of voltage created in a bit line by a cell programmed to a one and a cell programed to a zero. The reference voltage is sensed and compared with a bit line voltage created when a memory cell is read. By time multiplexing either one dummy cell programmed to a logic one or two dummy cells per bit line programmed respectively to logic one and logic zero, the desired reference voltage is accurately created. Memories such as MRAM and Flash that may be is difficult to accurately sense due to cell processing variations are enhanced by the timed selective use of one or more dummy cells.Type: GrantFiled: November 26, 2002Date of Patent: July 6, 2004Assignee: Freescale Semiconductor, Inc.Inventor: Perry H. Pelley
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Patent number: 6760269Abstract: Dummy cells are divided into a plurality of divided dummy columns, and divided dummy bit lines are arranged corresponding to the divided dummy columns. These divided dummy bit lines are provided with dummy sense amplifiers that drive a sense control line transmitting a sense enable signal activating a sense amplifier. A faster activation timing of the sense amplifier can be achieved.Type: GrantFiled: May 27, 2003Date of Patent: July 6, 2004Assignee: Renesas Technology Corp.Inventors: Yasunobu Nakase, Koji Nii
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Patent number: 6760270Abstract: An erase of a non-volatile memory (NVM) is achieved by first using oxide tunneling followed by hot hole injection (HHI). The subsequent use of HHI completes the erase that the tunneling cannot complete due to saturation. By first using tunneling, preferably Fowler-Nordheim tunneling (FNT), the damage to a bottom dielectric that normally occurs by HHI is significantly reduced. The damage due to HHI is significantly greater at the beginning of the erase when the electric field is greater. By reducing the damage due to HHI, the bottom dielectric can be smaller than that normally used for HHI so that high voltages are not required. Accordingly, the transistors in the periphery do not need to be so oversized as is normally required for HHI and thus saving area and power.Type: GrantFiled: September 30, 2002Date of Patent: July 6, 2004Assignee: Motorola, Inc.Inventors: Gowrishankar L. Chindalore, James David Burnett
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Patent number: 6760271Abstract: A semiconductor memory device includes a plurality of input/output terminals, a memory cell array which are divided into blocks respectively corresponding to the input/output terminals such that only one of the blocks corresponds to a given one of the input/output terminals, sense amplifiers, which are connected to the blocks at a side thereof, and amplify data of the memory cell array, switches which are respectively connected to the sense amplifiers, and signal lines, which connect the sense amplifiers to a corresponding one of the input/output terminals via the switches.Type: GrantFiled: March 19, 2001Date of Patent: July 6, 2004Assignee: Fujitsu LimitedInventors: Harunobu Nakagawa, Yasushi Oka
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Patent number: 6760272Abstract: A processor card for supporting multiple cache configurations, and a microprocessor for selecting one of the multiple cache configurations is disclosed. The processor card has a first static random access memory mounted on a front side thereof and a second static random access memory mounted on a rear side thereof. The address pins of the memories are aligned. Each pair of aligned address pins are electrically coupled to thereby concurrently receive an address bit signal from the microprocessor. During an initial boot of the microprocessor, the microprocessor includes a multiplexor for providing the address bit signals to the address pins in response to a control signal indicative of a selected cache configuration.Type: GrantFiled: December 7, 2000Date of Patent: July 6, 2004Assignee: International Business Machines CorporationInventors: Keenan W. Franz, Michael T. Vaden
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Patent number: 6760273Abstract: A buffer is provided that has a high access time and operates with reduced power consumption. The buffer includes n write word line registers (40—0), each of which an output is directly connected to a word line driver. Thus, a word line is driven to access a memory cell array. All the word line registers are cascaded in a ring form. The write START signal 41 acting as a synchronous set input is input to the write word line register (40—0) corresponding to the least significant address. The write strobe (STB) signal 42 is input to the write word line registers connected in a ring form. When the write strobe signal 42 is active, the write word line registers operate like a shift register. When the write strobe signal 42 is not active, all the write word line registers hold a current value.Type: GrantFiled: January 9, 2003Date of Patent: July 6, 2004Assignee: NEC CorporationInventor: Satoshi Nakazato
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Patent number: 6760274Abstract: A synchronous flash memory has been described that includes an array of non-volatile memory cells. The memory device has a package configuration that is compatible with an SDRAM. The synchronous flash memory device includes an array of non-volatile memory cells arranged in a plurality of rows and columns. During a read operation, a row of the memory array can be accessed and data read from a group of columns during a burst operation. The burst columns are generated using an internal counter and an externally provided start address. The memory generates the burst column addresses by modifying the least significant column address signals only. For a burst length of two, only the least significant address bit is modified. For a burst length of four, only the two least significant address bits are modified. Finally, only the three least significant address bits are modified for a burst length of two. In one embodiment, the burst addresses rotate through the defined column group in a cyclical manner.Type: GrantFiled: October 10, 2002Date of Patent: July 6, 2004Assignee: Micron Technology, Inc.Inventor: Frankie F. Roohparvar
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Patent number: 6760275Abstract: A system and method in accordance with the invention communicator remotely with remotely controllable down hole tools in a well bore at a drilling installation. At the surface, high energy pressure impulses directed into the tubing or the annulus, or both, being at a level to propagate through an interface between very different impedances zones, such as an upper level gas zone and a lower level of mobile fluid media extending down into the desired downhole location. The pressure impulses, provided by directionally gating along the longitudinal confining path a pressure impulse initially having sharp leading and trailing edges, reach the downhole location as physical perturbations forming a discernible pattern that can be detected by one or more energy responsive transducers. With combinations of these signals, one of a number of separate control devices can be remotely actuated.Type: GrantFiled: May 10, 2002Date of Patent: July 6, 2004Inventor: Kenneth J. Carstensen
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Patent number: 6760276Abstract: An acoustic signaling system comprises a transmitter, which has frequency stability to create sounds which can reliably be received and which is loud enough to be heard by a receiver. The receiver includes an electret microphone, a limiting amplifier which has high gain, high frequency roll off and produces a maximum output for any input above a minimum value and a Schmitt trigger circuit to square up the output of the limiting amplifier and function as a zero cross detector. A micro-controller measures the times of the zero crossings and performs the detection and decoding algorithms to determine what code is being received. Each code consists of an anonymous repeating sequence of tones, which are transmitted for a certain duration followed by a silence, which allows room echoes to decay. The system creates acoustic sound codes, which are pleasant, sounding, can reliably be received and convey sufficient information to activate toys or dolls.Type: GrantFiled: February 11, 2000Date of Patent: July 6, 2004Inventor: Gerald S. Karr
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Patent number: 6760277Abstract: A test system for a design of a network device under test includes an oscillator configured for generating a first clock signal for a first clock domain, and field programmable gate arrays. Each field programmable gate array is configured for performing device operations according to the first clock domain and transferring data to another device at a network data rate based on a second clock domain. Each field programmable gate array includes clock conversion logic configured for generating a second clock signal for the second clock domain, based on the first clock signal. Hence, the generation of the second clock signal within each field programmable gate array ensures that timing accuracy is maintained, enabling communication between the field programmable gate arrays at high-speed data rates based on the second clock domain.Type: GrantFiled: May 21, 2001Date of Patent: July 6, 2004Assignee: Advanced Micro Devices, Inc.Inventor: Rizwan M. Farooq
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Patent number: 6760278Abstract: A magnetic head includes a coil for generating a magnetic field, and an electroconductive film superposed over the coil in the axial direction of the coil. The film is formed with a hole in the center. The electroconductive film is composed of a non-magnetic substance, and a first slit is formed in the electroconductive film extending from the hole to the outer peripheral edge of the electroconductive film. A second slit surrounds the inner peripheral edge of the electroconductive film. A continuity component is formed to electrically connect the inner peripheral edge of the electroconductive film to a radially outer region of the electroconductive film.Type: GrantFiled: March 12, 2002Date of Patent: July 6, 2004Assignee: Fujitsu LimitedInventors: Tsuyoshi Matsumoto, Tohru Fujimaki
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Patent number: 6760279Abstract: An object of the present invention is to provide a film-surface light-incident type magneto-optical recording medium which is used by means of an objective lens having a large NA value and is excellent in productivity and yield, and a magneto-optical recording apparatus. According to the present invention, there is provided a magneto-optical recording medium for conducting recording or reading-out from the film surface side of the recording medium by traveling of a flying head incorporated with an objective lens having a numerical aperture (NA) of not more than 0.95 and not less than 0.8, wherein at least a reflective film, a recording layer, a transparent dielectric layer, a transparent resin layer and a lubricant layer are laminated on a substrate in that order.Type: GrantFiled: February 13, 2002Date of Patent: July 6, 2004Assignee: Hitachi Maxell, Ltd.Inventor: Tsuyoshi Maro
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Patent number: 6760280Abstract: An optical data carrier has a memory member having a radiation-transparent layer and an information recording layer adjoining it. The information recording layer has a surface with memory areas for digital information. The data carrier has a through opening for receiving a read/write device and has a thickness equal to that of a chip card or magnetic strip card. The memory member is 0.5-0.6 mm thick. An adapter for the read/write device has a base member with a rectangular recess of inner dimensions slightly greater than the outer dimensions of the plate-shaped data carrier to be received therein. The base member has a central opening coaxial to the through opening of the data carrier. The adapter/data carrier unit can rotate without balance error about a central axis of through opening and central opening. The combined thickness of the data carrier and of the base member measured at the recess corresponds to that of a standard DVD data carrier.Type: GrantFiled: January 9, 2002Date of Patent: July 6, 2004Inventor: Karl-Heinz Schoppe
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Patent number: 6760281Abstract: A push-button speed change device for CD ROM drive is included in a CD ROM drive having a system casing and a front panel, and the front panel has indicating light, CD loader, and a plurality of control buttons. By means of each control button, it individually controls the play, pause, fast forward, fast reverse, of the optical disk drive, or when the user simultaneously presses any two of the control buttons, it can control the optical disk drive to rotate the motor in different speeds.Type: GrantFiled: July 6, 2001Date of Patent: July 6, 2004Assignee: Behavior Tech Computer CorporationInventor: Ming-Kuei Cheng
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Patent number: 6760282Abstract: A disk device providing disk storage and disk playing capabilities. The disk storage being provided along a vertical column. Upon the retrieval of a desired disk from the disk storage, the desired disk is rotated around the column so that it may move up and down the column into a playing position. Upon reaching the playing position the disk is provided to a disk playing device for playing the disk.Type: GrantFiled: September 26, 2002Date of Patent: July 6, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Ryoto Adachi, Yasuyuki Nakanishi, Takashi Matsuda, Tatsuya Saitou, Masahiro Ieda
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Patent number: 6760283Abstract: A disc recording and/or reproducing device includes a disc compartment that has a plurality of disc mounts placed one upon another, on which discs are mounted. The device also includes a recording and/or reproducing mechanism for selectively recording and/or reproducing a disc mounted on one of the plurality of disc mounts. An injection mechanism is included for ejecting the disc mounted on the disc mount. A control mechanism is included that moves along a line substantially perpendicular to the placing direction and is configured to start the recording and/or reproducing mechanism when in a first position and start the ejection mechanism when reaching a second position on another side of the line.Type: GrantFiled: May 7, 2003Date of Patent: July 6, 2004Assignee: Sony CorporationInventors: Tomohiro Watanabe, Kazuyuki Takizawa, Takayuki Ishibashi, Yoshiteru Taka, Toru Hama
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Patent number: 6760284Abstract: A rotary tray having a plurality of disk mounting sections is pivotally supported by a central shaft arranged on a tray support face of a casing, a rim protruding from a lower face of the rotary tray is movably set on a sliding face block arranged in an outer circumferential section of the tray support face, and disk mounted on a desired disk mounting section is opposed to an optical pickup when the rotary tray is intermittently rotated by a predetermined angle, and the sliding face block is engaged in a space formed between a recess step circumferential face, which is formed along an inner edge of an outer circumferential section of the tray support face, and a support frame integrally formed in the outer circumferential section and being opposed to the recess step circumferential face.Type: GrantFiled: September 3, 2002Date of Patent: July 6, 2004Assignee: Funai Electric Co., Ltd.Inventors: Hideki Kume, Takayuki Murakami, Tetsuya Tamura
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Patent number: 6760285Abstract: Focusing balance adjustment of adjusting a servo mechanism is executed so that reproduction quality is optimum in a state where a focusing servo is active (#5). Thereafter, tracking balance adjustment of adjusting the servo mechanism is executed so that a tracking balance deviation is cancelled which is an amplitude difference between the upper side and lower side relative to a reference level of a waveform generated in a tracking error signal when the focal point of a light beam applied to the disk crosses a track of the disk (#7).Type: GrantFiled: August 7, 2002Date of Patent: July 6, 2004Assignee: Funai Electric Co., Ltd.Inventors: Minoru Hirashima, Yasunori Kuwayama
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Patent number: 6760286Abstract: There is provided a recording medium reproducing apparatus in which a digital signal immediately before being inputted to a D/A converting LSI is prevented from being taken out and unfairly copied. A digital signal processing LSI and the D/A converting LSI are connected to each other through an external bus. A scrambling processing circuit for scrambling a digital signal outputted from a digital signal processing circuit is provided inside the digital signal processing LSI. A descrambling processing circuit for descrambling the scrambled digital signal transmitted through the external bus is provided inside the D/A converting LSI.Type: GrantFiled: September 12, 2002Date of Patent: July 6, 2004Assignee: Matushita Electric Industrial Co., Ltd.Inventors: Akihisa Kawamura, Masatoshi Shimbo, Yoshihiro Mori
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Patent number: 6760287Abstract: An optical disk unit presets a value &thgr;1: which prescribes an optimum recording pulse width of a light source for a case where the optical disk is rotated at a predetermined linear velocity on a track located at a predetermined radial position on the optical disk, and an optimum power ratio &Dgr;P of an extra pulse at a leading portion of the recording pulse where power is increased. Information is recorded on the optical disk while controlling a light emission waveform of the light source based on a value &thgr;1(v) which prescribes the recording pulse width, a power ratio &Dgr;P(v) and an optimum recording power Pwo(v) which are successively calculated.Type: GrantFiled: March 25, 2003Date of Patent: July 6, 2004Assignee: Ricoh Company, Ltd.Inventor: Shinichi Sato
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Patent number: 6760288Abstract: A blank writable disc contains a lead-in area followed by a program area, followed by a lead-out area. When the disc is inserted into a recorder, the disc is initialized by recording control data in a lead-in area. The control data defines a general purpose area (GPA) within the program area of the disc. Then user data is recorded within a user portion of the program area, the user portion being outside of the GPA. After the user data is recorded formatting of the disc begins. The formatting includes recording format data in the user portion of the program area. Then, prior to ejecting the disc from the recording apparatus, if the formatting of the disc is not yet complete, then the disc is finalized by recording additional control data in the lead-in area and in a lead-out area without completing the formatting of the entire disc.Type: GrantFiled: June 16, 2003Date of Patent: July 6, 2004Assignee: Koninklijke Philips Electronics N.V.Inventors: Pope Ijtsma, Dirk Hamelinck, Jakob Gerrit Nijboer
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Patent number: 6760289Abstract: An optical disc drive which is capable of easily and reliably recording information onto and/or playing back information recorded on various types of optical discs having different reflectances is disclosed. The optical disc drive has a rotational drive mechanism for rotating the optical disc loaded in the optical disc drive; an optical pick-up which includes an objective lens, an actuator, a laser diode and a split photodiode; an optical pick-up moving mechanism; a control means; an RF amplifier IC; a servo processor; a decoder; a memory; and a casing for housing all these elements. After moving a disc tray to the loaded position, the optical disc forces the objective lens to move in the optical axis direction to generate a focus error signal. Then, after calculating an amplitude of the generated focus error signal, the optical disc drive discriminates the presence or absence of an optical disc and the disc type of the optical disc loaded in the optical disc drive.Type: GrantFiled: September 20, 1999Date of Patent: July 6, 2004Inventor: Koji Ide
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Patent number: 6760290Abstract: A disc-shaped optical record carrier includes a first area having a spiral track extending in a first direction from an inner side on the disc, and a second area having a spiral track extending in a second direction opposite to the first direction, from an outer side on the disc located on the same plane as the first area on the disc, wherein one of the first and second areas is assigned a recordable area and the other is assigned a read only area.Type: GrantFiled: February 19, 2002Date of Patent: July 6, 2004Assignees: Hitachi Maxell Limited, Olympus Optical Corporation Limited, Sanyo Electric Corporation LimitedInventors: Tamotsu Iida, Yoshiro Yoda, Kazuo Ito
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Patent number: 6760291Abstract: A method and apparatus for initializing optical recording media is provided that detects the intensity of a reflective light off of an optical recording media and analyzes the initializing condition based on the detected intensity during an initializing process. The light is radiated on a rotating phase-change optical recording medium. The light may be moved in a radial direction of the optical recording medium. The detected intensity of the reflected light may be used to identify crystallized portions and amorphous portions of the optical media. The initialization process can be adaptively controlled to ensure proper initialization. If desired, re-initialization can be limited to those areas detected to be outside of the predetermined parameters.Type: GrantFiled: February 25, 2003Date of Patent: July 6, 2004Assignee: Ricoh Company, Ltd.Inventors: Kyohji Hattori, Kenichi Aihara, Katsuyuki Yamada, Fumiya Ohmi, Eiji Noda, Yujiro Kaneko, Yuki Nakamura, Hiroko Iwasaki
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Patent number: 6760292Abstract: A disc recorder is provided with: a reproduction peak rate detector for detecting a peak rate; a data recording start position detector for detecting a data recording start position; a data recording position manager and a defect position and length detector for detecting length of a discontinuous portion when real time reproduction data are suppositionally recorded on a disc medium; a continuous reproduction possibility determining unit for determining a possibility of continuous reproduction of the suppositionally recorded real time reproduction data; a copy manager for recording the real time reproduction data on the disc medium when it is determined that the suppositionally recorded real time reproduction data can be continuously reproduced; and a data recording position manager for changing the data recording start position when it is determined that the continuous reproduction is impossible.Type: GrantFiled: June 22, 2000Date of Patent: July 6, 2004Assignee: Victor Company of Japan, LimitedInventor: Takayuki Sugahara
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Patent number: 6760293Abstract: A driving device and chassis for a disk tray of an optical disk drive is disclosed. The tray of the optical disk drive is connected to the chassis. The front end of the chassis is provided with a driving means. By the driving of the driving means, the disk tray may open or close. A driven wheel serves to drive a decelerating gear set. The driven wheel has a hole that receives a rotary shaft retainer with a thread portion that screws into a boss on the chassis. An upper half of said rotary shaft screw is an axial portion, that extends through the hole in the driven wheel. Alternatively, a rotary shaft retainer may integrally formed with the chassis through a rotary shaft. The chassis is made of a general material. The manufacturing process is easy and the cost of the chassis of an optical disk drive is reduced.Type: GrantFiled: August 28, 2001Date of Patent: July 6, 2004Assignee: Asustek Computer Inc.Inventors: Wei-Pang Lee, Yu-Min Chen
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Patent number: 6760294Abstract: Light emitted from a semiconductor laser is converted by a collimator lens into a collimated light, which enters into an objective lens of high NA and forms a condensed spot within an optical disk. The light emitted from the semiconductor laser is S-polarized light that oscillates in a direction perpendicular to the plane of incidence.Type: GrantFiled: July 23, 2001Date of Patent: July 6, 2004Assignee: Sharp Kabushiki KaishaInventor: Takahiro Miyake
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Patent number: 6760295Abstract: An optical pick-up includes light sources for emitting light beams having different wavelength, the light sources being switched according to the kind of optical discs, a refractive lens element for converging the light beams from the light sources onto recording layer of the optical disc; and a spherical aberration correcting element on which a concentric phase grating structure is formed, the phase grating structure altering spherical aberration in response to change of wavelength to correct change of the spherical aberration due to change of the thickness of the cover layer. The spherical aberration correcting element has a wavelength dependence such that spherical aberration varies in the undercorrected direction as wavelength of incident light increases.Type: GrantFiled: December 29, 1999Date of Patent: July 6, 2004Assignee: Pentax CorporationInventor: Koichi Maruyama
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Patent number: 6760296Abstract: The disclosed invention relates to an optical integrated device, an optical pickup, and an optical disk apparatus, and is applicable to an optical disk apparatus for playing back a compact disk (CD) and a DVD (Digital Video Disk), thereby to access a plurality of types of optical disks with a simple arrangement. For dividing feedback light with a hologram 19A and detecting the divided feedback light with a light-detecting element 20, laser sources 15A, 15B having different wavelengths are spaced a predetermined distance D from each other in order to compensate for the difference between the diffraction angles &thgr;A1, &thgr;B of the hologram 19A.Type: GrantFiled: June 23, 2000Date of Patent: July 6, 2004Assignee: Sony CorporationInventors: Tomohiko Baba, Katsutoshi Sato, Satoshi Nakano, Satoshi Imai, Hiroaki Yukawa
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Patent number: 6760297Abstract: There is disclosed a substrate unit comprising a light emitting element attachment surface for attaching a light emitting element which emits laser light substantially in parallel to the attachment surface, a light reflecting surface for changing the direction of the light axis of the laser light emitted from the light emitting element by a predetermined angle by reflection, and a light detecting element attachment surface, formed on the same two-dimensional plane as a plane of the light emitting element attachment surface, for attaching a light detecting element which receives light incident from the outside.Type: GrantFiled: October 29, 2001Date of Patent: July 6, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Yoshiharu Fujioka, Kyoya Matsuda, Akio Onuki, Kunio Omi, Futoshi Ishii
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Patent number: 6760298Abstract: This invention relates to optical discs that preferably include multiple data layers and are configured to receive analytes which can be detected by an optical disc reader. The optical disc reader may be a standard optical disc reader or an optical disc reader modified therefrom. The optical disc may include (1) a first layer including optically readable structures which have encoded tracking information, and speed information enabling an optical disc reader to rotate the optical disc at a speed that is determinable from the speed information; (2) a second layer including optically readable structures; and (3) an analyte section capable of receiving an analyte which can be read by the optical disc reader.Type: GrantFiled: December 10, 2001Date of Patent: July 6, 2004Assignee: Nagaoka & Co., Ltd.Inventors: Mark O. Worthington, James R. Norton, Horacio Kido, Victor M. Ortiz
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Patent number: 6760299Abstract: On an optical disc including a substrate on which pits having at least two different depths are formed, main information is recorded by the shape of the pits and additional information is recorded by the depth of the pit. It is possible to reverse polarity of a tangential push-pull signal dependent on the depth of the pit, and therefore it becomes possible to record information utilizing the depth of the pit. This improves recording density of the optical disc. Further, when information of the optical disc is to be copied, the information recorded by the depth of the pit cannot be copied. Therefore, unauthorized reproduction can be prevented.Type: GrantFiled: June 29, 2000Date of Patent: July 6, 2004Assignee: Sharp Kabushiki KaishaInventors: Junsaku Nakajima, Hitoshi Takeuchi, Masaru Nomura
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Patent number: 6760300Abstract: An apparatus for receiving and/or transmitting signals using orthogonal frequency division multiplexing, said apparatus being adapted for outputting a first output signal, comprising: a time synchronisation circuit, being adapted for determination of control information from a first signal, said first signal comprising at least of a first part being a non-orthogonal frequency division multiplexing signal and a second part being an orthogonal frequency division multiplexing signal, said determination of control information exploiting said first part of said first signal; said time synchronisation circuit, further being adapted for converting said second part of said first signal into a second signal, being in time domain representation; a transformation circuit at least converting said second signal into a third signal, being in frequency domain representation; a first frequency domain circuit, at least converting said third signal into said first output signal; and said second signal and said second partType: GrantFiled: February 16, 2000Date of Patent: July 6, 2004Assignees: IMEC, SAIT DevlonicsInventors: Wolfgang Eberle, Liesbet Van der Perre, Steven Thoen, Bert Gyselinckx, Mark Engels
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Patent number: 6760301Abstract: One or more nodes of a data communication system is automatically switched between two or more possible node configurations, such as between a DTE configuration and a DCE configuration, until the presence of a carrier or similar indicator signal is sensed. Configuration devices include relays and electronic switches. Control devices preferably are microprocessor based. In one aspect, upon power up or other initiation, the microprocessor toggles an output control signal so as to repeatedly toggle a switch between, e.g., DTE and DCE positions and to terminate the toggling when a link indicator is detected.Type: GrantFiled: January 7, 2000Date of Patent: July 6, 2004Assignee: Cisco Technology, Inc.Inventor: Peter R. Falk
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Patent number: 6760302Abstract: A system and method of automatic protection switching for a network (100) which protect against link or node failure. The protection fibers (119, 121) in the links are pre-arranged into protection cycles so that if a link failure occurs, protection switches in the network nodes (101, 107) connected in the failed link will switch the working fiber data path onto an alternate path comprised of protection fibers (119, 121). Data can then be transmitted through the protection cycle around the fault to reach the node on the other side of the failed link. The same protection fibers (119, 121) can be used to protect a priority connection against center switch failure in a network. The protection switches in each node (101, 107) which connect working fibers (115, 117) to protection fibers (119, 121) are very fast and their settings do not depend on the state of the network.Type: GrantFiled: August 30, 1999Date of Patent: July 6, 2004Assignee: The Trustees of Columbia University in the City of New YorkInventors: George Nicos Ellinas, Thomas E. Stern