Abstract: A memory that stores a plurality of data storage words, each data storage word includes a plurality of data storage cells arranged as a plurality of columns of data storage cells, at least one of the data storage cells storing data specifying a data value having 3 or more states. The memory includes a plurality of data lines, one such data line corresponding to each column of data storage cells. Each data storage cell sets its state or provides a signal representative of its state via the data line connected to that cell in response to control signals. The memory also includes an error encryption circuit for receiving a data word to be stored in the memory and generating therefrom an encrypted data storage word. The encryption circuit divides the encrypted data storage word into a plurality of sub-data storage words.

Abstract: An input digital signal is encoded by subjecting it to a first convolutional coding step followed by an interleaving step and a second convolutional coding step. The serial concatenated convolutional coded signal thus obtained is then subjected to modulation by means of a two-dimensional modulation scheme such as M-PSK or M-QAM. The corresponding decoding process involves an iterative decoding algorithm based on cascaded logarithmic soft-input soft-output processing steps.

Abstract: A convolutional interleaver includes an interleaver memory partitioned into a plurality of circular buffers, wherein each of the circular buffers has associated write pointers and read pointers, and wherein the interleaver is configured to selectively read symbols from an input vector and store the input symbols in the interleaver memory in accordance with the write pointers, and to selectively read symbols from the interleaver memory to form an output vector in accordance with the read pointers. In one aspect, symbols are written to the interleaver prior to reading; in another, the position of the write pointer corresponds to the position of the read pointer within the circular buffer, and symbols are read from said interleaver memory prior to writing. In another aspect, a de-interleaver applies the concepts and algorithms described above in an inverse manner.

Abstract: The present invention encompasses a method for determining values for parity check bits (p1, . . . , pm) based on a current symbol set (s1, . . . , sk). The method comprises the steps of receiving the current symbol set (s1, . . . , sk) and using a transformation of a matrix to determine the parity check bits. The first N2 columns of the matrix is defined that for column i, 1≦i≦└m/2┘, a value of 1 is assigned to row position i and a value of 1 is assigned to row position i+└m/2┘, all other row positions have a value of 0. Additionally for column i, └m/2┘+1≦i≦N2<m , a value of 1 is assigned to row position i−└m/2┘ and a value of 1 is assigned to row position i+1, all other row positions have a value of 0.

Abstract: A system and method for notifying a user of changes in a hyperlinked document, the system comprising a computer, a server operatively coupled with the computer, a web browser that executes in the computer, the web browser accessing web pages stored on the server, and a general notification system integrally connected with the web browser, the general notification system configured to provide a notification icon on a web page, wherein notification of any changes to the hyperlinked document can be requested by selecting the notification icon. The method comprising providing a notification icon within a web page having a hypertext link associated with the hyperlinked document, selecting the notification icon, and notifying the user of any changes to the hyperlinked document.

Abstract: A user may discover and navigate among hyperlinks through the use of a keyboard. For example, a user may press a tab key to discover and navigate to a first hyperlink that is part of a hypertext document. The first hyperlink is, in response, given focus and a focus shape is drawn around the text or graphics for the hot region of the hyperlink. If the user again presses the tab key, the next hyperlink is given focus and a focus shape (i.e., an outline that surrounds the next hyperlink) is drawn around the next hyperlink. A user may also tab to a placeholder for an image in order to make a decision whether the image should be downloaded or not.

Abstract: The present invention provides a method for a developer to create and display a “dialog definition”, i.e., a description of the dialog that has the position and size of its constituent elements expressed in relative layout rules. These layout rules include expressions of alignment and/or justification of the elements within a container, rather than expressions of the coordinate positions of the elements. In addition, a set of text strings is provided for each language in a separate language file. The user may identify an operating system and a language in which the dialog will be displayed, and the size of the elements in the identified operating system and language will be determined by the computer. The description is interpreted in the computer to lay out the dialog.

Abstract: A system and method for automatically loading an application program associated with an e-mail application attachment file upon reception of the e-mail. Alternatively, the application program may be loaded as soon as the e-mail message itself is opened, without waiting for the user to click on the attachment icon. In either case, the application program is loaded in a minimized state such that as soon as the user clicks on the attachment icon, the attachment application file may be run without waiting for the relatively lengthy time required to load the application program. Prior to loading the application program, responsive to receiving the e-mail message, the computer (102, 114) may examine system resources to determine whether memory (208) usage is sufficient to allow for the opening of the application program.

Abstract: A method and system for synchronizing and using calendar information from a shared database. Calendar information can be stored in a shared database, and accessed and synchronized with one or more portable computer systems. Calendar information stored on the shared database can be assigned a unique category type. Multiple portable computer systems can then access the shared calendar information which can be displayed on each computer system along with the system's own calendar information. The unique category type is different from the default type of each system's own calendar information and the user is not able to change category types on the portable computer system. Shared calendar information can be viewed and edited and then easily removed using the unique category type.

Abstract: A method and apparatus provides a central dictionary and glossary server. An application executing on a client is able to access a local copy of a dictionary or glossary. A master dictionary or glossary is updated at a server, and the update to the master dictionary or glossary is served to the application on the client to update the local copy of the dictionary or glossary. A datastream may also be processed by automatically scanning a datastream and automatically detecting, in the datastream, a word that cannot be matched to a word in a dictionary or glossary. The unmatched word is identified as an acronym, and in response, data associated with the acronym, selected from a hierarchical set of glossaries, is inserted into the datastream in close proximity to the acronym.

Abstract: A method of optimizing speed and power consumption of an integrated circuit having at least one path having at least one gate involves creating a parent state representing a partition of the integrated circuit design. Each device in the parent state further has associated device size information and device type information. A population of individual states are created from at least one parent states. These individual states are scored for timing and power dissipation. Survivor individual states of the population are determined based upon scores of each state of the population. The steps of creating the population of individual states, scoring states, and determining survivor states, are iterated as needed. Survivor states are then further optimized with a greedy search, and a best individual survivor state is selected as an optimized state of each partition. The integrated circuit netlist is adjusted to correspond to the optimized state.

Abstract: A method of finding an optically periodic structure in a cell layer of an integrated circuit design includes receiving as input a physical representation of a cell layer of an integrated circuit design, finding reference coordinates of a selected portion of the cell layer from the physical representation of a cell layer, selecting an initial element located nearest to the reference coordinates, and constructing a base structure that includes the initial element and a minimum number of elements in the physical representation of the cell layer wherein the base structure may be replicated at an X-offset and a Y-offset to fill the entire selected portion so that for each element in each replica of the base structure there is an identical element at identical coordinates in the physical representation of the cell layer.

Abstract: A system and method is provided for creating a digital circuit, such as a configured FPGA or a VLSI chip. User code includes algorithm specifications having precisely defined operators and variables, data representation specifications and data communication specifications. The user code is compiled to create a digital circuit. For example, the compiled user code is used to generate either a hard-wired digital circuit or the configuration instructions for configuring a re-configurable digital circuit.

Abstract: An emulation system includes a clock generation logic for generating multiple asynchronous clocks, where each generated clock's relative phase relationship with respect to all other generated clocks is strictly controlled to speed up the emulation logic evaluation. Unlike statically designed emulator systems known in the prior art, the speed of the logic evaluation in the emulator need not be slowed down to the worst possible evaluation time since the clocking is generated internally in the emulator and carefully controlled. The emulation system does not concern itself with the absolute time duration of each clock, because only the phase relationship among the multiple asynchronous clocks is important. By retaining the phase relationship (and the initial values) among the multiple asynchronous clocks, the speed of the logic evaluation in the emulator can be increased.

Abstract: Provided are a layout verification apparatus and a layout verification method, each employing an L/S matrix to achieve higher accuracy of verification, as well as a program thereof. The layout verification method is realized by dividing each segment in accordance with the layout of its surrounding other polygon. For instance, in FIG. 3, since the left side of polygon (P1) (i.e., segment Segc) is, over its entire segment length, most adjacent to polygon (P5), this side is not divided. Since the upper side of the polygon (P1) is, only in part of its segment length, most adjacent to polygon (P7) within distance (R), this side is divided into segment (Segb1) that corresponds to the part adjacent to the polygon (P7), and segment (Segb2) that is the rest. Then, the L/S matrix is referred to segment by segment, to judge whether the polygon can be resolved.

Abstract: Methods and apparatus are described for facilitating physical synthesis of an integrated circuit design. A set of paths between observable nodes in a netlist representing the circuit design is generated. Each path corresponds to a sequence of signal transitions. Transistors represented in the netlist are sized to attempt to meet a delay constraint for each path. The delay constraint corresponds to a unit delay times the number of signal transitions in the corresponding path. A plurality of individual delays of different durations are allocated among the transitions for at least one of the paths to meet the delay constraint. At least one of the individual delays exceeds the unit delay.

Abstract: A design method for a semiconductor integrated circuit device enabling flexible selection of IPs while securing the functions of a system is provided. The design method of the present invention includes the steps of: (a) storing a plurality of IPs having the same function in a memory for each of a plurality of functions; (b) constructing a function group structure for satisfying a certain specification; and (c) selecting and retrieving one IP from the plurality of IPs having the same function from the memory for each function in the function group structure and substituting the IP for the function in the function group structure.

Abstract: In a placement and routing for a standard cell type LSI design, each standard cell comprises a VDD power supply terminal formed of a P-type diffused layer, a VSS power supply terminal formed of an N-type diffused layer, and an input terminal and an output terminal formed of a first level metal. A plurality of standard cells are located to form a standard cell array, and VDD and VSS power supply lines formed of the first level metal are located to extend along opposite sides of the standard cell array, respectively. For connecting the power supply terminal of the standard cell to the power supply line of the first level metal, a power supply line formed of the diffused layer is extended from the power supply terminal to the power supply line of the first level metal, and a contact bole is formed at an overlapping portion between the power supply line of the first level metal and power supply line formed of the diffused layer.

Abstract: Correcting a mask pattern includes accessing a record associated with an uncorrected pattern that comprises segments. The record associates each segment with a correction grid of a number of correction grids, where each correction grid comprises points. A segment is selected, and an optimal correction for the segment is determined. A correction grid associated with the segment is determined. The segment is snapped to a subset of points of the associated correction grid, where the subset of points is proximate to the optimal correction, to form a corrected pattern of a mask pattern.

Abstract: Shifters on a phase shifting mask (PSM) can be intelligently assigned their corresponding phase. Specifically, the phase of a shifter can be assigned based on simulating the contrast provided by each phase for that shifter. The higher the contrast, the better the lithographic performance of the shifter. Therefore, the phase providing the higher contrast can be selected for that shifter. To facilitate this phase assignment, a pre-shifter can be placed relative to a feature on the layout. The pre-shifter can then be divided into a plurality of shifter tiles for contrast analysis. Model-based data conversion allows for a comprehensive solution including both phase assignment as well as optical proximity correction.

Abstract: The ToolFrame is a code generation tooling framework. Its components form the basis of a generic tooling framework that provides a structured, consistent, and flexible method for developing tools. The ToolFrame separates functionality into components to emphasize substitution of components through common interfaces. This separation is furthered by a common complex object called Resource, used to represent any type of information shared between components.

Abstract: A data driven method and a system for monitoring resource usage for programming a microcontroller. The microcontroller design system includes a configuration and design system with integrated datasheet information and having three independent, but integrated workspaces to provide a programmer an organized way of displaying configuration and design information. The three workspaces include a user module selection workspace, a user module placement workspace and a user module pin out workspace for allowing the programmer to select desired function components for a target microcontroller device. The configuration and design system includes data files that specify hardware resources that are tracked as the designer selects user modules to program the microcontroller. Resource usage values are cumulatively tracked and displayed interactively in a resource manager workspace to enable the designer to keep constant track of the type of resources and the amount of resources used.

Abstract: A process-driven object management system for managing data and code modules is disclosed. The object management system includes a repository that stores objects, wherein ones of the objects referred to as “Asset elements” each describe a respective code or data module. The object management system includes a set of scripted tools for performing renovation, transformation, and code development tasks on the code and data modules. According to one aspect of the invention, the tool invocation constructs are stored as objects in the repository, such that some of the same object management tools and automated repository interface functions used to manage the Asset element can also be used to manage and veiw the tool objects.

Abstract: In a device containing trace control data which are stored in a data structure in a memory having memory cells and define memory areas including at least one or more adjacent memory cells, a procedure uses the trace control data taken from the data structure to ascertain the memory area and traces the data stored therein. This allows the data to be traced in a manner which is flexibly configurable during operation of the device, without retranslating the procedure.

Abstract: A computer code debugging system. The computer code debugging system preferably includes a first computer and a second computer, but this is not required in all embodiments. The first computer may be, for example, a high performance mainframe system having hosting a simulator and debugger, and the second computer may be, for example, a lower cost generic personal computer or workstation that has superior graphic user interface (GUI) capabilities relative to the first computer. In some embodiments, the GUI on the second computer includes windows for displaying high level source code, corresponding computer machine language code, and/or corresponding machine code binary, as desired. The high level window and/or the computer machine language window may be used in some embodiments to interactively control the simulation of the machine code binary on the first computer, as desired.

Abstract: A method for licensing codecs in accordance with the invention includes initiating a call from a first endpoint, the first endpoint identifying a preferred codec, receiving the call at a second endpoint wherein a licensed copy of the preferred codec is not included, and generating a codec license request from the second endpoint to the first endpoint and/or at least one third party codec provider.

Abstract: One or more virtual machines (VM's) run via a virtual machine monitor (VMM) on a hardware platform that has a segmented memory architecture. Each VM has at least one VM descriptor table that has, as entries, VM segment descriptors. At least one VMM descriptor table is established, including at least one shadow descriptor table that stores shadow descriptors for certain of the VM segment descriptors, which are then shadowed descriptors. The VMM compares the shadow descriptors with their respective corresponding shadowed VM descriptors, detects any lack of correspondence between the shadow descriptor table and the corresponding VM descriptor table, and updates and thereby synchronizes each shadow descriptor with its respective shadowed VM descriptor no later than, and preferably only upon the first use of, the respective descriptor by the VM.

Abstract: A method of handling conflicts between threads, including an initiating thread and at least one other thread, for at least one shared resource in a multi-threaded processing system having a processor and memory includes setting a location in memory for each other thread on the processor with the initiating thread. The initiating thread signals an inter-processor interrupt (IPI) to all other threads on the processor. For each other thread, an interrupt handler is initiated where each other thread: acknowledges receipt of the interrupt, and proceeds to spin on the respective location in memory that was set, thereby guaranteeing that the respective other thread will not be using any shared resource of the processor.

Abstract: Methods for dynamically allocating memory in a multiprocessor computer system such as a non-uniform memory access (NUMA) machine having distributed shared memory. The methods include allocating memory by specified node, memory class, or memory pool in response to requests by the system (kernel memory allocation) or a user (application memory allocation). Through these methods memory is allocated more efficiently in a NUMA machine. For example, allocating memory on a specified node in a NUMA machine, such as the same node on which a process requiring the memory is running, reduces memory access time. Allocating memory from a specified memory class allows device drivers with restricted DMA ranges to operate with dynamically allocated memory. Other benefits of these methods include minimizing expensive remote-memory accesses using a distributed reference count mechanism and lock-free cache access.

Abstract: A community of collaborative software agents works together in a domain to provide functionality such as provision of communications services or control of a chemical process. A scheduler is built into each collaborative agent which schedules tasks allocated to that particular agent and tasks sub-allocated by the agent. The scheduler has a mechanism for over-booking tasks for any one agent. It can also make tentative booking which can be overwritten of timed out.

Abstract: A method of performing a thread switching operation within a multithreaded processor includes detecting the dispatch of a first predetermined quantity of instruction information of a first thread, from an instruction streaming buffer to an instruction pre-decoder within the multithreaded processor. An absence of a flow of instruction information of the first thread into the instruction information source from an upstream source in a processor pipeline is detected. The elapsing of a predetermined time interval subsequent to the detection of the absence of the flow of the instruction information is also detected. Responsive to the detection of the dispatch of the first predetermined quantity of instruction information of the first thread, and responsive to the elapsing of the predetermined time interval, a thread switching operation is performed with respect to the output of the instruction streaming buffer.

Abstract: A method and program for dynamically sharing data between application environments such that the data persists beyond the termination of a data-providing application environment. In one embodiment of the invention, each of a plurality of HTML pages having respective applets are sequentially loaded within a visible frame store and retrieve data from an HTML page within a hidden frame. In this manner, the data produced by an applet persists beyond the termination of an HTML page providing the applet.

Abstract: An inventive protocol for communicating between a management processor and host processors allows for the cooperative management of resources among host processors within a partition and also among a set of partitions in a computer system, wherein each partition may function under an instantiation of an operating system with a group of host processors. The protocol employs a message passing system using mailbox pairs in fixed but moveable or relocatable locations within the computer system shared memory. The messages share a format having specific codes or descriptors that act as codes for coordination of message interpretation. These codes include at least a validity flag and a sequence enumerator, and in a response message of a request/response message pair, a status indicator. Additionally, routing codes and function codes and code modifiers may be provided. Specific implementation details and messages are described to enable the smooth functioning of complex multiprocessor systems.

Abstract: A system and method for logging events processed by an operating system is provided. The events logged can include interrupt and non-interrupt events, and can include user-defined events. Information concerning the interrupt events is initially written, during event handling time, into a first buffer while information concerning non-interrupt events is initially written, during event handling time, into a second buffer. Information from the two buffers is then written to a third buffer not during event handling time. Separating the interrupt event buffer from the non-interrupt event buffer rather than having one buffer, and writing relatively small amounts of data during event handling time to memory, rather than transporting data to slower non-memory mapped devices allows the event logger to be less intrusive and facilitates greater accuracy in event logging.

Abstract: A pseudo device driver is provided for use by an operation system in a virtual desktop computing environment. The driver has two ports, a master port that is opened by the driver application and a slave port accessed by a program. The two ports provide the functionality necessary for supporting the remote device on the terminal. When a program accesses a device coupled to the terminal, the program opens the pseudo device driver's slave port and proceeds as if the device were coupled to a local bus.

Abstract: A request message for transfer across an interface is formed by a method comprising the steps of representing each of a plurality of data chunks to be stored in the message by a respective chunk object, declaring each of the chunk objects as a variable on a program stack, storing a first data chunk in a first area of the message; storing a second data chunk in a second area of the message; and employing the chunk object representing the first data chunk to locate the first data chunk in the course of loading into the first chunk an offset value representing the location of the second chunk, wherein the offset value represents an offset from a base address of the message. The method enables an overloaded deference operator to employ an offset stored in a chunk object on the program stack to locate a particular chunk.

Abstract: A locking mechanism of an external optical disk drive. The locking mechanism of an external optical disk drive with a cover and an upper housing comprises a curved extension portion, a fixing support, a gear mount, a motor, and a switch. The curved extension portion includes two posts and is positioned at the cover. The fixing support is fixed on upper housing and the cover is pivotally coupled to the upper housing. The gear mount is positioned on the upper housing and includes a gear train. The motor is fixed on the gear mount and connected to and driving the gear train. The switch sends command to stop or start the motor when any one of the posts contacts the switch.

Abstract: A tray includes a substrate and a resin portion placed thereon by printing. The resin portion includes a first part placed along an edge on the disc loading side of the substrate, a second part placed along another edge on the disc unloading side of the substrate, and a third part placed between the first and second parts.

Abstract: A compact disk player/changer for compact disks fits within the standard half-height disk drive form factor for computer peripherals. A disk, either 5 ¼-inch or 3 ½ inch in size, is inserted through an aperture and supported, at opposite contact points on its edge, between laterally movable left and right-side disk guides. The disk's left side contacts a belt revolved on the left-side disk guide. The disk's right side contacts a fixed wall on the right-side disk guide. The belt slides along a rigid wall that prevents bowing from pressure exerted by the disk's edge. Thus, the right-side disk guide presents a flat movable wall that rolls the disk into the disk player along the fixed wall. The left and right-side disk guides move laterally to accommodate the disk as it is inserted. The spacing between the disk guides, once the disk is fully supported between the disk guides, is detected by a controller to determine the size of the disk.

Abstract: An optical disk adjusting assembly for an optical disk reading device. The optical disk adjusting assembly includes a chassis, a first guide rod, a second guide rod, an adjustable positioning element, a clamping plate, a disk rotating module and a disk reading module. The first guide rod and the second guide rod are respectively disposed on the chassis. The adjustable positioning element constrains two ends of the first guide rod and one end of the second guide rod. The clamping plate is secured to the chassis by screws and used to restrain a portion of the adjustable positioning element. Thus, the adjustable positioning element can constrain and adjust the two guide rods efficiently.

Abstract: A disc cartridge can prevent a disc from being damaged, and smoothly enable a disc rotation, by forming a protruding supporting member to have a predetermined height from an inner surface of a casing receiving the disc, and by preventing the disc from interfering with an outer surface of the casing or other components. The structure of the disc cartridge includes the casing receiving the disc, and a disc holder disposed separably at the casing, having tension arms elastically holding the disc, and guiding the disc into or out of the casing, the protruding supporting member having a predetermined height from the inner surface of the casing and being contacted with a non-recording region of the disc, which height is equal to or greater than a sum of a vertical deflection of the disc due to gravity, a vertical deflection of the tension arms, and an air gap which must be maintained between surfaces of the disc and flanges of the tension arms.

Abstract: The present invention provides systems and methods for flexible locking and unlocking programming content. Programming content and the content of the programming content is often described by electronic program guide (EPG) data or guide data. Using the guide data, a user is able to create, alter and unlock locks on the programming content. Locking and unlocking the programming content can be based on characteristics of the programming content such as the duration of the programming content, start times of the programming content, end times of the programming content, content descriptors and ratings of the programming content and the like. The ability to create and unlock locks is flexible and can be directed specifically to particular programs within a channel or to specific channels. The ability to create and unlock locks can further be based on user profiles such that the programming content provided to particular users is determined by the user's profile.

Abstract: Described are a method and apparatus for incorporating broadcast television into Web pages. Broadcast television can be embedded into Web pages using, for example, a “tv:” attribute in conjunction with common HTML tags. Within the “tv:” attribute, a Web-page author can reference a TV station by channel number, network, or broadcast call letters. HTML documents are parsed to recover both the conventional tags and tags that include TV attributes. The resulting Web pages display the identified broadcast TV in a frame specified by the TV attribute. One embodiment supports the presentation of television in the background of an HTML document. In that embodiment, HTML tags corresponding to overlying HTML content are provided with an attribute that defines a level of transparency from zero to one-hundred percent. The transparency attribute allows content providers to overlay any type of HTML information over a broadcast television show without completely obscuring the underlying show.

Abstract: A digital television translator includes a digital television receiver for receiving a first digital television signal at a first frequency and generating a digital transport stream from the first digital television signal. The digital transport stream can include original Program and System Information (PSIP) data having RX channel data that is indicative of the first frequency, the first major channel number, and/or the first minor channel number. The digital television translator also includes a PSIP update module for updating the original PSIP data in the digital transport stream by replacing the RX channel data with TX channel data. The TX data is indicative of a second frequency, a second major channel number, and/or a second minor channel number.

Abstract: A computer and internet-based system and method for providing television and radio programming information and channel assignments to users, which is based upon a household level determination of a location of the user.

Abstract: A television method and receiver are configured to receive a television broadcast signal that includes multimedia data files including hypertext data. The multimedia data files relate to a television program guide and the hypertext data includes address information that designates a linked multimedia data file. Once extracted and stored, a processor interprets the multimedia data files and generates a display signal including the television program guide and link portions based on the hypertext data. The processor is able to recognize and address information of each link portion that is pointed to by way of a user interface. The processor then retrieves the linked multimedia data file corresponding to the recognized address information and interprets the retrieved linked multimedia data file so as to generate the display signal.

Abstract: A web television includes a display, a tuner, an internet module, and a PIP module. The tuner is arranged to select television video for display on the display and to select television audio for display by a speaker of the web television. The internet module is arranged to supply internet video for display on the display and to supply internet audio for display by the speaker of the web television, and the internet video and audio are derived from internet communications between the web television and internet content providers. The PIP module is arranged to provide a PIP area within a main area of the display. The internet video and the television video may be swapped between the PIP area and the main area of the display, and the speaker of the web television may be swapped between the internet audio and the television audio.

Abstract: A feed signal equalizer for a feed amplifier for two-way coaxial cable systems, of the type having a distribution centre distributing feed signals, and having reception facilities for receiving return signals from said cable system, the system having feed amplifiers for receiving feed signals, and having return amplifiers, and the feed signal equalizers are settable to provide varying amplifier specifications, and having receptacles for receiving plug-in equalizer components for varying the specifications of the feed amplifier, the equalizer components having a range of varying performance characteristics so that a component can be selected and plugged in to the feed signal equalizer to produce the performance specifications desired at a predetermined location in the cable system.

Abstract: A power supply circuit in the tap device includes a first power supply circuit for generating a first power voltage of DC 24V to drive output switching relays, and a second power supply circuit for generating a second power voltage of DC 5V to be supplied to a receiving circuit and a microcomputer. The second power supply circuit lowers the voltage of the alternating-current power signal from the transmission line with a transformer, rectifies and smoothes the power signal with the lowered voltage, then generates the power voltage using a three-terminal regulator. The tap device can be used in CATV systems with different voltages of the alternating-current power signal employed, a power loss generated in the system with a high voltage is reduced, and the power consumption of the tap device can be suppressed.