Abstract: A method for producing an electrode enabling fabrication of small electrodes at a high dimensional accuracy without being affected by the number of connections between chips, comprising the steps of forming an insulating film on an interconnection pattern of a semiconductor chip, forming a mask layer having an opening on the insulating film at a position where an electrode is to be formed, removing the insulating film within the opening by using the mask layer as a mask to expose a portion of the interconnection pattern, forming a conductor layer on the exposed interconnection pattern and the mask layer, removing the conductor layer formed on the mask layer while leaving the conductor layer formed on the exposed interconnection pattern, and removing the mask layer, and a method for producing a semiconductor device provided with such electrode.

Abstract: A method for forming a via in a damascene process. In one embodiment, the present method comprises depositing a material into a via formed using a damascene process. More particularly, in one embodiment, the material which is comprised of a substantially conformal material which has an etch selectivity with respect to the substrate into which the via is formed. Furthermore, in this embodiment, the material is deposited along the sidewalls and the base of the via. Next, the present embodiment etches material such that the via is formed having a profile conducive to the adherence of overlying material thereto. In this embodiment, the etching of the material is performed without substantially etching the substrate into which the via is formed. In so doing, the present embodiment creates a via in a damascene process which allows for the formation of a metallized interconnect which is substantially free of voids.

Abstract: A metal-insulator-metal (MIM) capacitor is made according to a copper dual-damascene process. A first copper or copper alloy metal layer if formed on a substrate. A portion of the first metal layer is utilized as the lower plate of the MIM capacitor. An etch stop dielectric layer is used during etching of subsequent layers. A portion of an etch stop layer is not removed and is utilized as the insulator for the MIM capacitor. A second copper or copper alloy metal layer is later formed on the substrate. A portion of the second metal layer is utilized as the upper plate of the MIM capacitor.

Abstract: A method for manufacturing contact holes with spacers between a substrate and an interconnect layer or between two interconnect layers is disclosed. The method produces contact holes with a relatively uniform CD from top to bottom, i.e. without a rounded top, thereby increasing the reliability of the contact hole. A dielectric layer, antireflective layer and patterned photoresist layer are deposited in sequence over a substrate or bottom interconnect layer. Contact holes are etched into the antireflective layer and the dielectric layer exposing a surface of the substrate or bottom interconnect layer. A spacer material is deposited onto the antireflective layer and into the contact holes. The spacer material is then anisotropically etched from the antireflective layer, leaving the spacer material in the contact holes. The etching process preferably removes the spacer material at a faster rate than the antireflective coating layer.

Abstract: The present invention is directed to a method of forming a dual damascene pattern in a fabrication process of a semiconductor device, which is capable of simplifying a fabrication process of a semiconductor device by filling a via hole with a photoresist, using a reflow phenomenon of the photoresist, in an ashing process.

Abstract: A method for forming an adhesion/barrier liner with reduced fluorine contamination to improve adhesion and a specific contact resistance of metal interconnects including providing a semiconductor wafer having a process surface including an etched opening extending through a dielectric insulating layer thickness and in closed communication with a conductive underlayer surface; pre-heating the semiconductor wafer in a plasma reactor to a pre-heating temperature of at least about 400° C.; cleaning the etched opening according to a plasma assisted reactive pre-cleaning process (RPC) comprising nitrogen trifluoride (NF3); and, blanket depositing at least a first adhesion/barrier layer over the etched opening substantially free of fluorine containing residue.

Abstract: Perform an atomic layer deposition (ALD) at least once to form a continuous metal seed layer (CMSL) on the barrier layer, wherein the atomic layer deposition comprises: a mixing gas of hydrogen and silane, such as hydroxy silane or tetrahydroxy silane, is transported on the barrier layer; next, perform a purge/vacuum process; then a reactive gas, such as WF6, is transported to form the continuous metal seed layer (CMSL); the cycle step of the atomic layer deposition (ALD) can be repeated to form the thickness of the continuous metal seed layer (CMSL) about 20 to 40 Å.

Abstract: A method for forming a metal thin film is suitable for suppressing the deterioration of a throughput according to enlarging a purge time to prevent the metal precursor from mixing with a reaction gas in a reactor during the deposition of an atomic layer. The method includes the steps of flowing a reaction gas into a reactor loaded therein a substrate, flowing a metal precursor in a pulse form into the reactor, activating the reaction gas by exiting a plasma in a pulse form to change with a pulse of the metal precursor in the reactor, alternately and depositing a metal thin film in a unit of an atomic layer by reacting the activated reaction gas with the metal precursor.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a mask on a predetermined layer, said mask having a first opening at a given side of the predetermined layer and a second opening that continues to and is smaller than the first opening, and forming a plating layer on the predetermined layer by using the mask.

Abstract: A bi-layer BARC/hardmask structure includes a layer of amorphous carbon and two or more distinct and independently formed layers of a PECVD material such as SiON formed on the amorphous carbon layer. By independently forming several layers of PECVD material, at least some pinholes that are present in the lowermost PECVD layer are closed by upper PECVD layers and therefore do not extend through all of the PECVD layers. As a result the upper surface of the uppermost PECVD layer has a lower pinhole density than the lower PECVD layer. This reduces photoresist poisoning by dopant in the amorphous carbon layer, and etching of the amorphous carbon layer by photoresist stripping chemistry.

Abstract: A double layered low dielectric constant material dual damascene metallization process is described. Metal lines are provided covered by an insulating layer overlying a semiconductor substrate. A first organic dielectric layer is deposited overlying the insulating layer. A second inorganic dielectric layer is deposited overlying the first dielectric layer. In a first method, a via pattern is etched into the second dielectric layer. The via pattern is etched into the first dielectric layer using the patterned second dielectric layer as a mask. Thereafter, a trench pattern is etched into the second inorganic dielectric layer to complete dual damascene openings. In a second method, a trench pattern is etched into the second dielectric layer. Thereafter, a via pattern is etched through the second inorganic dielectric layer and the first organic dielectric layer to complete dual damascene openings. In a third method, a via pattern is etched into the second dielectric layer.

Abstract: A method is provided for blocking implants from the gate electrode of an FET device. Form a first planarizing film covering the substrate and the gate electrode stack. The first planarizing film is planarized by either polishing or self-planarizing. For deposition by HDP or use of spin on materials, the film is self-planarizing. Where polishing is required, the first planarizing film is planarized by polishing until the top of the gate electrode is exposed. Etch back the gate electrode below the level of the upper surface of the first planarizing film. Then deposit a blanket layer of a second planarizing film and polish to planarize it to a level exposing the first planarizing film, forming the second planarizing film into an implantation block covering the top surface of the gate. Remove the first planarizing film. Form the counterdoped regions by implanting dopant into the substrate using the implantation block to block implantation of the dopant into the gate electrode.

Abstract: Methods of oxidizing the surface of a photoresist material on a semiconductor substrate to alter the photoresist material surface to be substantially hydrophilic. Oxidation of the photoresist material surface substantially reduces or eliminates stiction between a planarizing pad and the photoresist material surface during chemical mechanical planarization. This oxidation of the photoresist material may be achieved by oxygen plasma etching or ashing, by immersing the semiconducter substrate in bath containing an oxidizing agent, or by the addition of an oxidizing agent to the chemical slurry used during planarization of the resist material.

Abstract: A method of making a semiconductor device (10) includes depositing a first conductive layer (50) on a first surface (41) to control a channel (70) of the semiconductor device at a second surface (40) perpendicular to the first surface. The method further includes etching a first dielectric film (32) to form a gap (53) between the first surface and a control electrode (68) of the semiconductor device, and depositing a conductive material (56) in the gap to electrically connect the first conductive layer to the control electrode.

Abstract: A method is provided for forming a self aligned contact by etching an opening through a low doped or undoped dielectric layer such as phosphosilicate glass. The dielectric layer may be formed on a semiconductor layer which may include regions of monocrystalline silicon and undoped silicon dioxide. A first portion of a dielectric layer may be etched with a first etch chemistry, and a second portion of the dielectric layer may be etched with a second etch chemistry. The first etch chemistry may be substantially different than the second etch chemistry. In this manner, the first etch chemistry may have a substantially different etch selectivity than the second etch chemistry. For example, in an embodiment, the first etch chemistry may be selective to silicon nitride, and the second etch chemistry may be selective to undoped silicon oxide.

Abstract: A process for optically reducing charge build-up in an integrated circuit includes exposing the integrated circuit or portions thereof to a broadband radiation source. The process effectively reduces charge buildup that occurs in the manufacture of integrated circuits.

Abstract: A protective tape is applied by a tape applying mechanism on a surface of a wafer suction-supported by a chuck table. The protective tape is cut to the shape of the wafer by a cutter unit. This process is repeated a plurality of times to apply protective tape in a plurality of plies to the wafer surface. The protective tapes applied are separated successively, starting with an uppermost tape, by a separating mechanism of a tape separating apparatus.

Abstract: A method of forming a semiconductor structure comprises forming a nitride layer on a stack, and etching the nitride layer to form spacers in contact with sides of the stack. The stack is on a semiconductor substrate, the stack comprises (i) a gate layer, comprising silicon, (ii) a metallic layer, on the gate layer, and (iii) an etch-stop layer, on the metallic layer. The forming is by CVD with a gas comprising SixL2x, L is an amino group, and X is 1 or 2.

Abstract: The present invention pertains to a more efficient system and method for forming rectifying junction contacts in PIN alloy-semiconductor devices using photoelectrical and chemical etching. The present invention provides a means of creating rectifying junction contacts on alloy-semiconductor devices such as CdTe and CdZnTe, among others. In addition, the present invention also provides a simple and low cost method for revealing wafer surface morphology of alloy-semiconductors, thus providing an efficient and effective means for selecting single grain semiconductor substrates. Further, the present invention provides radiation detectors employing such alloy-semiconductor devices having improved rectifying junctions as the detector element.

Abstract: A passive integrated component (10) is formed overlying a semiconductor substrate by etching a composite conductive layer using a solution of sodium persulfate or ceric ammonium nitrate to remove a lower portion of the composite copper layer (64) exposed by an upper portion of the composite copper layer (74, 76, 78) to expose an underlying surface (62).

Abstract: A wiring circuit block is produced by forming a release layer on one of planarized principal surfaces of a mother substrate, forming an insulating layer on the release layer, patterning the insulating layer and forming a wiring layer on the patterned insulating layer, and separating the insulating layer and wiring layer from the release layer on the mother substrate. The circuit block has components, and deposited on the wiring layer, and is mounted on a base circuit board to provide a wiring device. Also, semiconductor chips are mounted on the circuit block, and the circuit block is mounted on a base circuit board to provide a semiconductor device.

Abstract: A method of formation of a damascene FSG film with good adhesion to silicon nitride in an HDP-CVD system. Silane (SiH4), silicon tetrafluoride (SiF4), oxygen (O2) and argon (Ar) are used as the reactant gases. SiH4, SiF4, and O2 react to form the FSG. Ar is introduced to promote gas dissociation. All four gases are used for depositing most of the FSG film. SiH4 is not used during deposition of the interfacial part of the FSG film. The interfacial part of the FSG film refers either to the topmost portion, if silicon nitride is to be deposited on top of the FSG or the bottom portion if the FSG is to be deposited on top of silicon nitride. Using SiH4 with the SiF4 tends to mitigate the destructive effects of SiF4 throughout most of the deposition. By removing the SiH4 from the deposition of the interfacial part of the FSG film less hydrogen is incorporated into the film in the interfacial region and adhesion to overlying or underlying silicon nitride is improved.

Abstract: An integrated circuit includes at least one porous silicon oxycarbide (SiOC) insulator, which provides good mechanical strength and a low dielectric constant (e.g., &egr;R<2) for minimizing parasitic capacitance. The insulator provides IC isolation, such as between circuit elements, between interconnection lines, between circuit elements and interconnection lines, or as a passivation layer overlying both circuit elements and interconnection lines. The low dielectric constant silicon oxycarbide isolation insulator of the present invention reduces the parasitic capacitance between circuit nodes. As a result, the silicon oxycarbide isolation insulator advantageously provides reduced noise and signal crosstalk between circuit nodes, reduced power consumption, faster circuit operation, and minimizes the risk of potential timing faults.

Abstract: The present invention teaches the deposition of a pattern of interconnecting lines and bond pads. Passivation layers are deposited over this metal pattern. A layer of photosensitive polyimide is deposited over the passivation layers. This layer of photosensitive polyimide is patterned, exposed and developed to expose the underlying bonding pads. The remaining polyimide is cured and cross-linked and remains in place to serve as a buffer during further device packaging. Key to the present invention is that the remaining photosensitive polyimide is not removed after the bond pad has been exposed.

Abstract: A novel visible light curable composition for forming a thermally conductive interface and a method of using the same is provided. The composition is used to promote the transfer of heat from a source of heat such as an electronic device to a heat dissipation device such as a heat sink. The composition includes an elastomeric base matrix containing a light curable catalyst, loaded with a thermally conductive filler material such as boron nitride grains or ceramic filler. After the compound is prepared, it is screen or stencil printed onto the desired surface and cured by exposure to visible light. The thermal interface is bonded to the desired surface and has sufficient compressibility to allow it to overcome the voids in the mating surface to which the assembly is mounted.

Abstract: A method for low temperature liquid-phase deposition and a method for cleaning a liquid-phase deposition apparatus are disclosed. The method for low temperature liquid-phase deposition is employed so as to form a low-temperature grown film or a film with excellent step-coverage on the surface of a semiconductor device having independent circuit functions. The method for cleaning liquid-phase deposition apparatus is characterized in that a loop used exclusively for cleaning is employed so as to prevent SiO2 powders from remaining in the loop.

Abstract: A method of nitriding a gate oxide layer by annealing a preformed oxide layer with nitric oxide (NO) gas is disclosed. The nitridation process can be carried out at lower temperatures and pressures than a conventional nitrous oxide anneal while still achieving acceptable levels of nitridation. The nitridation process can be conducted at atmospheric or sub-atmospheric pressures. As a result, the nitridation process can be used to form nitrided gate oxide layers in-situ in a CVD furnace. The nitrided gate oxide layer can optionally be reoxidized in a second oxidation step after the nitridation step. A gate electrode layer (e.g., boron doped polysilicon) can then be deposited on top of the nitrided gate oxide layer or on top of the reoxidized and nitrided gate oxide layer.

Abstract: A process for the heat treatment of a silicon wafer, during which the silicon wafer is at least temporarily exposed to an oxygen-containing atmosphere, the heat treatment taking place at a temperature which is selected in such a way that the inequality [ Oi ] < [ Oi ] eq ⁢ ( T ) ⁢ exp ⁢ ( 2 ⁢ σ SiO 2 ⁢ Ω rkT ) is satisfied, where [Oi] is the oxygen concentration in the silicon wafer [Oi]eq(T) is the limit solubility of oxygen in silicon at a temperature T, &sgr;SiO2 is the surface energy of silicon dioxide &OHgr; is the volum

Abstract: A composite yarn formed of a core yarn and a cover yarn, wherein one of the core yarn and the cover yarn is a fluid-soluble strand and the other of the core yarn and cover yarn is a non-fluid-soluble strand. The composite yarn can be knitted into an intermediate fabric product. The soluble element is dissolved to leave a use fabric suitable for other processing, such as coating with materials such as latex, the non-fluid-soluble strand may be either a single strand or multi-filaments of steel wire.

Abstract: An airbag fabric is made from multifilament yarns each comprised of a plurality of individual filaments, with each filament having a linear density in the range from about eight (8) decitex to eleven (11) decitex per filament, and more preferably a linear density in the range from about nine (9) decitex to about eleven (11) decitex per filament. The fabric has a circular bend stiffness in the range of about four (4) Newtons to about seven (7) Newtons, as measured in accordance with ASTM method D4032-94.

Abstract: Disclosed is an absorbent article including: a liquid permeable surface layer; a backing sheet; and an absorbent layer interposed between the surface layer and the backing sheet. The surface layer includes: a porous film having a plurality of through holes; and a fibrous layer disposed on the liquid-receiving face of the porous film. The fibrous layer is of a plurality of strips extending in parallel and spaced apart from each other. Each strip of the fibrous layer is fixed to the porous film at spaced fixing portions, so that the porous film is exposed between adjacent strips of the fibrous layer.

Abstract: A new and improved hybrid of Ga:La:S (GLS) glass is provided, namely a glass comprising gallium sulfide, lanthanum oxide, and at least 2 mol % lanthanum fluoride. The Ga:La:S:O:F (GLSOF) glass retains the important properties of the Ga:La:S system, while introducing improved thermal stability and spectroscopic properties. In addition, GLSOF glasses are non-toxic. The glass formation region for GLSOF has been carefully evaluated with compositional variations. It has been identified that an area of glass formation as indicated by circles, is a new and previously undiscovered glass formation region.

Abstract: The invention relates to a fire resistant substance and to a method for producing a fire-resistant lining. The fire-resistant substance contains MgO sinter and up to 5 wt. % of a reducing agent selected from the group consisting of substances that contain carbon. The lining has several layers with decreasing quantities of reducing agents.

Abstract: The present invention relates to a catalytic composition which comprises a beta zeolite, a metal of group VIII, a metal of group VIB and optionally one or more oxides as carrier. The catalytic system of the present invention can be used for the hydrotreating of hydrocarbon mixtures and more specifically in the upgrading of hydrocarbon mixtures having boiling ranges within the range of 35° to 250° C., containing sulfur impurities, i.e. in hydrodesulfuration with contemporaneous skeleton isomerization and a reduced hydrogenation degree of olefins contained in said hydrocarbon mixtures, the whole process being carried out in a single step.

Abstract: The present invention relates to a catalyst for homo- or co-polymerization of ethylene, or more particularly to a solid titanium catalyst supported on a magnesium-containing carrier, having high catalytic activity and excellent polymerization properties, which can provide polymers of high bulk density and reduce the amount of polymers dissolvable in a medium during polymerization.

Abstract: A metallocene catalyst may be temporarily and reversibly passivated by contact with an effective amount of an unsaturated hydrocarbon passivating compound.

Abstract: A catalyst for removing dioxin and a preparation method thereof. The catalyst is prepared by recycling a spent catalyst discharged from a hydro-desulfurization process of an oil refinery in which the spent catalyst comprises an alumina support (preferably, gamma alumina) with a large specific surface area impregnated with high contents of vanadium. The spent catalyst is mixed with a tungsten-impregnated titania, whereby a catalyst comprising suitable metal components and a mixture support of alumina and titania may be prepared. The catalyst in accordance with the present invention has excellent dioxin removal performance and low preparation cost because of recycling the spent catalyst.

Abstract: The present invention is provided a method of a high stability selectable hydrogenate catalyst producing and using for MCHD manufacturing. The present invention comprised a preparing procedure for Ru/Al2O3 catalyst including an activity raising procedure for said catalyst including and a DMCHD manufacturing process which said high stability catalyst is used for a selectable hydrogenating reaction.

Abstract: Catalytic composition comprising copper chloride, magnesium chloride and potassium chloride deposited on an alumina, which may be used in particular for the oxychlorination of ethylene into 1,2-dichloroethane. In the processes for the oxychlorination of ethylene in oxygen in a fluid bed, this catalytic composition makes it possible to obtain an excellent yield of 1,2-dichloroethane without causing the deposition of soiling material on the surface of the bundle of tubes of the heat exchanger located in the reactor.

Abstract: A sorbent composition comprising a support and a reduced-valence noble metal can be used to desulfurize a hydrocarbon-containing fluid such as cracked-gasoline or diesel fuel.

Abstract: Thermosensitive recording materials such as thermal paper have printed indicia of high quality on the back thereof printed on a backcoating. This backcoating also incorporates an optically variable compound which provides a security feature.

Abstract: Described are herbicide compositions, in particular, herbicide compositions that are prepared from microemulsions containing herbicide compound in acid form, and methods of their preparation and use.

Abstract: Additives for drilling fluids, in particular for water-based drilling fluids are described which when added to the fluid at levels of up to 10% weight by volume reduces the accretion and bit-balling tendencies of shale cuttings exposed to said fluids. The additives are based on phosphonate chemistry, and are of the general class (I), wherein R, R′ and R″ are radicals exclusively containing H atoms or combinations of H, C, O or P atoms up to a maximum of 100 atoms.

Abstract: A low molecular weight, high melting point, crystalline, oil soluble additive for use in wellbore fluids is provided that is preferably a ground crystalline material of melting point over 80° C., preferably over 100° C. which is readily soluble in produced hydrocarbons such as crude oil and lighter condensates, and which exhibits a molecular weight of less than 1000, and preferably less than 500, and more preferably less than 300. Its particle size can be adjusted to bridge efficiently across different pore size formations and control its solubility rate.

Abstract: The use of a hydrophobically modified water soluble polymer is described capable of being chemically cross-linked so as to produce a stable gel for blocking a water-bearing formation from a hydrocarbon-producing well. The polymer is essentially linear having hydrophilic side groups located at random positions along its backbone.

Abstract: A heterocyclic ring-containing compound represented by the following formula (1). In the formula, D represents a heterocyclic ring residue having a 5- to 7-membered ring structure and substituted with (m+n) of substituents, X represents a divalent linking group consisting of a single bond, NR3 group (R3 represents a hydrogen atom or an alkyl group having 1-30 carbon atoms), an oxygen atom, a sulfur atom, a carbonyl group, a sulfonyl group or a combination thereof, R1 represents an alkyl group, an alkenyl group, an alkynyl group, an aryl group or a heterocyclic group, which may be substituted or unsubstituted, R2 represents a halogen atom, a hydroxy group, an unsubstituted amino group, a mercapto group, a cyano group, a sulfide group, a carboxy group or salt thereof, a sulfo group or salt thereof, a hydroxyamino group, a ureido group or a urethane group, m represents 1 or 2, and n represents an integer of 1 or larger.

Abstract: A certain combination of an oil-soluble fatty acid ester of a polyhydric alcohol and an oil-soluble fatty acid amide act as appropriate friction-modifying agents, which when added to a lubricating oil, exhibit good brake anti-chatter characteristics.

Abstract: A new additive for water based metal cutting and grinding coolant comprises a combination of soybean oil and surfactant, the surfactant being a nonoxynol or alcohol based detergent that is biodegradable. The proportion of soybean oil to surfactant is adjusted for metal cutting or grinding and the proportion of additive to water is also adjusted for metal cutting or grinding. A small amount of bacteriocide may be added to the additive to avoid rancidity.

Abstract: A family of slurries useful in modifying exposed surfaces of wafers for semiconductor fabrication are provided along with methods of modifying exposed surfaces of wafers for semiconductor fabrication utilizing such a family of working slurries, and semiconductor wafers.

Abstract: Aqueous acidic solutions of hydrogen peroxide used for metal surface treatments may be stabilized to decrease the rate of hydrogen peroxide decomposition by the use of an aryl sulfonic acid such as phenol sulfonic acid in combination with a triazole such as tolyltriazole.