Abstract: A charging device includes a battery voltage detecting circuit for detecting the voltage of a battery pack; and a microcomputer having RAM for temporarily storing a battery voltage detected by the battery voltage detecting circuit, and a CPU for calculating a battery voltage gradient from the battery voltage detected by the battery voltage detecting circuit and a battery voltage sampled a prescribed time earlier. The charging device determines that the life of the battery has expired when the voltage of the battery pack prior to charging is less than or equal to a prescribed value J and the battery voltage gradient within a prescribed time period after the start of charging is greater than or equal to a first prescribed value K. The charging device also includes a display circuit for notifying the user when the life of the battery pack has deteriorated.

Abstract: A device or a method for supplying a current to a load. A peripheral temperature of the load is detected. Based on the detected peripheral temperature and a predetermined time period, the unit amount of the current being supplied is switched between a first current and a second current.

Abstract: A charging operation for a battery includes determining an actual full charge capacity of the battery and a design capacity of the battery. The actual full charge capacity of the battery is compared with the design capacity of the battery. One or more of a charge voltage and a cut-off current, such as with an embedded controller, is adjusted if the actual full charge capacity is less than the design capacity. The battery is controlled by charging the battery with one or more of an adjusted cut-off current and/or an adjusted charge voltage.

Abstract: The invention provides a specific battery detection means that specifies single batteries believed to be in an excess discharge state during operation of the electric motor for starting the engine, based on data for each battery pack detected prior to starting the engine. With the specific battery detection means, a change in voltage for specific single batteries is measured for a drop in voltage of a single battery by the discharge via the voltage detection means. The specific battery detection means is configured such that if the results of this measurement are outside a predetermined threshold value, the power supplied to the electric motor for starting the engine is limited.

Abstract: A switching power supply source including an inductance with first and second terminals; an output node; an NMos transistor, the drain of which is connected to the first terminal; a PMos transistor, the drain of which is connected to the first terminal; a control device generating control signals for NMos and PMos transistors assuring that these transistors are not conducting simultaneously; a capacitor with a third terminal connected to the first terminal and a fourth terminal; a resistance with a fifth terminal connected to the fourth terminal and a sixth terminal; and an NMos transistor the drain of which is connected to the grid of the PMos transistor and the gate of which is connected to the fourth terminal.

Abstract: The present invention is directed generally to a buck converter that achieves zero voltage switching (ZVS). According to various embodiments, the buck converter comprises a ZVS circuit for storing reverse recovery current from the diode of the buck converter and using the energy from the reverse recovery current to discharge parasitic capacitance of the primary switch of the buck converter prior to turn-on of the primary switch such that the primary switch turns on with substantially zero voltage across the switch. The ZVS circuit may comprise a capacitor, an auxiliary switch connected in series with the capacitor, and an auxiliary inductor connected in parallel with the series-connected capacitor and auxiliary switch.

Abstract: Disclosed is a power regulator for providing precisely regulated power to a microelectronic device such as a microprocessor. Improved power regulation is accomplished by optimizing the power efficiency of the power regulator. In particular, in a multiphase system, the number of active phases is increased or decreased to achieve optimum power efficiency. The multiphase voltage regulator adapts the operating mode to maximize efficiency as the load current demand of the load device changes by adjusting the number of active phases to maximize efficiency. The total value of current provided by the regulator and the total number of active phases is determined, the total number of active phases is compared with the number of active phases required to provide the total value of current at maximum efficiency; and the number of active phases is adjusted to provide the total value of current at maximum efficiency.

Abstract: An electronic power unit includes first and second MOS transistors and a digital control circuit. The first MOS transistor applies a voltage to the load. The second MOS transistor remains on while the first MOS transistor remains off and rectifies the current flowing in the load. The digital control circuit turns on the first transistor upon lapse of a first time interval from the time the second MOS transistor is turned off. The digital control circuit turns on the second MOS transistor upon lapse of a second time interval from the time the first MOS transistor is turned off. The digital control circuit controls the on-period of the first MOS transistor so that the voltage applied to the load is constant in a discontinuous conduction mode. The digital control circuit determines, while the voltage applied to the load is constant, an optimal value of the first time from the duty.

Abstract: Switchmode DC-DC power converters using one or more non-Silicon-based switching transistors and a Silicon-based (e.g. CMOS) controller are disclosed. The non-Silicon-based switching transistors may comprise, but are not necessarily limited to, III-V compound semiconductor devices such as gallium arsenide (GaAs) metal-semiconductor field effect transistors (MESFETs) or heterostructure FETs such as high electron mobility transistors (HEMTs). According to an embodiment of the invention, the low figure of merit (FoM), ?FET, of the non-Silicon-based switching transistors allows the converters of the present invention to be employed in envelope tracking amplifier circuits of wireless devices designed for high-bandwidth technologies such as, for example, EDGE and UMTS, thereby improving the efficiency and battery saving capabilities of the wireless devices.

Abstract: In a converter device, an N-type FET is connected in series between an input terminal and an output terminal and an N-type FET is connected between the side of the output terminal of the N-type FET, and a ground terminal. A smoothing circuit and a comparator circuit are connected to the side of the output terminal of the circuits. The output side of the comparator circuit is connected to an H/S driver circuit controlling the N-type FET1 through an inverter and directly connected to an L/S driver circuit controlling the N-type FET2. A reference voltage correction circuit is included in the comparator circuit, and the comparator circuit outputs an appropriate switching control signal by comparing a correction reference voltage, obtained through comparison of a divider voltage in accordance with the time average value of an output voltage with a reference voltage, with the divider voltage.

Abstract: An End-Point Prediction scheme is described for voltage-mode buck regulators to generate adaptive output voltage to integrated-circuit systems. Internal nodal voltages of the regulator controller are predicted and set automatically by the proposed algorithms and circuits. The settling time of the regulator can therefore be significantly reduced for faster dynamic responses, even with dominant-pole compensation.

Abstract: Controlled compensation for a switching regulator is attained by detecting switching duty cycle of the switching regulator, developing a compensation signal having a time duration that is related to the detected switching duty cycle percentage, and generating a duty cycle control signal for the regulator that is dependent in part on the developed compensation signal.

Abstract: A dual-edge modulation controller including first and second ramp circuits, first and second comparators, an error amplifier and pulse control logic. The first ramp circuit provides a leading-edge ramp synchronous with a clock. The error amplifier compares a feedback signal with a reference and provides a compensation signal. The first comparator compares the leading-edge ramp with the compensation signal and asserts a set signal. The second ramp circuit provides a trailing-edge ramp that begins ramping when the set signal is asserted. The second comparator compares the trailing-edge ramp with the compensation signal and asserts a reset signal. The pulse control logic asserts a PWM signal when the set signal is asserted and de-asserts the PWM signal when the reset signal is asserted. The controller may control multiple phases with current balancing. The slew rate of the ramps may be adjusted based on the number of PWM signal asserted.

Abstract: An inverter apparatus is incorporated with a built-in programmable logic-controller (PLC). The PLC includes internal memory for directly outputting control signal to provide inverter operation control without time delay and noise. The inverter apparatus includes external terminals for function assignment and an external program can be coded for expanding the function of the inverter apparatus through the external terminals. The inverter apparatus of the present invention can overcome the problems of limited function and complicated wiring.

Abstract: A multiphase DC-DC converter is provided that includes a multiphase transformer, the multiphase transformer including a plurality of input voltage terminals and an transformer output voltage terminal, each input voltage terminal associated with a corresponding phase. Each phase is assigned to an input voltage terminal of the plurality of input voltage terminals to minimize a ripple current at the input voltage terminals of the multiphase transformer.

Abstract: An integrated circuit has an analog output circuit for outputting an analog signal and a leadless terminal for connecting an output line of the analog output circuit to a circuit board by soldering, and measures and transfers an analog output voltage of the leadless terminal in a state in which it is mounted on the circuit board. A measuring unit has a switching unit for connecting the analog output circuit to the measuring unit upon failure diagnosis, and an AD converter for measuring the analog output voltage of the leadless terminal in a failure diagnosis state obtained by the switching unit; and causes the analog output voltage of the leadless terminal to be determined whether it is a normal voltage or an abnormal voltage by transferring the voltage measured by the AD converter to a determination unit through serial transfer.

Abstract: Spectrum analyzer circuits and methods are provided which implement “zero-IF” (direct conversion) or “near-zero IF” (or very low IF) architectures that enable implementation of integrated (on-chip) spectrum analyzers for measuring the frequency spectrum of internal chip signals. An integrated spectrum analyzer circuit, which comprises a zero IF or near-zero IF framework, enables a low-power compact design with sufficient resolution bandwidth for on-chip implementation and diagnostics of internal chip signals.

Abstract: A method includes receiving an activation signal at a semiconductor device and generating an output power signal at the semiconductor device in response to receiving the activation signal. The output power signal has a duty cycle. The method also includes providing the output power signal to a load. The output power signal provides power to the load. An amount of power provided to the load is based on the duty cycle of the output power signal. In addition, the method includes adjusting the duty cycle of the output power signal using at least one of a current limiter and a power limiter integrated in the semiconductor device.

Abstract: A method and apparatus for maximizing the usage of a testhead of an in-circuit tester is presented. A testhead execution supervisor interfaces between a testhead controller and a graphical user interface used to enter manual tests. The testhead execution supervisor adds tests to be submitted to the testhead to one or more queues according to a priority scheme. Tests may be submitted to the testhead execution supervisor both as manual tests entered via the graphical user interface and as automatically generated tests generated by an automatic debug module. The automatic debug module may automatically generate tests for execution by the testhead that are executed when the testhead is idle, for example when no higher priority manual tests are scheduled.

Abstract: A flexible semiconductor test structure that may be incorporated into a semiconductor device is provided. The test structure may include a plurality of test pads designed to physically stress conductive lines to which they are attached during thermal cycling. By utilizing test pads with different dimensions (lengths and/or widths), the effects of thermal stress generated by a plurality of conductive lines having corresponding different dimensions may be simulated.

Abstract: The inertial sensor comprises a piezoelectric plate having a vibrator member defined therein carrying excitation electrodes connected to an excitation circuit including conductor tracks carried by the piezoelectric plate the excitation circuit including a disturbing circuit portion in which the excitation circuit has compensation branches associated with corresponding disturbing conductor track portions, each compensation branch having one end connected to the corresponding disturbing conductor track portion and extending on a side of the midplane that is opposite from the side on which the corresponding disturbing conductor track portion extends.

Abstract: This invention relates to a speed monitor apparatus for monitoring speed and acceleration of rotating turbine equipment (turbomachinery) and for operating an overspeed trip to shut down the equipment in the event that the speed or acceleration exceed predetermined thresholds. The invention provides a speed monitor module having an output switch comprising a plurality of armature clamped relays such that first armatures form a first electrical path only when both first armatures are open or when both first armatures are closed and second armatures provide a second electrical path when either or both second armatures are open or closed such that the second electrical path is discontinuous when either first armature is stuck in an open or closed position causing either second armature to remain floating between an open and closed position.

Abstract: A magnetic encoder includes a metallic reinforcing ring and a magnetic ring attached to the metallic reinforcing ring, and is composed of a mixture of an elastic element and a magnetic material. A front side of the magnetic ring is formed into a roughly uneven surface having a roughness of Ra 0.2 to 10.0 or Ry 2 to 100.0.

Abstract: A magnetic sensor for detecting an object includes: a detection portion including one half bridge, which has two spin valve type electro-magnetic transformation devices disposed on a substrate; and a magnet near the detection portion having a magnetic field changeable in accordance with influence of the object. The spin valve type electro-magnetic transformation devices are arranged with respect to the magnet in such a manner that a direction of a magnetic field to be applied to one of the spin valve type electro-magnetic transformation devices is opposite to a direction of a magnetic field to be applied to the other one of the spin valve type electro-magnetic transformation devices.

Abstract: A rotary control assembly (400) for a communication device includes a magnetic sensor (410) integrated within a housing (406) and a magnet (404) integrally coupled to a rotary control (402) for controlling the magnetic sensor. User rotation of the rotary control (402) and integral magnet (404) controls resistance of the magnetic sensor (410). The variation in resistivity of the magnetic sensor (410) corresponds to selection options associated with the rotary control. The rotary control assembly (400) provides a self-sealed environment. Either continuous variable control or defined detent control can be incorporated into a communication device using assembly (400).

Abstract: In the present invention, a coil generating DC magnetic field applied to a magnetic head is divided into two in that a first coil and a second coil, which are provided on a frame shape core. An distance of an air gap is shortened, a slider head is held on a table having a top end portion of thin thickness, while advancing and retreating the table in the direction perpendicular to the core, the head slider is inserted into the air gap from the lateral direction. Thereby, the distance of the air gap is reduced to about half of the conventional one and a reduction of inductance of the first coil and the second coil is realized.

Abstract: A pair of cores are arranged such that first end portions thereof face to each other with a gap via a conveying path through which a medium to be detected passes. Coils wound at the first end portions of the cores, respectively, are connected in series to each other, thereby constituting a first coil. Coils wound at second end portions on a side opposite to the first end portions are connected in series to each other, thereby constituting a second coil. There are provided an exciting coil which generates a detection magnetic field passing the cores and the gap, and a convergent magnetic field generating unit which generates, in the gap, a convergent magnetic field for converging the detection magnetic field in a direction perpendicular to a direction in which the first end portions of the cores are connected to each other.

Abstract: A magnetic field response sensor comprises an inductor placed at a fixed separation distance from a conductive surface to address the low RF transmissivity of conductive surfaces. The minimum distance for separation is determined by the sensor response. The inductor should be separated from the conductive surface so that the response amplitude exceeds noise level by a recommended 10 dB. An embodiment for closed cavity measurements comprises a capacitor internal to said cavity and an inductor mounted external to the cavity and at a fixed distance from the cavity's wall. An additional embodiment includes a closed cavity configuration wherein multiple sensors and corresponding antenna are positioned inside the cavity, with the antenna and inductors maintained at a fixed distance from the cavity's wall.

Abstract: A magnetic screening system uses directional gradiometers with high resolution and accuracy to measure magnetic field signatures of target objects (e.g., gun, knife, cell phone, keys) in a volume of interest. The measured signatures can be compared to signatures of known objects stored in a local database. Various mathematical processes may be used to identify or classify target object signatures. In a network of magnetic screening systems, the magnetic screening systems can transmit signatures to a central signature database, and a management computer can share the central signature database with all of the magnetic screening systems on the network. The magnetic screening system can operate in multiple modes, such as a tracking mode, measurement mode, and self-test mode. Through use of unique processes and designs, the magnetic screening system can achieve a high rate of processing persons for target objects.

Abstract: A method for obtaining NMR (=nuclear magnetic resonance) spectra of quadrupolar nuclei having spin l>½ using magic angle spinning (=MAS) in solid powders and transfer of coherences from a neighboring nucleus with spin S= 1/2 to single- or double-quantum transitions of quadrupolar nuclei having spin l>½, is characterized in that the transfer of coherences occurs through a combination of scalar and residual dipolar splittings. With the inventive method improved NMR-spectra can be obtained from which parameters can be extracted, which can be related to the structure and internal dynamics of solids containing the quadrupolar nuclei.

Abstract: In a method for determining transmission coil-specific RF excitation pulses for component coils of a transmission coil array for accelerated, PPA-based volume-selective magnetic resonance excitation of a tissue region of a patient, and a magnetic resonance tomography apparatus operating according to the method, a first series of volume-selective RF excitation pulses along a first transmission trajectory in transmission ?-space is successively individually radiated by the component coils of the transmission coil array and the resulting magnetic resonance signals are received, and a second series of volume-selected RF excitation pulses along a further reduced transmission trajectory in transmission ?-space is simultaneously radiated by all component coils of the transmission coil array and the resulting magnetic resonance signals are received, and a complete transmission trajectory in transmission K-space is then determined from which combination coefficients are calculated, and the coil specific RF excitation

Abstract: The subject invention pertains to method and apparatus for parallel imaging. The subject method can be utilized with imaging systems utilizing parallel imaging techniques. In a specific embodiment, the subject invention can be used in magnetic resonance imaging (MRI). A specific embodiment of the subject invention can reduce parallel reconstruction CPU and system resources usage by reducing the number of channels employed in the parallel reconstruction from the M channel signals to a lower number of channel signals. In a specific embodiment, sensitivity map information can be used in the selection of the M channel signals to be used, and how the selected channel signals are to be combined, to create the output channel signals. In an embodiment, for a given set of radio-frequency (RF) elements, an optimal choice of reconstructed channel modes can be made using prior view information and/or sensitivity data for the given slice. The subject invention can utilize parallel imaging speed up in multiple directions.

Abstract: In a method for implementation of a magnetic resonance examination, and a magnetic resonance apparatus, and an array for acquisition of magnetic resonance signals, and a magnetic resonance signal at a magnetic resonance frequency are acquired from an examination region with an array of frequency conversion units after an RF excitation and are radiated as frequency-converted signals. The resulting signal field is acquired by a number of reception antennas of a second antenna array, which are arranged at different spatial positions and thus allow a spatial resolution of the frequency-converted signals. The acquired acquisition signals are used for image reconstruction.

Abstract: An array of resonators for use in MRI and NMR is disclosed where the resonators are solid state constructs including a pair of resonating elements formed on both sides of a dielectric substrate and cooperate to form a resonator and where each resonator includes at least one discontinuity and the discontinuities on each resonating element are equally spaced and between the resonating elements are equally spaced. A probe for MRI is also disclosed which includes a source of cooling to cool the arrays therein.

Abstract: An NMR probe which has a multi-element switching mechanism. The NMR probe has a rotary tuner block, a contact unit, a rotationally driving unit for rotating the rotary tuner block. The rotary tuner block has an NMR probe body, a rotary body, and plural pairs of tuning elements disposed on the surface of the rotary body. This rotary body is rotatably held in the NMR probe body and made of a nonmagnetic material. A sample coil is mounted in the NMR probe body. The contact unit selectively brings the pairs of tuning elements into contact with both ends of the sample coil or with lead wires brought out from both ends of the sample coil. The pairs of tuning elements are selectively connected with the sample coil by rotation of the rotary tuner block.

Abstract: A locator is disclosed that includes a base module and an antenna module. The base module and antenna module are coupled both mechanically and electrically at a joint. Such an arrangement allows for easy stowage and shipment of the locator as well as the ability, by interchanging antenna modules, to provide multi-functional locators.

Abstract: An integrated circuit breaker and ammeter device includes a generally conventional electrical circuit breaker with an enclosing case and a primary current carrying conductor running through the case, and an ammeter circuit mounted with the case and operatively connected to the primary conductor so as to read and display the value of the current flowing through the primary conductor of the circuit breaker. In the preferred embodiment the primary conductor functions as the primary winding of a transformer and the ammeter circuit is directly connected to the secondary transformer winding. The ammeter circuit preferably further includes a display panel mounted on the case in a readily visible location.

Abstract: An electronic system for use in a body of fluid is disclosed. The electronic system includes a first housing element and a second housing element. The second housing element is hermetically sealed to the first housing element, forming a first chamber there between. An electronic circuit is mounted within the first chamber. The electronic system further includes a second chamber internal to the second housing element. The second chamber is configured for holding a power source for the electronic circuit. Preferably, the power source is a battery pack. Also, the electronic system includes means for temporarily sealing the second chamber. Preferably, means for temporarily sealing the second chamber includes a detachable plug configured for coupling to the second housing element.

Abstract: An isolation fault detection system for detecting isolation faults in a fuel cell system associated with a fuel cell hybrid vehicle. The isolation fault detection system measures a stack voltage potential, a positive fuel cell voltage potential, a negative fuel cell voltage potential, a positive battery voltage potential, and an overall battery voltage potential. The isolation fault detection system then uses these voltage potentials in mesh equations to compare the measured voltage potentials to voltage potentials that would occur during a loss of isolation. In one embodiment, the isolation fault detection system uses these five measured voltage potentials to determine whether an isolation fault has occurred at four separate locations in the fuel cell hybrid vehicle. The system also can detect the location of the isolation fault.

Abstract: A method and apparatus for detecting open defects on grounded nodes of an electrical device using capacitive lead frame technology is presented. In accordance with the method of the invention, an accessible signal node that is capacitively coupled the grounded node is stimulated with a known source signal. A capacitive sense plate is capacitively coupled to the stimulated node and grounded node of the electrical device, and a measuring device coupled to the capacitive sense plate capacitively senses a resulting signal. The value of the capacitively sensed signal is indicative of the presence or non-presence of an open defect on one or both of the grounded node and stimulated signal node.

Abstract: A single ended line testing method for qualifying an electrically conducting line, including the steps of sending a plurality of randomized excitation signals from a first end of the line towards a second end of the line, subsequently taking measurements, at the first end of the line, of each reflection of the plurality of randomized excitation signals, and then inversely randomizing the measurements. Line qualification is determined based on an average of the inversely randomized measurements.

Abstract: A semiconductor device test assembly includes a heat sink having a surface configured to support a device under test, an inner bellow, an outer bellow at least partially surrounding the inner bellow, and a fluid channel within the inner bellow for providing a fluid to the heat sink. The semiconductor device test assembly can further include an air adjustment unit for adjusting an air pressure in the outer bellow, so as to adjust a contact force between the heat sink and the device under test.

Abstract: Noise reduction for application of structural test patterns to a Device Under Test (DUT) is accomplished with a capacitor “booster” bypass network on the probe card in which the capacitors are charged to a much higher voltage Vboost than the DUT power supply voltage VDD. Charging the capacitors to a voltage N×VDD allows the buster network to store N times the charge of a conventionally configured capacitance network, and effectively provides N times the capacitance of the original network in the same physical space.

Abstract: A method and apparatus is disclosed for detecting one or more faults in a multi-phase alternator, wherein a phase sensing unit, comprising a star wound resistor assembly, senses each phase of the alternator and provides an indirect phase measure; further wherein a comparing unit, comprising an op amp, receives and compares each of the corresponding phase measures with a reference to provide a comparison result and wherein a fault detection unit receiving the comparison result and providing a fault condition signal in the case of a fault.

Abstract: A method and system for calibrating a plurality of measurement systems. The method includes obtaining a first plurality of calibration standards. The first plurality of calibration standards is associated with a plurality of predetermined values. Additionally, the method includes measuring the first plurality of calibration standards by a plurality of measurement systems to obtain a first plurality of measured values, processing information associated with the first plurality of measured values, and selecting a first measurement system from the plurality of measurement systems based on at least information associated with the first plurality of measured values. Moreover, the method includes calibrating the first measurement system with the first plurality of calibration standards, obtaining a second plurality of calibration standards, and measuring the second plurality of calibration standards by the first measurement system to obtain a second plurality of measured values.

Abstract: Electro-thermal trimming of thermally-trimmable resistors is used to trim one or more of the plurality of resistors in or associated with an analog electric circuit. The TCR of each of a subset of a plurality of electro-thermally-trimmable resistors can be trimmed independently from the resistance in order to adjust the output parameter of an analog electric circuit without changing other parameters that would be affected by a change in resistance.

Abstract: A probe card having a plurality of silicon finger contactors contacting pads provided on a tested semiconductor wafer and a probe board mounting the plurality of silicon finger contactors on its surface, wherein each silicon finger contactor has a base part on which a step difference is formed, a support part with a rear end side provided at the base part and with a front end side sticking out from the base part, and a conductive part formed on the surface of the support part, each silicon finger contactor mounted on the probe board so that an angle part of the step difference formed on the base part contacts the surface of the probe board.

Abstract: Wiring is routed to assure insulation between wiring traces in a semiconductor integrated circuit device. The device includes a first wiring trace to which a prescribed voltage is supplied; a second wiring trace that takes on a voltage that exceeds the prescribed voltage; and a third wiring trace that only takes on a voltage less than the prescribed voltage. Alternatively, the device includes a first wiring trace to which a prescribed voltage is supplied; a second wiring trace that takes on a voltage less than the prescribed voltage; and a third wiring trace that takes on a voltage equal to or greater than the prescribed voltage. The wiring traces are routed at a certain wiring space in such a manner that the first wiring trace is interposed between the second and third wiring traces. The first wiring trace for which the potential difference is known to be small beforehand is routed so as to always be adjacent to the second wiring trace.

Abstract: Example embodiments of the present invention relate to an interposer of a semiconductor device having an air gap structure, a semiconductor device using the interposer, a multi-chip package using the interposer and methods of forming the interposer. The interposer includes a semiconductor substrate including a void, a metal interconnect, provided within the void, thereby forming an air gap insulating the metal interconnect. The metal interconnect may be connected to a contact element, and may be maintained within the air gap using the contact element.

Abstract: A test probe having a conductive part electrically connected to terminals of a test-object device, including: a silicon substrate; a protrusion made of resin provided on the silicon substrate; a first conductive part which is provided on the protrusion and comes in contact with the terminals; and a second conductive part which is provided in a region other than a region having the protrusion on the silicon substrate and is electrically connected to the first conductive part.