Abstract: An electron beam apparatus is provided for evaluating a sample at a high throughput and a high S/N ratio. As an electron beam emitted from an electron gun is irradiated to a sample placed on an X-Y-? stage through an electrostatic lens, an objective lens and the like, secondary electrons or reflected electrons are emitted from the sample. The primary electron beam is incident at an incident angle set at approximately 35° or more by controlling a deflector. Electrons emitted from the sample is guided in the vertical direction, and focused on a detector. The detector is made up of an MCP, a fluorescent plate, a relay lens, and a TDI (or CCD). An electric signal from the TDI is supplied to a personal computer for image processing to generate a two-dimensional image of the sample.

Abstract: A fire detector and method for detecting fires uses a passive NDIR sensor that generates a detector signal based upon either a 15? absorption band of CO2 or a 6.27? absorption band of H2O and a signal processor which receives the detector signal and generates an alarm signal when a preselected criterion is met. The NDIR sensor relies upon a passive infrared source (such as a very thin film of black plastic material) with a high emissivity (e.g., approximately 1.0), a sample chamber with a low emissivity (e.g., approximately 0.03) thermally decoupled from the passive infrared source and an infrared detector located in a detector assembly thermally coupled to the sample chamber while a heat exchanger is thermally coupled to the sample chamber.

Abstract: SiC at least about 400 micrometers thick, and preferably within the range of about 400-2,000 micrometers thick, is employed to detect electromagnetic radiation having a wavelength less than about 10 micrometers via an acoustic absorption mechanism. The SiC body preferably has a non-dopant impurity level low enough that it does not interfere with a single crystal structure for the SiC, and an approximately uniform thickness with an approximately flat radiation receiving surface.

Abstract: A solid-state imaging device, such as a CMOS sensor, includes a unit pixel having a charge generation unit for generating signal charge, a floating diffusion for accumulating the signal charge generated by the charge generation unit, a transfer gate transistor for transferring the signal charge in the charge generation unit to the floating diffusion, a reset transistor for resetting the floating diffusion, and an amplifying transistor for generating a signal in accordance with the signal charge generated by the charge generation unit and outputting the signal to a vertical signal line. The width of a reset pulse for driving the reset transistor is sufficiently decreased to, for example, less than or equal to ½, and preferably less than or equal to ? of the response time of a signal that has occurred on the vertical signal line in response to the reset pulse.

Abstract: Apparatus for passive infrared sensing of an intruder that discriminates between signals corresponding to a human target and much larger signals may include first and second IR sensors, at least a first amplifier having a first voltage operating range. The first amplifier may be connected to the first IR sensor and the apparatus may further include at least a second amplifier having a second voltage operating range. The second amplifier may also be connected to the first IR sensor and the apparatus may further include a comparator for comparing the respective outputs of the first and second amplifiers to predetermined values.

Abstract: Impurity is removed from gas, the resultant gas is introduced into a cell 15, and the intensity of light transmitted through the cell 15 is measured as a reference. Gas containing impurity of which concentration is known, is introduced into the cell 15, and the intensity of light transmitted through the cell 15 is measured with the temperature and pressure maintained at those used at the measurement of the reference light intensity. Then, the absorbance of the impurity is obtained according to the ratio of the two light intensity data obtained by the two measurements above-mentioned. The impurity absorbance thus obtained is stored, in a memory 20a, as a function of an impurity concentration. Gas containing impurity of which concentration is unknown, is introduced into the cell 15, and the intensity of light transmitted through the cell 15 is measured with the temperature and pressure maintained at those used at the measurements above-mentioned.

Abstract: The scanning device for radiographic media (28) is made of a rotatable vacuum drum (40) has an external surface (42) that, rotates about a longitudinal axis (7); the radiographic media is disposed on the external surface; a moveable scan bar (24) is mounted on two translation rods adjacent the drum; at least one scan module is mounted on the moveable scan bar; a translation drive is connected to the moveable scan bar for moving the moveable scan bar perpendicular to the longitudinal axis; an analog to digital converter (32) in communication with the scan modules receives scanned signals from the scan modules; a control process unit (34) receives scanned signals; and an output device (36) for writes the received scanned signals onto diagnostic media.

Abstract: Apparatus for radiation based imaging of a non-homogenous target area having distinguishable regions therein, comprises: an imaging unit configured to obtain radiation intensity data from a target region in the spatial dimensions and at least one other dimension, and an image four-dimension analysis unit analyzes the intensity data in the spatial dimension and said at least one other dimension in order to map the distinguishable regions. The system typically detects rates of change over time in signals from radiopharmaceuticals and uses the rates of change to identify the tissues. In a preferred embodiment, two or more radiopharmaceuticals are used, the results of one being used as a constraint on the other.

Abstract: Systems, methods and apparatus are provided through which, in some embodiments, an electronic sensor is positioned in the field of projection of an X-ray source, and the electronic sensor measures the deviation between a visible light field and an X-ray field. In some embodiments, the deviation is scaled in reference to the position of the electronic sensor between an X-ray receptor and the X-ray source.

Abstract: A surface of an insulating substrate is charged to a target potential. In one embodiment, the surface is flooded with a higher-energy electron beam such that the electron yield is greater than one. Subsequently, the surface is flooded with a lower-energy electron beam such that the electron yield is less than one. In another embodiment, the substrate is provided with the surface in a state at an approximate initial potential above the target potential. The surface is then flooded with charged particle such that the charge yield of scattered particles is less than one, such that a steady state is reached at which the target potential is achieved. Another embodiment pertains to an apparatus for charging a surface of an insulating is substrate to a target potential.

Abstract: A radio frequency (RF) driven plasma ion source has an external RF antenna, i.e. the RF antenna is positioned outside the plasma generating chamber rather than inside. The RF antenna is typically formed of a small diameter metal tube coated with an insulator. An external RF antenna assembly is used to mount the external RF antenna to the ion source. The RF antenna tubing is wound around the external RF antenna assembly to form a coil. The external RF antenna assembly is formed of a material, e.g. quartz, which is essentially transparent to the RF waves. The external RF antenna assembly is attached to and forms a part of the plasma source chamber so that the RF waves emitted by the RF antenna enter into the inside of the plasma chamber and ionize a gas contained therein. The plasma ion source is typically a multi-cusp ion source. A converter can be included in the ion source to produce negative ions.

Abstract: A technique for high-efficiency ion implantation is disclosed. In one particular exemplary embodiment, the technique may be realized as an apparatus for high-efficiency ion implantation. The apparatus may comprise one or more measurement devices to determine a shape of an ion beam spot in a first dimension and a second dimension. The apparatus may also comprise a control module to control movement of the ion beam across a substrate according to a two-dimensional velocity profile, wherein the two-dimensional velocity profile is determined based at least in part on the shape of the ion beam spot, and wherein the two-dimensional velocity profile is tunable to maintain a uniform ion dose and to keep the ion beam spot from going fully off the substrate surface.

Abstract: In an electron beam exposure method in which an article subjected to exposure and an electron beam irradiation spot are moved relative to each other at a continuous speed, the article is exposed at a plurality of irradiation intensities of an electron beam by changing a transmittance of an electron optical system for forming the electron beam irradiation spot on the article.

Abstract: In the metal billet to be used for hot dilation forming, a forward side with respect to the pressing direction has a quadrate section and its diagonal length is not more than an inner diameter of a container. Moreover, a backward side with respect to the pressing direction has a circular section and its diameter is substantially same as the inner diameter of the container. The metal billet is heated to a temperature suitable for press working and is set into a container for press forming. While a center of a workpiece of the metal billet is being bored by a boring punch to be operated by a pressing machine, the metal billet is hot-dilated so that a bottomed container for a cask is formed.

Abstract: An optical semiconductor element includes a light-emitting element, a light-receiving element that is placed opposite to the light-emitting element, and two lead frames on which the light-emitting element and the light-receiving element are respectively die bonded. Shield plates are bent respectively toward the light-emitting element or the light-receiving element at a predetermined angle with respect to the surface of a die bonding region on the periphery of the die bonding region of the lead frames.

Abstract: There is provided a chip for use in a combination microbalance and optical monitor sensor, the chip comprising a piezoelectric element and electrodes formed on a first surface thereof. At least a portion of the piezoelectric element is translucent. There is also provided a chip comprising a piezoelectric element and electrodes in contact with the piezoelectric element, at least a portion of at least the first electrode being translucent, and at least a portion of the piezoelectric element being translucent. Current can be applied through the electrodes to cause a region of the piezoelectric element to undergo vibration, and light can be passed through a portion of the region of the piezoelectric element which is undergoing the vibration. There is also provided a combination microbalance and optical monitor sensor, comprising a chip as described herein, and a method of simultaneously piezoelectric crystal vibration monitoring and optically monitoring a layer.

Abstract: An adjusting apparatus includes a judging unit that receives a characteristic value of an article processed by one of processing machines from one of measuring machines and, on the basis of the characteristic value, judges whether or not the processed article meets regular quality, and an abnormality estimating unit that, when the processed article does not meet regular quality, specifies an device to be adjusted on the basis of whether a characteristic value out of the regular range appears for every two cycles or three cycles.

Abstract: A device for acquiring information contained in a phosphor layer comprises a light source (2) for irradiating the phosphor layer (1) with excitation light (3) that is suitable for exciting emission light (4) in the phosphor layer (1), a detector (6) for detecting the emission light (4) that has been excited in the phosphor layer (1), and a filter device (8), arranged between the phosphor layer (1) and the detector (6), that is substantially transparent in a first wavelength range (W1) of the emission light (4) and substantially non-transparent in a second wavelength range (W2) of the excitation light (3). To increase the reliability during the acquisition of the emission light, the filter device (8) is made substantially non-transparent in at least a third wavelength range (W3) having longer wavelengths than the second wavelength range (W2) of the excitation light (3).

Abstract: A light irradiating device provided with line light sources is located in association with an image recording medium. The line light sources are located in parallel and at approximately identical pitches with respect to a scanning direction. A slit array plate having slits is located between the image recording medium and the light irradiating device. Each of the slits is located at a position corresponding to the position of one of the line light sources. The light irradiating device is controlled such that line light beams are radiated out one after another with different timing from the line light sources.

Abstract: New, hybrid vacuum electron devices are proposed, in which the electrons are extracted from the nanotube into vacuum. Each nanotube is either placed on the cathode electrode individually or grown normally to the cathode plane. Arrays of the nanotubes are also considered to multiply the output current. Two- and three-terminal device configurations are discussed. In all the cases considered, the device designs are such that both input and output capacitances are extremely low, while the efficiency of the electron extraction into vacuum is very high, so that the estimated operational frequencies are expected to be in a tera-hertz range. New vacuum triode structure with ballistic electron propagation along the nanotube is also considered.

Abstract: A nitride compound semiconductor element having improved characteristics, productivity and yield. A nitride compound semiconductor element includes: a sapphire substrate; a first single crystalline layer of AlN formed on said sapphire substrate; a second single crystalline layer formed on said first single crystalline layer, said second single crystalline layer being made of AlxGa1-xN (0.8?x?0.97) and having a thickness of equal to or more than 0.3 ?m and equal to or less than 6 ?m; and a device structure section of a nitride semiconductor formed on said second single crystalline layer.

Abstract: A light-emitting diode has a low-resistivity silicon substrate on which there are laminated a buffer layer, an n-type lower confining layer, an active layer of multiple quantum well configuration, and a p-type upper confining layer. The active layer is constituted of cyclic alternations of a barrier sublayer of InGaN, a first complementary sublayer of AlGaInN, a well sublayer of InGaN, and a second complementary sublayer of AlGaInN. The proportions of the noted ingredients of the active sublayers are all specified. The first and the second complementary sublayers prevent the evaporation or diffusion of indium from the neighboring sublayers.

Abstract: Disclosed is an integrated circuit structure and a method of making such a structure that has a substrate and P-type and N-type transistors on the substrate. The N-type transistor extension and source/drain regions comprise dopants implanted into the substrate. The P-type transistor extension and source/drain regions partially include a strained epitaxial silicon germanium, wherein the strained silicon germanium comprises of two layers, with a top layer that is closer to the gate stack than the bottom layer. The strained silicon germanium is in-situ doped and creates longitudinal stress on the channel region.

Abstract: Digital computational circuit comprising a network made of a plurality of identical repetitive DNA-based conductive elements. The DNA-based elements used for the purposes of the invention employ a P-bridge as a tunnel junction for a net charge. The DNA-based element of which the circuit is made may be a DNA SET transistor. The circuit may comprise a DNA resistor built from a plurality of SET transistor elements a series, with a constant over-threshold gate voltage. The circuit may further comprise NOT and NOR gates. The NOT gate can be made of a DNA-based transistor and a resistor, and the resistor can be made by using a DNA SET transistor with a constant over-threshold gate voltage, and by placing a plurality of such DNA SET transistors in series until the resistivity reaches the desired value. The NOR gate, on the other hand, can be built from two NOT elements wherein the output of the first NOT element is connected to the resistor of the second NOT element as it voltage supply.

Abstract: An electrical junction that includes a semiconductor (e.g., C, Ge, or an Si-based semiconductor), a conductor, and an interface layer disposed therebetween. The interface layer is sufficiently thick to depin a Fermi level of the semiconductor, yet sufficiently thin to provide the junction with a specific contact resistance of less than or equal to approximately 1000 ?-?m2, and in some cases a minimum specific contact resistance.

Abstract: The present invention provides a substrate having thereon a patterned small molecule organic semiconductor layer. The present invention also provides a method and a system for the production of the substrate having thereon a patterned small molecule organic semiconductor layer. The substrate with the patterned small molecule organic semiconductor layer is prepared by exposing a region of a substrate having thereon a film of a precursor of a small organic molecule to energy from an energy source to convert the film of a precursor of a small organic molecule to a patterned small molecule organic semiconductor layer.

Abstract: A linewidth measurement structure for determining linewidths of damascened metal lines formed in an insulator is provided. The linewidth measurement structure including: a damascene polysilicon line formed in the insulator, the polysilicon line having an doped region having a predetermined resistivity.

Abstract: A structure of test element group wiring includes, in addition to an electrode on a substrate including one or more layers of insulating films, and real wirings electrically connected to the electrode, includes dummy wirings electrically isolated from the electrode and having a portion of the same shape as the real wiring. The dummy wirings are disposed at a predetermined constant distance, adjacent to the real wirings or to each other, so that the wiring rate of the real wiring relaxes the concentration difference of patterns. The distance between the real wirings is sufficient to perform pattern analysis using the OBIRCH method.

Abstract: To provide a test technology capable of reducing a package size by reducing a number of terminals (pins) in a semiconductor integrated circuit of SIP or the like constituted by mounting a plurality of semiconductor chips to a single package, in SIP 102 constituted by mounting a plurality of semiconductor chips to a signal package of ASIC 100, SDRAM 101 and the like, a circuit of testing SDRAM 101 (SDRAMBIST 109) is provided at inside of ASIC 100, and SDRAM 101 is tested from outside of SDRAM 101, that is, from ASIC 100. By providing the test circuit of SDRAM 101 at inside of ASIC 100, it is not necessary to extrude a terminal for testing SDRAM 101 to outside of SIP 102.

Abstract: In a thin film semiconductor device realized on a flexible substrate, an electronic device using the same, and a manufacturing method thereof, the thin film semiconductor device and an electronic device include a flexible substrate, a semiconductor chip, which is formed on the flexible substrate, and a protective cap, which seals the semiconductor chip. Durability of the thin film semiconductor device against stress due to bending of the substrate is improved by using the protective cap.

Abstract: A thin-film transistor includes a substrate, and a gate including a double-layered structure having first and second metal layers provided on the substrate, the first metal layer being wider than the second metal layer by 1 to 4 ?m. A method of making such a thin-film transistor includes the steps of: depositing a first metal layer on a substrate, depositing a second metal layers directly on the first metal layer; forming a photoresist having a designated width on the second metal layer; patterning the second metal layer via isotropic etching using the photoresist as a mask; patterning the first metal layer by means of an anisotropic etching using the photoresist as a mask, the first metal layer being etched to have the designated width, thus forming a gate having a laminated structure of the first and second metal layers; and removing the photoresist.

Abstract: It is a problem to provide a semiconductor device production system using a laser crystallization method capable of preventing grain boundaries from forming in a TFT channel region and further preventing conspicuous lowering in TFT mobility due to grain boundaries, on-current decrease or off-current increase. An insulation film is formed on a substrate, and a semiconductor film is formed on the insulation film. Due to this, preferentially formed is a region in the semiconductor film to be concentratedly applied by stress during crystallization with laser light. Specifically, a stripe-formed or rectangular concavo-convex is formed on the semiconductor film. Continuous-oscillation laser light is irradiated along the striped concavo-convex or along a direction of a longer or shorter axis of rectangle.

Abstract: A silicon nitride film and a silicon oxide film are formed on a glass substrate. On the silicon oxide film is formed a thin film transistor T including a source region, a drain region, a channel region having a predetermined channel length, a first GOLD region having an impurity concentration lower than the impurity concentration of the source region, a second GOLD region having an impurity concentration lower than the impurity concentration of the drain region, a gate insulation film, and a gate electrode. The length of an overlapping portion in plane between the gate electrode and the second GOLD region in the direction of the channel length is set longer than the length in the direction of the channel region of an overlapping portion in plane between the gate electrode and the first GOLD region.

Abstract: A microstructured assembly including a barrier portions and land portions is described. The microstructures have alternating barrier portions and land portions that have barrier surfaces and land surfaces, respectively. Each barrier surface and land surface is connected by curved surface, which is part of a curved portion. The curved surface and the land surface are substantially continuous.

Abstract: The present invention discloses a method of manufacturing an active matrix display device, comprising: a) forming a semiconductor layer on an insulating substrate; b) forming a gate insulating layer over the whole surface of the substrate while convering the semiconductor layer; c) forming a gate electrode on the gate insulating layer over the semiconductor layer; d) forming spacers on both side wall portions of the gate electrode while exposing both end portions of the semiconductor layer; e) ion-implaing a high-density impurity into the semiconductor layer to form high-density source and drain regions in the semiconductor layer; f) depositing sequentially a transparent conductive layer and a metal layer on the inter insulating layer; g) patterning the transparent conductive layer and the metal layer to form the source and drain electrodes, the source and drain electrodes directly contacting the high-density source and drain regions and having a dual-layered structure; h) forming a passivation layer over the

Abstract: Disclosed is a thin film transistor (TFT) for a liquid crystal display (LCD) and a method for manufacturing the same that allows the number of photomasks used in a photolithography process to be decreased as compared to conventional methods. A passivation film is formed as a single layered organic insulating film, and the number of needed exposure steps is reduced, so as to decrease the number of needed photomask sheets and thereby improve the efficiency of the TFT production process. Applications of the disclosed method include reflection and transmission composite type LCDs as well as a reflection type LCD.

Abstract: Disposing the light absorption layer formed in contact with a polycrystal silicon layer of a bottom gate type polycrystal silicon TFT allows a depletion layer formed between drain and channel forming regions to extend further into the inside of the light absorption layer, resulting in collection of photo carriers produced in the depletion layer into the channel forming region. The photo carriers collected into the channel forming region are subsequently collected into the source region to be output as large photocurrents by high mobility of the polycrystal silicon.

Abstract: A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate. At this time, the upper layer of the gate pad is removed using a photoresist pattern having different thicknesses depending on position as etch mask. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode, and a data pad. Next, a passivation layer is deposited and patterned to form contact holes respectively exposing the drain electrode, the gate pad, and the data pad.

Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).

Abstract: A semiconductor device and method of its fabrication are provided to enable the device operation in a THz spectral range. The device comprises a heterostructure including at least first and second semiconductor layers. The first and second layers are made of materials providing a quantum mechanical coupling between an electron quantum well (EQW) in the first layer and a hole quantum well (HQW) in the second layer, and providing an overlap between the valence band of the material of the second layer and the conduction band of the material of the first layer. A layout of the layers is selected so as to provide a predetermined dispersion of energy subbands in the conduction band of the first layer and the valence band of the second layer.

Abstract: When a semiconductor light emitting device or a semiconductor device is manufactured by growing nitride III-V compound semiconductor layers, which will form a light emitting device structure or a device structure, on a nitride III-V compound semiconductor substrate composed of a first region in form of a crystal having a first average dislocation density and a plurality of second regions having a second average dislocation density higher than the first average dislocation density and periodically aligned in the first region, device regions are defined on the nitride III-V compound semiconductor substrate such that the device regions do not substantially include second regions, emission regions or active regions of devices finally obtained do not include second regions.

Abstract: The present invention achieves improvement of the color reproducibility, color rendering properties and light emitting efficiency of a white light emitting diode. The present invention is a red fluorescent material composed of a europium doped lithium lanthanum niobate represented by a general formula of LiLa1-xEuxNb2O7 (0<x?1). The red fluorescent material can efficiently converts light in the light emission wavelength range from 350 to 410 nm of an ultraviolet light emitting diode into red light, and can efficiently converts blue light at 465 nm and green light at 538 nm into red light.

Abstract: The present invention relates to a terbium borate-based yellow phosphor, a preparation method thereof, and a white semiconductor light emitting device incorporating the same. The terbium borate-based yellow phosphor of the present invention is represented by the general formula (Tb1-x-y-zREXAy)3DaBbO12:Cez (where, RE is at least one rare earth element selected from the group consisting of Y, Lu, Sc, La, Gd, Sm, Pr, Nd, Eu, Dy, Ho, Er, Tm and Yb; A is a typical metal element selected from the group consisting of Li, Na, K, Rb, Cs and Fr; D is a typical amphoteric element selected from the group consisting of Al, In and Ga; 0?x<0.5; 0?y<0.5; 0<z<0.5; 0<a<5; and 0<b<5). The white semiconductor light emitting device of the present invention comprises a semiconductor light emitting diode and the yellow phosphor, which absorbs a portion of light emitted by the semiconductor light emitting diode and emits light of wavelength different from that of the absorbed light.

Abstract: In accordance with the invention, an LED packaged for high temperature operation comprises a metal base including an underlying thermal connection pad and a pair of electrical connection pads, an overlying ceramic layer, and a LED die mounted overlying the metal base. The LED is thermally coupled through the metal base to the thermal connection pad, and the electrodes are electrically connected to the underlying electrical connection pads. A low thermal resistance insulating layer can electrically insulate other areas of die from the base while permitting heat passage. Heat flow can be enhanced by thermal vias to the thermal connector pad. Ceramic layers formed overlying the base can add circuitry and assist in distributing emitted light. The novel package can operate at temperatures as high as 250° C.

Abstract: An LED package comprises a substrate, one or three terminals formed on a first side of the substrate, three terminals formed on a second side opposite to the first side, and two or three LEDs disposed on the substrate, one of the LEDS being electrically connected to one of the terminals formed on the first side while being electrically connected to one of the terminals formed on the second side, and other LEDS being electrically connected to two terminals formed on the first side or to two terminals formed on the second side. A light source comprises the LED packages having the structure as described above. Without being arranged in a line, the LEDs emitting the same color are differently arranged in every LED package, thereby solving the problem of non-uniform combination of the colors according to the positions of the LEDs on an LED package-mounting substrate.

Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate, a gate structure, a spacer, a SixGey layer and a SixGey protection layer. The gate structure is deposited on the substrate and the spacer is deposited on the sidewalls of the gate structure. The SixGey layer is deposited in the substrate on both sides of the spacer and extended to a portion beneath part of the spacer. In addition, the top level of the SixGey layer is higher than the surface of the substrate. Moreover, the SixGey protection layer is deposited on the SixGey layer and the SixGey protection layer comprises Six1Gey1, where 0?y1<y.

Abstract: Three trace electromechanical circuits and methods of using same. A circuit includes first and second electrically conductive elements with a nanotube ribbon (or other electromechanical elements) disposed therebetween. An insulative layer is disposed on one of the first and second conductive elements. The nanotube ribbon is movable toward at least one of the first and second electrically conductive elements in response to electrical stimulus applied to at least one of the first and second electrically conductive elements and the nanotube ribbon. Such circuits may be formed into arrays of cells. One of the conductive elements may be used to create an attractive force to cause the nanotube ribbon to contact a conductive element, and the other of the conductive elements may be used to create an attractive force to pull the nanotube ribbon from contact with the contacted conductive element. The electrically conductive traces may be aligned or unaligned with one another.

Abstract: A radio frequency chip package is formed by assembling a connecting element such as a circuit board or flexible circuit tape having chips thereon with a bottom plane element such as a lead frame incorporating a large thermally-conductive plate and leads projecting upwardly from the plane of the plate. The assembly step places the rear surfaces of the chips on the bottom side of the connecting element into proximity with the thermal conductor and joins the conductive traces on the connecting element with the leads. The resulting assembly is encapsulated, leaving terminals at the bottom ends of the leads exposed. The encapsulated assembly may be surface-mounted to a circuit board. The leads provide robust electrical connections between the connecting element and the circuit board.

Abstract: A solid state image sensing device comprises a first semiconductor region of first conductivity type, a second semiconductor region of second conductivity type provided in the first semiconductor region, a third semiconductor region of second conductivity type provided in the first semiconductor region with a space from the second semiconductor region, a gate electrode provided on the first semiconductor region between the second semiconductor region and the third semiconductor region, a gate insulator layer interposed between the first semiconductor region and the gate electrode, and a fourth semiconductor region of second conductivity type provided below the second semiconductor region in the first semiconductor region.

Abstract: Disclosed is a temperature sensor for an integrated circuit having at least one field effect transistor (FET) having a polysilicon gate, in which a current and a voltage is supplied to the polysilicon gate, changes in the current and the voltage of the polysilicon gate are monitored, wherein the polysilicon gate of the at least one FET is electrically isolated from other components of the integrated circuit, and the changes in the current or voltage are used to calculate a change in resistance of the polysilicon gate, and the change in resistance of the polysilicon gate is used to calculate a temperature change within the integrated circuit.