Abstract: The invention recognizes that filter size can be reduced substantially as power factor is permitted to deviate below unity in systematic ways. Preferred methods of the invention provide specific, computable waveforms that permit use of a minimum filter size given a desired target power factor.

Abstract: A power converter system is provided for supplying power to an electrical load. The power converter system includes a power converter circuit adapted to perform an AC to DC power conversion and an active clamp circuit coupled to the power converter circuit for regulating DC bus voltage overshoots. The power converter circuit is configured from a plurality of semiconductor switches having reverse voltage withstand capability.

Abstract: The methodology includes a single excitation analysis, a multi-excitation analysis, and a simultaneous switch noise, SSN, analysis. A chip connects to the PDS at a plurality of power ports formed by pads for obtaining biasing voltage and current from those power ports. The single excitation analysis includes respectively making each of power ports start conducting current, and measuring a voltage provided by the power port. An equivalent impedance of each power port is obtained. The multi-excitation analysis includes making a given power port conduct a given current, and measuring voltages at other power ports for evaluating mutual couplings across different power ports. The SSN analysis includes respectively making different numbers of power ports conduct currents and accordingly evaluating different equivalent impedances corresponding to different SSN situations.

Abstract: A controller for a DC to DC converter with reference voltage loop disturbance compensation. The controller may include an error amplifier configured to receive a first signal representative of an actual output voltage of the DC to DC converter and a reference signal representative of a desired output voltage of the DC to DC converter and to provide an error signal representative of a difference between the first signal and the reference signal. The controller may also include a PWM modulator with reference voltage compensation circuitry configured to receive the error signal and compensate for a change in the reference signal in order to control overshoot and undershoot of the actual output voltage from a desired voltage due to the change of the reference signal. An electronic device and method are also provided.

Abstract: A switching regulator automatically operates in pulse width modulation (“PWM”) mode for high load currents and in burst mode for low load currents. The switching regulator includes a pair of switches to provide a regulated current to a load. The switching regulator further includes a multi-input comparator. A first input of the comparator is coupled to an output of the pair of switches. A second input of the comparator is coupled to a filtered version of the output and a third input is coupled to a reference waveform. The first, second and third inputs of the comparator form a combined input signal to the comparator. An output signal of the comparator is generated by comparing the combined input signal to a threshold of the comparator. The output signal determines a switching frequency of the pair of switches such that the switching frequency is automatically reduced when the load is decreased.

Abstract: The DC/DC converter according to one embodiment includes a switch, an inductor, a capacitor, a resistor, and a voltage divider. The switch is coupled to the input voltage. The inductor is used for coupling the first switch to an output node of the DC/DC converter so as to generate the output voltage at the output node. The capacitor is coupled to the output voltage. The resistor is coupled to the capacitor in series, and is coupled to ground. The voltage divider is coupled across the capacitor so as to reduce the zero frequency of the DC/DC converter.

Abstract: A computer readable, media and signals for controlling power drawn from an energy converter to supply a load, where the energy converter is operable to convert energy from a physical source into electrical energy. Power drawn from the energy converter is changed when a supply voltage of the energy converter meets a criterion. The criterion and the change in the amount of power drawn from the energy converter are dependent upon a present amount of power supplied to the load. The methods, apparatus, media and signals described herein may provide improvements to DC to AC maximum power point tracking in an energy conversion system such as a photovoltaic power generation system.

Abstract: Methods, apparatus, media and signals for controlling power drawn from an energy converter to supply a load, where the energy converter is operable to convert energy from a physical source into electrical energy. Power drawn from the energy converter is changed when a supply voltage of the energy converter meets a criterion. The criterion and the change in the amount of power drawn from the energy converter are dependent upon a present amount of power supplied to the load. The methods, apparatus, media and signals described herein may provide improvements to DC to AC maximum power point tracking in an energy conversion system such as a photovoltaic power generation system.

Abstract: Provided is a power control device comprising; a power input portion to which an alternating current is supplied; a plurality of diodes for rectifying a power supplied from the power input portion; a first capacitor unit and a second capacitor unit for charging/discharging a power rectified in the diode to provide a smoothed voltage output; and a switching means to change a voltage supplied in the first capacitor and the second capacitor during the main/sub periods in compliance with a voltage level of a power applied in the power input portion.

Abstract: A method controls a power MOS transistor having a control terminal and a load path, the load path connected in series with a load between voltage supply terminals, wherein a power supply voltage between the voltage supply terminals imposes a load voltage across the load and a load path voltage across the load path of the power MOS transistor. The method includes generating a control current for the control terminal during a switching process when the power MOS transistor changes switching states. The control current is dependent on the power supply voltage and on at least one of the group consisting of the load path voltage and the load voltage.

Abstract: A bandgap circuit includes a current mirror that generates a proportional to absolute temperature current at an output node that outputs the bandgap reference voltage. A first current path including a first resistor is coupled between the output node and a first bipolar transistor. The second current path including a second resistor is coupled between the output node and a second bipolar transistor. The first current path is parallel to the second current path. The circuit outputs a bandgap reference voltage.

Abstract: The present invention provides a high-voltage measuring device capable of providing sufficient electric isolation between resistors and between resistors and a voltage measurement circuit without necessity of enlarging a size of a substrate for carry thereon the circuit. A high-voltage measuring device mounted on a substrate, comprising a high-voltage input terminal pair, a measuring terminal pair, a voltage measuring circuit having input terminals connected to the measuring terminal pair, and two resistive parts. One of the resistive parts electrically connects one of high-voltage input terminal pair and one of measuring terminal pair. The other of resistive parts electrically connects between the other of high-voltage input terminal pair and the other of measuring terminal pair.

Abstract: There proposed are a distance detection system that can enhance with a simple configuration the accuracy of distance detection, an electric-field forming apparatus, and an electric-field forming method. A quasi-electrostatic field is formed in such a way that a predetermined intensity is obtained at the respective distances corresponding to a plurality of frequencies. Accordingly, quasi-electrostatic fields in which a distance is extremely clearly reflected in intensity are formed in such a way that a predetermined intensity can be obtained at the positions having respective distances corresponding to a plurality of frequencies; therefore, it is possible to enhance, without requiring complicated control and a special apparatus, the accuracy of distance detection based on the intensity, whereby it is possible to enhance with a simple configuration the accuracy of distance detection.

Abstract: This disclosure relates to a comparison device that receives an analogue input signal and a set value, and outputs a digital output signal. The device comprises a one-threshold comparator receiving the input signal and the set value, and the comparator generates a resultant signal that depends on the result of the comparison. Such a device comprises a sampler for sampling the resultant signal and a controller for blocking the sampler, after a switching of the input signal, as long as a timeout mechanism does not indicate that a given timeout duration has elapsed since the verification of a predetermined instability criterion. The timeout mechanism is reinitialized with the timeout duration every time that a predetermined instability criterion is satisfied. When the sampler is not blocked, it is used to copy the resultant signal at the output of the device.

Abstract: A micro-electromechanical system (MEMS) current sensor is described as including a first conductor, a magnetic field shaping component for shaping a magnetic field produced by a current in the first conductor, and a MEMS-based magnetic field sensing component including a magneto-MEMS component for sensing the shaped magnetic field and, in response thereto, providing an indication of the current in the first conductor. A method for sensing a current using MEMS is also described as including shaping a magnetic field produced with a current in a first conductor, sensing the shaped magnetic field with a MEMS-based magnetic field sensing component having a magneto-MEMS component magnetic field sensing circuit, and providing an indication of the current in the first conductor.

Abstract: An inspection method includes an array process of forming a TFT array on a substrate to fabricate an active matrix panel, an inspection process of carrying out performance inspection of the fabricated active matrix panel, and a cell process of mounting an OLED on the active matrix panel judged as non-defective in the inspection process. In the inspection process, a counter electrode is disposed in the vicinity of a plane, where an OLED connection electrode is exposed, of the active matrix panel fabricated in the array process so as to observe an electric current flowing on a pixel subject to measurement which constitutes the active matrix panel.

Abstract: An inspection method including measuring a height of a load cell of a load detecting mechanism using a laser length measuring mechanism, obtaining a first rise amount of the load detecting mechanism from a measuring position of the load detecting mechanism up to a contact starting position, measuring a height of an electrode of a wafer using the laser length measuring mechanism, and obtaining a second rise amount of a main chuck up to the contact starting point of the electrode with the probe based on a difference between a measuring height of the electrode of the wafer and the measuring height of the load detecting mechanism.

Abstract: A magnetic detector arrangement includes two equally polarised magnets positioned next to each other with the polarisation in the same direction, and a magnetic detector element, wherein the magnets are arranged at a predefined distance apart such that the magnetic field from the magnets will superimpose. A magnetic detector arrangement with an improved tolerance towards deviations in the magnetic field of the comprised permanent magnets can be provided.

Abstract: A high sensitivity magnetic anomaly detector for geomagnetic exploration comprises a shorted coaxial transmission line having as central conductor an amorphous magnetic wire. A static magnetic field is applied along the transmission line. A transverse electromagnetic wave also propagates along the transmission line and excites a ferromagnetic resonance of the magnetic ions located within the depth of penetration of the circumferential microwave magnetic field into the magnetic wire. The microwave giant magnetoimpedance effect occurring in the magnetic wire changes the magnetic wire impedance as follows: the real part of the impedance peaks and the imaginary part passes through zero at a given frequency (the ferromagnetic resonance frequency). This frequency depends on the saturation magnetization of the magnetic wire and the strength of the static magnetic field.

Abstract: A spin stand for testing a head or disk, comprising a base and a stage connected to the base through a rolling bearing. In the spin stand, the stage can be rapidly and stably fixed to the base. A fixing device is sucked to be connected to the base and the stage, and the stage is fixed to the base.

Abstract: Spectral scanning magnetic resonance imaging methods and systems. In preferred methods and systems of the invention, to measure the resonance spectrum of the target object, a plurality of excitation signals in different frequencies and/or waveform shapes are introduced simultaneously to the imaging volume through one or more excitation coils, and the response spectrum is measured also in real-time and/or after excitation. Systems of the invention can be compact and portable, with small magnets providing the deterministic inhomogeneous magnetic field. Preferred embodiments include integrated circuit transmitters and receivers. Preferred systems of the invention are suitable, for example, for point of care medical diagnostics.

Abstract: A magnetic shielding apparatus having a high shielding effect. With the magnetic shielding apparatus having an opening (for example, a cylindrical magnetic shielding apparatus provided with a door), the door covering the opening is electrically and/or magnetically connected to a main body by means of electrically and/or magnetically connecting members. The magnetic shielding apparatus is higher in magnetic shielding factor than the conventional magnetic shielding apparatus, and a magnetic field measuring apparatus using the magnetic shielding apparatus, capable of measuring biomagnetism generated from an inspection target (a living body), with higher sensibility than before.

Abstract: A surface coil arrangement of a gradient system for an MR tomography apparatus has coil elements mounted on a first antenna, the antenna being extendable by at least one further antenna that likewise includes an arrangement of at least one coil element, and which is detachably or movably fastened to the first antenna.

Abstract: A probe (80) for irradiating a sample with RF energy during transmitting periods and detecting an NQR or NMR signal from a substance contained within the sample during receiving periods. The probe (80) comprises a variable impedance unit (20) for changing the Q-factor of the probe and a probe coil. The probe (80) is responsive to powerful RF pulses applied thereto to excite an RF magnetic field in the probe coil during the transmitting periods. The variable impedance unit (20) is controllable to provide a Q-factor for the probe (80) at: (i) an optimal level during a prescribed transmitting period of an RF pulse for irradiating the sample with said RF energy; (ii) a minimal level during a prescribed recovery period immediately following said transmitting period to rapidly dampen transient signals from the probe; and (iii) a maximal level during a prescribed receiving period for detecting an NQR or NMR signal from the target substance if present, immediately following the recovery period.

Abstract: A device for monitoring the position of an oil/water contact (OWC, 22) between an oil-continuous fluid (2o) overlying a water-continuous fluid (2w) inside a casing pipe (7), comprising the following features: a transmitter (5) for a generating an electro-magnetic signal (ST), said transmitter (5) provided with electrical energy (GT) from a voltage signal generator (G); said transmitter (5) being arranged inside said oil-continuous fluid (2o) and being above said oil-water contact (22), and being inside said casing pipe (7); said electromagnetic wave signal (ST) for partly propagating downwards from said transmitter (5); said electromagnetic wave signal (ST) for being partly reflected from said oil-water contact (22), and partly reflected by the end of the casing, giving rise to an upward propagating, reflected electro-magnetic signal (SR); a sensor (6) for detecting said reflected electromagnetic signal (SR), said sensor (6) also arranged above said oil-water contact (22), providing a sensor signal (RR) to a

Abstract: An electronic marker locator with a digital architecture for providing accurate and consistent estimation of the signal strength is presented. The marker locator includes a Digital Phase-Locked Loop (DPLL) structure. The electronic marker locator transmits known and adjustable frequency bursts corresponding to the markers to be located while synchronously capturing the signals returned from the markers. Because of the convergence properties of the DPLL, very consistent measurements of the reflected marker signal field strength are possible, resulting in both an improvement of maximum detection depth and depth accuracy. Further, the analog front-end hardware can be reduced, offering wider resistance to component tolerances, lower calibration and test times, and flexible frequency selectivity.

Abstract: Disclosed is a method for measuring at least one state characteristic of oil or fat in a device that uses oil or fat and is provided with a filtering apparatus (1; 101) comprising a filter housing (2) and at least one filter element (7) which is inserted thereinto. According to said method, at least one sensor (35, 36; 135; 235) of a measuring device (30; 130; 230) is introduced into a measurement space (8; 208) located in the oil or fat circuit in order to measure at least one state characteristic of the oil or fat, and the measured values thereof are evaluated using measuring electronics (32; 132) that are connected to the at least one sensor (35, 36; 135; 235). The inventive method is characterized in that a microfilter element, ultrafilter element, or nanofilter element (7) is used as a filter element. Also disclosed are a corresponding filtering apparatus (1) and a correspondingly configured measuring device (130).

Abstract: A mount is for installing a probe, such as for example, a search coil, in a variety of locations and orientations within an electrical generator, without requiring the rotor of the generator to be removed. The mount includes a block having a longitudinal hole and a plurality of transverse slots intersecting the hole. A plurality of wedges are disposed within the slots. A wedge pin inserted into the longitudinal hole engages the wedges forcing the wedges outward in order to secure the mount and search coil thereon in the desired position within the generator, such as for example, in the air gap between the rotor and stator. A fastening mechanism further secures the mount in place.

Abstract: Two ends of a transmission line whose electrical characteristics per unit length are known are connected to associated measurement ports of a network analyzer 2. A short standard is shunt-connected to at least three points in the longitudinal direction of the transmission line, and electrical characteristics are measured in a short-circuited state, thereby calculating error factors of a measurement system. Then an electronic device to be measured is shunt-connected to the transmission line, and electrical characteristics of the electronic device are measured. Then the error factors of the measurement system are removed from the measured values of the electronic device to be measured, thereby obtaining true values of the electrical characteristics of the electronic device to be measured. Accordingly, a highly accurate high-frequency electrical characteristic measuring method that is not affected by connection variations can be implemented.

Abstract: A self-adaptive output buffer for an output terminal of an electronic circuit suitable to be connected to a load is proposed. The self-adaptive output buffer includes means for sensing an indication of the capacitance of the load and means for driving the load according to the sensing, wherein the means for sensing includes capacitive means with a preset capacitance, means for charging the capacitive means to a preset voltage, means for coupling the charged capacitive means with the load, and means for measuring a measuring voltage at the capacitive means due to a charge sharing between the capacitive means and the load.

Abstract: A method for burning a BIOS chip (108) and a network card chip (107) that are attached on a motherboard (106), includes the steps of: storing a plurality of MAC addresses in a burning device (102); loading a BIOS file and a network card file into the burning device; sending the BIOS file from the burning device to a burning card (104), and burning the BIOS file into the BIOS chip via the burning card; the burning device sending the network card file which includes a MAC address from the burning device to the burning card, and burning the network card file into the network card chip via the burning card; and verifying whether the BIOS chip and the network card chip have been burned correctly.

Abstract: Precise timing control within a standardized chassis such as PXI is obtained by providing several control signals over PXI_LOCAL. A Least Common Multiple (LCM) signal enables all clocks to have coincident clock edges occurring at every LCM edge. A start sequence allows all PXI expansion cards in the test system to start at the same time. A MATCH line enables pincard modules to check for expected DUT outputs and either continue execution of their local test programs or loop back and repeat a section of the local test program in accordance with the result of the DUT output check. An End Of Test (EOT) line enables any one pincard module to abruptly end the local test programs running in all other pincard modules if an error is detected by the local test program in the pincard module.

Abstract: A compliant interposer sheet probe card and a method for testing a wafer or a wafer level package using the probe card are described. Test electronic circuits are connected on one side of a multi-layer substrate. A top side of a compliant interposer sheet is connected to an opposite side of the multi-layer substrate. A wafer or a wafer level package to be tested is contacted with pins on a bottom side of the compliant interposer sheet whereby the wafer or wafer level package can be tested.

Abstract: A testing assembly for an electric package is suitable for electric testing of an electric package. The electric package has many contacts on a contact surface of the electric package. The contacts are arranged along an alignment line. The testing assembly for an electric package includes a testing board and a testing socket. The testing board has many testing pads. The testing socket is mounted on the testing board. The testing socket includes an insulating body and a plurality of pins. The insulating body has a carrying surface suitable for supporting a contact surface of the electric package. The pins passing through the insulating body are served as electric channels between the contacts and the testing pads. The pins are in contact with the contacts respectively, and the adjacent pins are arranged in a staggered way or arranged in different pitches.

Abstract: A method of manufacturing a plurality of test strips is described where a web is formed containing conductive and base layers. A plurality of test strips are formed on the web by electrically isolating a first group of conductive components. Subsequently, a second group of conductive components are electrically isolated on the web by a different process. A test card for quality control analysis is also described, where the test card includes a plurality of attached test strip traces.

Abstract: For an inspection of a display device which incorporates a driver circuit around pixels, a start pulse and a clock pulse are required to be inputted as inspection signals. The more complex the driver circuit is, the more complexity the start pulse and the clock pulse tend to have, which will increase the manufacturing cost of inspection signals. In addition, since a clock generator is required, cost of an inspection device is increased. Furthermore, it will lead to a longer inspection time. By setting all the power supplies for the driver circuit at a desired potential, a desired potential is outputted regardless of an input signal.

Abstract: A method for testing integrated circuit devices and loading such devices into a test board for further testing and an apparatus therefor is disclosed. The method allows for selection between two modes of operation. In a first mode, the integrated circuit devices are subjected to an electrical test before being placed into the test board for further testing. In a second mode, the integrated circuit devices are tested after being placed in the test board. The apparatus allows for the selection between the first mode and the second mode. In either mode, information about the tested devices and the sockets in the test board is used to load the test boards intelligently. Intelligent loading means that devices under test (DUTs) are not placed in bad sockets and devices that do test bad are removed from the test board, with an option of replacing the failed DUT with another DUT before subsequent environmental testing of the DUTs in the test board is carried out.

Abstract: A method for testing integrated circuit devices and loading such devices into a test board for further testing and an apparatus therefor is disclosed. The method allows for selection between two modes of operation. In a first mode, the integrated circuit devices are subjected to an electrical test before being placed into the test board for further testing. In a second mode, the integrated circuit devices are tested after being placed in the test board. The apparatus allows for the selection between the first mode and the second mode. In either mode, information about the tested devices and the sockets in the test board is used to load the test boards intelligently. Intelligent loading means that devices under test (DUTs) are not placed in bad sockets and devices that do test bad are removed from the test board, with an option of replacing the failed DUT with another DUT before subsequent environmental testing of the DUTs in the test board is carried out.

Abstract: Characteristics of a power MOSFET gate charge test waveform are evaluated to yield a highly reliable and uniform testing methodology that replaces the inconsistent and inefficient dv/dt immunity testing currently performed. The invention utilizes the ratio of QGD over QGS1 to replace traditional dv/dt immunity testing in order to perform binning and sorting the devices. The ratio of QGD over QGS1 has proven to be a very reliable substitute for standard dv/dt immunity tests, and a very accurate predictor of a power MOSFET's suitability for a specified purpose. Because the gate charge parameters are relatively easily measured with high accuracy, and independent of test set-up or tester, reliability is far greater than previous methods and improved efficient results. Additional ratios of charge parameters enhance the performance of the testing methodology of the present invention.

Abstract: A method of electrically inspecting semiconductor display devices, which is capable of inspecting whether a signal is normally input to the pixels and whether an electric charge is normally held by the holding capacitors without using the video signal line as a passage for reading the electric charge and without separately providing an inspection-dedicated circuit. Power source lines which are used as passages for supplying the power source voltage are used as passages for reading the electric charge. Namely, the power source lines that can be connected to the signal lines are used as passages for inputting an inspection signal to the holding capacitors in the pixels and for reading the electric charge from the holding capacitors in the pixels.

Abstract: A method and circuitry for calibration of the output impedance of output driver circuits in an integrated circuit is disclosed. The output drivers within an area on the integrated circuit are defined as a group, and an output model indicative of the operation of the output drivers and used to calibrate their output impedances is provided proximate to the output drivers. A state machine is used to query each output model, and to set the proper output enable signals for the enable transistors in the output drivers in each group so as to calibrate their output impedances. By decentralizing the output models, the process used to form the output models will, due to proximity to the output drivers in each group, be indicative of the process used to form the output drivers. Thus, when each group of output drivers is calibrated, the output models used for each will compensate for process variations as may occur across the surface of the integrated circuit.

Abstract: An apparatus and method providing independent control of on-die termination (ODT) of output buffers. The ODTs for the buffer circuits of an input/output (I/O) buffer can be enabled and disabled in response to an ODT control signal. Additionally, the ODTs for a first set of the buffer circuits can be enabled and disabled responsive to the ODT control signal and the ODT for at least one of a second set of the buffer circuits is disabled.

Abstract: In one embodiment, NMOS transistors have their source coupled to a common source node such that the NMOS transistors conduct a leakage current if the common source node is grounded. To reduce this leakage current, the common source node is raised in potential. Similarly, PMOS transistors have their source coupled to a common source node such that the PMOS transistors conduct a leakage current if the common source node is charged to a power supply voltage VDD. To reduce this leakage current, the common source node is lowered in potential.

Abstract: A programmable logic device (PLD) includes a non-volatile memory, a configuration memory, and a control circuitry. The control circuitry couples to the non-volatile memory and to the configuration memory. A set of voltages are derived from the outputs of the control circuitry, and are applied to circuitry within the PLD.

Abstract: A programmable logic device (PLD) includes first and second circuits. The first and second circuits are part of a user's design to be implemented using the PLD's resources. The first circuit is powered by a first supply voltage. The second circuit is powered by a second supply voltage. At least one of the first and second supply voltages is determined by a PLD computer-aided design (CAD) flow used to implement the user's design in the PLD.

Abstract: An interface circuit includes an input terminal, a controlled current sink, a current measurement arrangement, and a logic circuit. The input terminal is configured to receive an input signal. The controlled current sink is operably coupled to the input terminal, and is operable to controllably take up a current from the input terminal according to a transmission signal. The current measurement arrangement is configured to generate a current measurement signal based on the current taken up by the current sink. The logic circuit is operably coupled to receive the current measurement signal and the input signal, and is configured to generate a signal depending on the input signal.

Abstract: A swing limiter comprises: a logic circuit including at least one first pull-up transistor and at least one first pull-down transistor which are serially connected between a first node and a second node and receive at least one input signal to generate an output signal, respectively; a second pull-up transistor connected between a first power voltage and the first node and causing a voltage of the first node to have a voltage level obtained by subtracting a voltage which is less than a threshold voltage thereof from the second power voltage in response to a first control voltage; a second pull-down transistor connected between the second node and a second power voltage and causing a voltage of the second node to have a voltage level obtained by adding a voltage which is less than an absolute value of a threshold voltage thereof to the second power voltage in response to a second control voltage; a first control voltage generator connected between a high voltage which is higher than the first power voltage and

Abstract: A reference voltage circuit having an open-loop buffer driven by a matching buffer included within a closed-loop, generates a stable differential or single-ended voltage while minimizing signal-dependent short-term and long-term drift. The open-loop buffer may be a replica of the closed-loop buffer, reducing the effect of a signal coupled on the voltage reference lines. The reference voltage circuit may be adapted for a switched capacitor ADC.

Abstract: A circuit system having a first inverter, a second inverter and a blockage module is disclosed. The first inverter is coupled between a supply voltage and a complementary input signal, for generating a first output signal on an output terminal thereof in response to an input signal received by an input terminal of the same. The blockage module is coupled to the output terminal of the first inverter for selectively passing the first output signal thereacross in response to the input signal and the complementary input signal. The second inverter is coupled between the supply voltage and a complementary supply voltage, having a first input terminal directly coupled to the output terminal of the first inverter and a second input terminal coupled to the same via the blockage module for generating a second output signal in response to the first output signal.

Abstract: A system that facilitates estimating power consumption in a computer system by inferring the power consumption from instrumentation signals. During operation, the system monitors instrumentation signals within the computer system, wherein the instrumentation signals do not include corresponding current and voltage signals that can be used to directly compute power consumption. The system then estimates the power consumption for the computer system by inferring the power consumption from the instrumentation signals and from an inferential power model generated during a training phase.