Abstract: Isolated PAPSS2 nucleic acid molecules that include a nucleotide sequence variant and nucleotides flanking the sequence variant are described, as well as PAPSS2 allozymes. Methods for determining if a mammal is predisposed to joint disease or cancer also are described.

Abstract: The nucleic acid sequences of adeno-associated virus (AAV) serotype 1 are provided, as are vectors and host cells containing these sequences and functional fragments thereof. Also provided are methods of delivering genes via AAV-1 derived vectors.

Abstract: The present invention relates to a new immortalized hepatocyte culture of human (preferably human fetal) normal cell origin. The immortalized hepatocyte culture of human normal cell origin of the present invention is useful in, for example, screening for compounds or salts thereof having therapeutic/preventive effects on hepatic insufficiency.

Abstract: The present invention provides methods for culturing normal and malignant human bladder epithelial cells for many generations, and compositions of matter to be used in the methods.

Abstract: The present invention provides methods and pharmaceutical compositions of the human glycoprotein fetuin, or ?2-HS glycoprotein, or fragments thereof to mitigate tissue damage associated with ischemia, particularly in stroke or in myocardial infarction.

Abstract: A method of modulating the transcription of one or more genes in a vascular or cardiac cell, wherein the method comprises a step of contacting the cell with a composition comprising one or more double-stranded nucleic acid(s) capable of sequence-specific binding to the transcription factor AP-1 and/or C/EBP or a related transcription factor.

Abstract: The invention provides a method of producing neurons from undifferentiated mesenchymal cells (UMC). Also featured by the invention is an isolated neuron produced by this method, compositions containing such neurons, and a method of repairing damaged or defective neural tissues using such compositions.

Abstract: The present invention relates to a method for inducing the differentiation of mammals' embryonic stem cells into keratinocytes, comprising the following steps of: isolating an extracellular matrix secreted by at least one mammals' cell type, cultivating mammals' embryonic stem cells in parallel in an undifferentiated condition in an appropriate culture medium in the presence of LIF, seeding the embryonic stem cells as a monolayer on said extracellular matrix, cultivating the thus seeded embryonic stem cells in the absence of LIF for a period of time sufficient for their differentiation into keratinocytes, and collecting the thus obtained keratinocytes.

Abstract: The present invention relates to methods and apparatus for the encapsulation of biologically-active substances in various cell populations. More particularly, the present invention relates to a method and apparatus for the encapsulation of biologically-active substances in various cell populations in blood by electroporation to achieve therapeutically desirable changes in the physical characteristics of the various cell populations in blood.

Abstract: A site specific recombination system and methods of use thereof are disclosed for manipulating the genome of higher plants. Compositions and methods for expressing immunogenic proteins using the site specific reombination system are also provided.

Abstract: The present invention provides novel polynucleotides encoding plant Na+/H+ antiporter polypeptides, fragments and homologs thereof. Also provided are vectors, host cells, antibodies, and recombinant methods for producing said polypeptides. The invention further relates to methods of applying these novel plants polypeptides to the identification, prevention, and/or conferment of resistence to various plant diseases and/or disorders, particularly those associated with modulating environmental stress responses, such as drought and salt tolerance.

Abstract: The invention relates to nucleic acid molecules OrfF and OrfF? polypeptides derived from Xanthomonas campestris pv. campstris, recombinant host cells expressing OrfF or OrfF? polypeptides and methods for transforming host cells with the nucleic acids.

Abstract: Methods and compositions relate to improving stress tolerance in plants including cold tolerance. HOS9 is a homeobox transcription factor that controls stress tolerance in plants by modulating the activity of a number of cold-responsive genes. Transgenic plant, cell, seed and expression vectors that include a molecule having a nucleic acid sequence derived from HOS9 confer or improve cold tolerance.

Abstract: The present invention provides novel polynucleotides encoding CAN-12 polypeptides, fragments and homologues thereof. The present invention also provides polynucleotides encoding variants of CAN-12 polypeptides, CAN-12v1 and CAN-12v2. Also provided are vectors, host cells, antibodies, and recombinant and synthetic methods for producing said polypeptides. The invention further relates to diagnostic and therapeutic methods for applying these novel CAN-12, CAN-12v1, and CAN-12v2 polypeptides to the diagnosis, treatment, and/or prevention of various diseases and/or disorders related to these polypeptides, particularly neuro- and musculo-degenerative conditions. The invention further relates to screening methods for identifying agonists and antagonists of the polynucleotides and polypeptides of the present invention.

Abstract: A method and apparatus for testing an aqueous or gaseous environment for the presence of at least one chemical is provided in order to determine the toxicity of the chemical and optionally, the quantity and identity of the chemical.

Abstract: Chromatographic strip is used in combination with a transmittance detecting system in a test to quantitate analytes in biological fluid. Chemical reagents or conjugate labels are simply absorbed on the passages' materials of the strip. The substrates, affinity reagents, or antibodies are immobilized on transparent beads in the detection cell of the strip. The biological fluid passes through the strip. The captured analytes are detected by transmittance detection for quantification. Uncaptured elements and interferences in the fluid are drained to the absorbent portion of the strip when the fluid passes the cell as a wash. This chromatographic strip with an analyte capture zone simplifies the procedures that a transmittance detecting system alone cannot overcome. Adjustable light path of the cells in the strip overcome the sensitivity limitation of reflectance detection.

Abstract: A method of sensing an environmental agent, comprising obtaining a sample from the environment and transferring the sample into the working fluid for dispensation to a detection module. The sample and working fluid mixture is filtered through a porous polymer Bragg grating. By comparing the refractive index of the grating with the mixture to the refractive index of a grating without the sample, a difference in the refractive index aids in the identification of a hazardous agent in the environment. The sensor also acts as a chemical filter by trapping specific target agents by a highly specific reaction with a conjugate molecule. Recirculation of the working fluid throughout the system provides a sensor that is “always on.

Abstract: Methods are disclosed for producing electrochemiluminescence by electrochemically oxidizing an acridan compound at an electrode in the presence of a peroxide. Maintaining a sufficiently positive potential results in continuous oxidation of the acridan compound to an acridinium compound which reacts with peroxide to produce the luminescence. Light emission can be reversibly and repeatedly cycled on and off by sweeping the potential between two values. The acridan compounds can be provided with a labeling group for linking to an analyte or analyte binding partner. The present electrochemiluminescent reaction can find use in assay methods for detecting analytes by immunoassays and nucleic acid assays.

Abstract: A conductive memory stack is provided. The memory stack includes a bottom electrode, a top electrode and a multi-resistive state element. The multi-resistive state element is sandwiched between the electrodes such that the top face of the bottom electrode is in contact with the multi-resistive state element's bottom face and the bottom face of the top electrode is in contact with the multi-resistive state element's top face. The bottom electrode, the top electrode and the multi-resistive state element all have sides that are adjacent to their faces. Furthermore, the sides are at least partially covered by a sidewall layer.

Abstract: A lower electrode is formed over a substrate, and a raw material including a complex oxide is heated in an atmosphere pressurized to two atmospheres or more and containing oxygen at a volume ratio of 10% or less at a temperature raising rate of 100° C./min or less, thereby forming a lower alloy film of a compound of a first metal which makes up the complex oxide, and a second metal, which makes up the lower electrode, over the lower electrode. A ceramic film in which the raw material is crystallized is formed over the lower alloy film, and an upper electrode is formed over the ceramic film.

Abstract: A magnetic tunnel junction device with a compositionally modulated electrode and a method of fabricating a magnetic tunnel junction device with a compositionally modulated electrode are disclosed. An electrode in electrical communication with a data layer of the magnetic tunnel junction device includes a high resistivity region that has a higher resistivity than the electrode. As a result, a current flowing through the electrode generates joule heating in the high resistivity region and that joule heating increases a temperature of the data layer and reduces a coercivity of the data layer. Consequently, a magnitude of a switching field required to rotate an alterable orientation of magnetization of the data layer is reduced. The high resistivity region can be fabricated using a plasma oxidation, a plasma nitridation, a plasma carburization, or an alloying process.

Abstract: The present invention is related to the realization of a simplified bottom electrode stack for ferroelectric memory cells. More particularly, the invention is related to ferroelectric memory cells wherein the ferroelectric capacitor is positioned directly on top of a contact plug. The bottom electrode stack is prepared by depositing a ferroelectric film atop an Ir or Ru metal electrode layer, then annealing the ferroelectric layer in an oxygen ambient wherein the partial pressure of oxygen is controlled at a level sufficient to oxidize the ferroelectric layer but not at a level sufficient to oxidize the metal electrode layer.

Abstract: A method of forming an integrated ferroelectric/CMOS structure which effectively separates incompatible high temperature deposition and annealing processes is provided. The method of the present invention includes separately forming a CMOS structure and a ferroelectric delivery wafer. These separate structures are then brought into contact with each and the ferroelectric film of the delivery wafer is bonded to the upper conductive electrode layer of the CMOS structure by using a low temperature anneal step. A portion of the delivery wafer is then removed providing an integrated FE/CMOS structure wherein the ferroelectric capacitor is formed on top of the CMOS structure. The capacitor is in contact with the transistor of the CMOS structure through all the wiring levels of the CMOS structure.

Abstract: A method for forming metrology structures for a CMP process is described. A trench edge is formed in a base material or stack of materials which are preferably deposited as part of the process of fabricating the production structures on the wafer. A covering film of a second material with preferably with contrasting SEM properties is deposited over the trench edge in the base material. During CMP the covering film is preferentially worn away at the edge revealing the base material. The width of the base material which has been revealed is a measure of the progress of the CMP. Since the base material and the covering material are preferably selected to have contrasting images in an SEM, a CD-SEM can be used to precisely measure the CMP progress.

Abstract: In a method for manufacturing a semiconductor device by processing of a wafer level, in the case of forming the semiconductor device at the wafer level, on the basis of inspection results on individual semiconductor chips constituting a semiconductor wafer, a treatment for forming a circuit including a rewiring pattern is performed with respect to a semiconductor chip judged as a conforming product and a treatment in which a rewiring pattern is not formed in order to avoid having adverse influence on a semiconductor device of a conforming product or an inspection apparatus in an inspection of a formed semiconductor device after forming the semiconductor device is performed with respect to a semiconductor chip judged as a nonconforming product.

Abstract: Embodiments of the present technique relate to forming die stacks. Specifically, embodiments of the present technique include a method of forming and testing semiconductor die comprising forming a die stack of at least two semiconductor die without attaching either of the at least two semiconductor die to a substrate. Further, present embodiments include testing the semiconductor die in the die stack after the die stack is formed and prior to attaching either of the at least two semiconductor die to the substrate.

Abstract: A method of monitoring a density profile of impurities, the method including presetting a monitoring position of a thin layer coated on a substrate, the density profile of impurities being monitored from the monitoring position in a direction of thickness of the thin layer, moving an exposer for exposing a local area of the thin layer to the monitoring position, exposing the local area of the thin layer along the direction of thickness of the thin layer, forming a shape profile of the exposed local area of the thin layer, and monitoring the density profile of impurities by determining a density of impurities in accordance with the shape profile, and an apparatus therefor. The impurity density profile may be monitored without destroying a substrate on which a thin layer is coated, and an amount of impurities used for forming the thin layer may be monitored and controlled in real-time.

Abstract: In order to obtain a thin plate manufacturing method capable of extremely increasing manufacturing efficiency by enlarging the production scale and remarkably reducing the manufacturing cost per unit area and an apparatus for manufacturing this thin plate, a method and an apparatus performing introduction of a substrate into a main chamber and discharge of the substrate from the main chamber through at least one subsidiary chamber adjacent to the main chamber are employed when manufacturing a silicon thin plate by dipping a surface layer part of the substrate into a silicon melt in a crucible arranged in the main chamber for bonding silicon to the surface of the substrate.

Abstract: A semiconductor laser comprises a sapphire substrate, an AlN buffer layer, Si-doped GaN n-layer, Si-doped Al0.1Ga0.9N n-cladding layer, Si-doped GaN n-guide layer, an active layer having multiple quantum well (MQW) structure in which about 35 ? in thickness of GaN barrier layer 62 and about 35 ? in thickness of Ga0.95In0.05N well layer 61 are laminated alternately, Mg-doped GaN p-guide layer, Mg-doped Al0.25Ga0.75N p-layer, Mg-doped Al0.1Ga0.9N p-cladding layer, and Mg-doped GaN p-contact layer are formed successively thereon. A ridged hole injection part B which contacts to a ridged laser cavity part A is formed to have the same width as the width w of an Ni electrode. Because the p-layer has a larger aluminum composition, etching rate becomes smaller and that can prevent from damaging the p-guide layer in this etching process.

Abstract: Systems and methods are disclosed for fabricating a semiconductor light emitting diode (LED) device by forming an n-gallium nitride (n-GaN) layer on the LED device; and roughening the surface of the n-GaN layer to extract light from an interior of the LED device.

Abstract: A method for manufacturing an organic EL device comprising: coating a composition including an organic EL material on a plurality of electrodes to form an organic EL layer on each electrode; defining an effectively optical area in which the plurality of electrodes are formed; and defining a coating area which is broader than the effectively optical area, on which the composition including an organic EL material is to be coated. According to this method, a uniform display device without uneven luminance and uneven chrominance within a pixel or among a plurality of pixels in the effectively optical area can be obtained.

Abstract: Chemical vapor deposition processes utilize higher order silanes and germanium precursors as chemical precursors. The processes have high deposition rates yet produce more uniform films, both compositionally and in thickness, than films prepared using conventional chemical precursors. In preferred embodiments, trisilane is employed to deposit SiGe-containing films that are useful in the semiconductor industry in various applications such as transistor gate electrodes.

Abstract: A pixel of a semiconductor-based image detector includes a photodetector, at least one switching device serially connected to the photodetector and a bypass device interposed between the photodetector and a power supply voltage. Accordingly, even though excess charges may be generated in the photodetector, the excess charges flow into the power supply through the bypass device. Blooming can thereby be reduced or suppressed.

Abstract: First and second electrodes and first and second electrical connection portions are overlapped and electrically connected. A first substrate includes: an attachment portion, a connection portion and an extension portion, the attachment portion being attached to the second substrate, the connection portion being connected to the attachment portion and positioned outside the second substrate, and the extension portion being extending from the connection portion along an edge of the second substrate without overlapping the second substrate. The first electrical connection sections are formed on the extension portion of the first substrate.

Abstract: A heat spreader lid includes an outer periphery region having a lip for bonding to an underlying substrate board, a center region, and one or more strain isolation regions. The strain isolation regions are located between the center region and the outer periphery region and may comprise a number of slots cut partially or completely through the lid in a pattern surrounding or partially surrounding the center region. The strain isolation regions provide isolation of strain and relief of stress due to thermal expansion of the lid despite constraint at its periphery by the bonded lip, resulting in less thermally-induced warping of the center region, less thermally-induced stress on the bond between the lip and the substrate board, and/or less thermally-induced deflection of the substrate board.

Abstract: A packaging substrate (310) includes a semiconductor interposer (120) and at least one other intermediate substrate (110), e.g. a BT substrate. The semiconductor interposer has first contact pads (136C) attachable to dies (124) above the interposer, and second contact pads (340) attachable to circuitry below the interposer. Through vias (330) are made in the semiconductor substrate (140) of the interposer (120). Conductive paths going through the through vias connect the first contact pads (136C) to the second contact pads (340). The second contact pads (340) protrude on the bottom surface of the interposer. These protruding contact pads (340) are inserted into vias (920) formed in the top surface of the BT substrate. The vias provide a strong mechanical connection and facilitate the interposer handling, especially if the interposer is thin. In some embodiments, an interposer or a die (124.1) has vias in the top surface. Protruding contact pads (340.1, 340.2) of another die (124.1, 124.

Abstract: A singulation method used in a process for making a plurality of image sensor packages is disclosed. Firstly, a semi-finished product including a plurality of package structures formed on a substrate is placed on a support having a plurality of cavities for receiving the package structures. Then, the semi-finished product is sawed into separate image sensor packages. During the sawing step, the air pressure in the cavities is decreased to create suction within the cavities such that the support abuts against at least a portion of the housing of each package structure with a gap between the transparent component and the support whereby the package structures are positioned precisely and clamped in place with the support during the sawing step.

Abstract: A method of fabricating a micro-array IC package is recited. A wafer has a B-stageable adhesive applied, and the wafer is diced. The individual dice are applied to a lead-frame via their adhesive, and wirebonded to associated leads. The lead-frame is then encapsulated, and solder connectors are applied. The lead-frame is then singulated to produce a plurality of lead-frame based micro-array packages. The process thus allows lead-frame based manufacturing methods to be employed in the production of BGA-type packages, allowing such packages to be produced faster and more efficiently.

Abstract: A system for fabricating semiconductor components includes mating mold cavity plates having mold cavities configured to mold body segments of the semiconductor components on either side of a leadframe. The mold cavity plates also include runners configured to direct molding compound between the mold cavities and into the corners of the mold cavities. The runners prevent trapped air from accumulating in the corners of the mold cavities, and eliminate the need for air vents in the corners. The mold cavity plates also include dummy mold cavities configured to form dummy segments on the leadframe, and air vents in flow communication with the dummy segments. The dummy mold cavities are configured to collect trapped air, and to direct the trapped air through the air vents to atmosphere. Each dummy mold cavity has only a single associated air vent, such that cleaning is facilitated, and flash particles from the air vents are reduced.

Abstract: An electronic package having one or more components comprising: a substrate having a first coefficient of thermal expansion; a lid attached to the substrate, the lid including a vapor chamber, the lid having a second coefficient of thermal expansion, the first coefficient of thermal expansion matched to the second coefficient of expansion; a thermal transfer medium in contact with a back surface of each component and an outer surface of a lower wall of the lid; and each component electrically connected to a top surface of the substrate.

Abstract: A method for encapsulating an assembly with a methyl phenyl silicone rubber compound is provided. In various embodiments, the method can include exposing the assembly to a solvent, plasma etching the assembly, and producing a potting mixture, wherein the potting mixture comprises a methyl phenyl room temperature vulcanization silicone and a curing agent. The method can further include pouring the potting mixture over the assembly while under a vacuum until the assembly is encapsulated, pouring at least two control samples of the potting mixture while under the vacuum, curing the encapsulated assembly and the control samples in a first environment and monitoring the one of the control samples for hardness, and determining whether additional cure time in the first environment is needed based upon the results of the control sample hardness tests.

Abstract: An LDMOS device includes elementary MOS cells. The gate structure of the elementary cell includes a first conductor material finger. The LDMOS device includes first metal stripes for contacting source regions, second metal stripes for contacting drain regions, and third metal stripes placed on inactive zones for contacting a material finger by forming a contact point. The contact point is formed by a first prolongation of the material finger for connecting with one of the third stripes. The third metal stripe includes at least one fourth metal stripe placed on a separation zone. The material finger has a second prolongation and the fourth metal stripe has a first prolongation to form an additional contact point.

Abstract: An integrated circuit device is provided including an integrated circuit substrate having a fuse region. A window layer is provided on the integrated circuit substrate that defines a fuse region. The window layer is positioned at an upper portion of the integrated circuit device and recessed beneath a surface of the integrated circuit device. A buffer pattern is provided between the integrated circuit substrate and the window layer and a fuse pattern is provided between the buffer pattern and the window layer. Methods of forming integrated circuit devices are also described.

Abstract: A high voltage ESD-protection structure is used to protect delicate transistor circuits connected to an input or output of an integrated circuit bond pad from destructive high voltage ESD events by conducting at a controlled breakdown voltage that is less than a voltage that may cause destructive breakdown of the input and/or output circuits. The ESD-protection structure is able to absorb high current from these ESD events without snapback that would compromise operation of the higher voltage inputs and/or outputs of the integrated circuit. The ESD-protection structure will conduct when an ESD event occurs at a voltage above a controlled breakdown voltage of an electronic device, e.g., diode, in the ESD protection structure. Conduction of current from an ESD event having a voltage above the electronic device controlled breakdown voltage may be through another electronic device, e.g.

Abstract: A solid picture element that transfers charges completely from a photodiode portion to an amplifying transistor portion to substantially eliminate residual images and methods of its manufacture are disclosed. The solid picture element includes a buried photodiode and a transistor in communication with a transfer gate that is a selective transfer path for charges from the photodiode to the transistor. The charge accumulation region is located so that it is not in contact with the upper surface of the semiconductor substrate and so that a margin of the charge accumulation region is located 0.0 to 0.2 ?m closer to the transistor than any portion of the depletion prevention region. Methods of manufacture of the picture element of the present invention include using the transfer gate as a mask and implanting ions into a semiconductor substrate at a first angle to form the charge accumulation region and at a second, steeper, angle to form the depletion prevention region.

Abstract: A method for making a semiconductor device is provided. The method comprises (a) providing a semiconductor stack comprising a semiconductor substrate (203), a first semiconductor layer (205), and a first dielectric layer (207) disposed between the substrate and the first semiconductor layer; (b) forming a first trench in the first dielectric layer which exposes a portion of the substrate; (c) forming a first doped region (209) in the exposed portion of the substrate; and (d) forming anode (211) and cathode (213) regions in the first implant region.

Abstract: A mask is formed selectively on a crystalline silicon film containing a catalyst element, and an amorphous silicon film is formed so as to cover the mask. Phosphorus is implanted into the amorphous silicon film and the portion of the crystalline silicon film which is not covered with the mask. The silicon films are then heated by rapid thermal annealing (RTA). By virtue of the existence of the amorphous silicon film, the temperature of the crystalline silicon film is increased uniformly, whereby the portion of the crystalline silicon film covered with the mask is also heated sufficiently and the catalyst element existing in this region moves to the phosphorus-implanted, amorphous portion having high gettering ability. As a result, the concentration of the catalyst element is reduced in the portion of the silicon film covered with the mask. A semiconductor device is manufactured by using this portion.

Abstract: A semiconductor device having a semiconductor layer, includes: a first impurity atom having a covalent bond radius larger than a minimum radius of a covalent bond of a semiconductor constituent atom of a semiconductor layer; and a second impurity atom having a covalent bond radius smaller than a maximum radius of the covalent bond of the semiconductor constituent atom; wherein the first and second impurity atoms are arranged in a nearest neighbor lattice site location and at least one of the first and second impurity atoms is electrically active.

Abstract: A method of forming a fin field effect transistor includes forming a fin and forming a source region on a first end of the fin and a drain region on a second end of the fin. The method further includes forming a dummy gate with a first semi-conducting material in a first pattern over the fin and forming a dielectric layer around the dummy gate. The method also includes removing the first semi-conducting material to leave a trench in the dielectric layer corresponding to the first pattern, thinning a portion of the fin exposed within the trench, and forming a metal gate within the trench.

Abstract: There is provided a method in which a TFT with superior electrical characteristics is manufactured and a high performance semiconductor device is realized by assembling a circuit with the TFT. The method of manufacturing the semiconductor device includes: a step of forming a crystal-containing semiconductor film by carrying out a thermal annealing to a semiconductor film; a step of carrying out an oxidizing treatment to the crystal-containing semiconductor film; a step of carrying out a laser annealing treatment to the crystal-containing semiconductor film after the oxidizing treatment has been carried out; and a step of carrying out a furnace annealing treatment to the crystal-containing semiconductor film after the laser annealing. The laser annealing treatment is carried out with an energy density of 250 to 5000 mJ/cm2.