Abstract: The present invention provides a switching element that has a stable bistable characteristic and a high transition voltage and demonstrates excellent cyclic performance. The switching element has two stable resistance values with respect to the voltage applied between electrodes, wherein a first electrode layer, an organic bistable material layer, and a second electrode layer are successively formed as thin films on a substrate and the organic bistable material constituting the organic bistable material layer is a quinomethane-based compound or a monoquinomethane-based compound. A metal constituting the second electrode layer is diffused into the organic bistable material layer. It is preferred that the second electrode layer be formed by vapor deposition and the temperature of the substrate during the vapor deposition be 30-150° C.

Abstract: The present invention relates to thin films suitable as dielectrics in integrated circuits and for other similar applications and to methods for the production thereof. In particular, the invention concerns thin films comprising at least partially cross-linked siloxane structures obtainable by hydrolysis of one or more silicon compounds of the general formula R1—R2—Si—(X1)3, wherein X1 is a leaving group, R2 is a cycloalkyl having from 3 to 16 carbon atoms, an aryl having from 5 to 18 carbon atoms or a polycyclic alkyl group having from 7 to 16 carbon atoms, and R1 is a substituent of R2 selected from alkyl groups having from 1 to 4 carbon atoms, alkenyl groups having from 2 to 5 carbon atoms, alkynyl groups having from 2 to 5 carbon atoms, and aromatic groups having 5 or 6 carbon atoms, each of said groups being optionally substituted, and Cl and F.

Abstract: The invention relates to fluoranthene derivatives of the general formula (I) in which R1, R2, R3 and a are each defined according to the description, with the proviso that at least one of the R1 or R2 radicals is not hydrogen, to processes for their preparation and to the use of the fluoranthene derivatives as emitter molecules in organic light-emitting diodes (OLEDs), to a light-emitting layer comprising the inventive fluoranthene derivatives as emitter molecules, to an OLED comprising the inventive light-emitting layer and to devices comprising the inventive OLED.

Abstract: An aromatic compound of the following formula (1), (2), (5) or (6). wherein, Ar1 and Ar3 represent a tetra-valent aromatic hydrocarbon group or a tetra-valent heterocyclic group, and Ar2, Ar4, Ar5, Ar6 and Ar7 represent a tri-valent aromatic hydrocarbon group or a tri-valent heterocyclic group, A1 represents -Z1-, -Z2-Z3- or -Z4=Z5-, wherein Z1, Z2 and Z3 represent O, S or the like and Z4 and Z5 represent N, B, P or the like, X1, X2, X3, X4, X9, X10, X11, and X12 represent a halogen atom or the like.

Abstract: Novel 2,7-di(arylamino)-substituted fluorenes that are further substituted at the 9-position with one or more crosslinkable moieties, oligomers or polymers formed by crosslinking of said crosslinkable moieties, methods for their preparation, and use thereof in forming solvent resistant films having use as interlayers in electronic devices, especially electroluminescent devices.

Abstract: Systems for emitting light incorporating pixel structures of organic light-emitting diodes (OLEDs) are provided. A representative system comprises: a first sub-pixel area including a first OLED; and a second sub-pixel area including a second OLED and a second control circuit, wherein said second control circuit includes electronic components for controlling said first and second OLEDs.

Abstract: An organic memory device having a memory active region formed by an embossing structure. This invention provides an organic memory device including a substrate, a first electrode formed on the substrate, an organic memory layer formed on the first electrode, a second electrode formed on the organic memory layer and an embossing structure provided at the organic memory layer to form a memory active region.

Abstract: The present invention relates to an organic electroluminescent display device for applying to the field of full-color display. The device includes a first electrode provided on the surface of a color filter. A first organic light emitting unit for generating a first light and a fourth organic light emitting unit for generating a fourth light respectively is provided on the surface of the first electrode. The first organic light emitting unit is provided on the vertical extension place of a first photo-resist of the color filter and the first light can pass through the first photo-resist. The fourth organic light emitting unit is provided on the vertical extension place of a second photo-resist and third photo-resist. The fourth light can pass though the second photo-resist and filtered to generate a second color light, pass through the third photo-resist and filtered to generate a third color light.

Abstract: The present disclosure relates to a display device comprising an insulating substrate; a source electrode and a drain electrode on the insulating substrate and separated by a channel area; an organic semiconductor layer formed in the channel area and on at least a portion of the source electrode and at least a portion of the drain electrode; and a self-assembly monolayer having a first portion disposed between the organic semiconductor layer and the source electrode and a second portion disposed between the organic semiconductor layer and the drain electrode to reduce contact resistance between the electrodes and the organic semiconductor layer. Thus, embodiments of present invention provide a display device including a TFT that is enhanced in its performance.

Abstract: By doping an organic compound functioning as an electron donor (hereinafter referred to as donor molecules) into an organic compound layer contacting a cathode, donor levels can be formed between respective LUMO (lowest unoccupied molecular orbital) levels between the cathode and the organic compound layer, and therefore electrons can be injected from the cathode, and transmission of the injected electrons can be performed with good efficiency. Further, there are no problems such as excessive energy loss, deterioration of the organic compound layer itself, and the like accompanying electron movement, and therefore an increase in the electron injecting characteristics and a decrease in the driver voltage can both be achieved without depending on the work function of the cathode material.

Abstract: A method for operating an input-cell comprises: receiving a sensor input signal, a digital-bias first control input and a second control input and, using a first resistor network to apply an analog pull-up bias to the sensor input signal when the bias of the first control input is in a first digital state. To provide a path for at least a portion of the first resistor network to a ground to cause the first resistor network to apply a pull-down bias to the sensor input signal when the bias of the first control input is in a second digital state. Receiving a voltage reference and an input waveform signal; using a second resistor network to apply to the input waveform signal to a comparator when the bias of the second control input is in a first digital state and, to apply a biased and attenuated input waveform signal to the comparator when the bias of the second control input is in a second digital state.

Abstract: A semiconductor device capable of preventing the occurrence of stress in a field region, and to prevent dislocation, caused by the stress, in the active region is provided. The semiconductor device includes a support substrate; an active island region having single crystal silicon being formed on the support substrate; a CVD film being configured to surround a periphery of the active island region; a boundary between the active island region and the CVD film having an interstice portion being formed therein, the interstice portion being configured to surround the single crystal silicon layer; and a first insulating film being configured to bury the interstice portion.

Abstract: A semiconductor device comprises a first insulating film provided over a substrate and heat-treated, a second insulating film provided over the first insulating film, and a semiconductor film provided over the second insulating film, the second insulating film and the semiconductor film being formed successively without exposing them to the atmosphere.

Abstract: A sequential lateral solidification (SLS) device and a method of crystallizing silicon using the same is disclosed, wherein alignment keys are formed on a substrate with one mask having a plurality of different patterns, and a crystallization process is progressed in parallel to an imaginary line connecting the alignment keys with information for a distance between the mask and the alignment key. The SLS device includes a laser beam generator for irradiating laser beams; a mask having a plurality of areas; a mask stage for moving the mask loaded thereto, to transmit a laser beam through a selective area of the mask; and a substrate stage for moving a substrate loaded thereto, to change portions of the substrate irradiated with the laser beam passing through the mask.

Abstract: An optical module includes a substrate, a chip, a reflector and a lens. The chip is disposed on the substrate for emitting light. The reflector is disposed on the substrate for reflecting light emitted by the chip. The lens is formed on the substrate using resin. The lens covers the chip and is not in contact with the reflector.

Abstract: In order to achieve an integration of functional structures into the housing of electronic components, provision is made of a method for producing an electronic component comprising at least one semiconductor element having at least one sensor-technologically active and/or emitting device on at least one side, the method comprising the following steps: provision of at least one die on a wafer, production of at least one patterned support having at least one structure which is functional for the sensor-technologically active and/or emitting device, joining together of the wafer with the at least one support, so that that side of the die which has the sensor-technologically active and/or emitting device faces the support, separation of the die.

Abstract: A diode is formed by an N+ diffusion layer and a P-type semiconductor substrate. In an N-well, a diode is formed by a P+ diffusion layer and an N+ diffusion layer. The N+ diffusion layer is connected to power supply wiring. A fuse is connected to the N+ diffusion layer and the P+ diffusion layer.

Abstract: An LED and a surface mounting LED substrate for use in production of multi-faced surface mounting LEDs can include a resist layer on a conductor pattern that runs from an LED chip-mounted upper surface along a side portion and to a lower surface of the LED substrate. The resist layer is formed at least at a portion that is folded and runs along the lower surface and across a cutting line for separating/dividing at least the multi-faced surface mounting LEDs into discrete surface mounting LEDs. The resist layer is configured to suppress a burr that sometimes develops at a section of the conductor pattern during cutting/dicing of the multi-faced surface mounting LED substrate.

Abstract: A laser induced thermal imaging (LITI) apparatus and a method of making an electronic device using the same are disclosed. The LITI apparatus includes a chamber, a substrate support, a contact frame, and a laser source or oscillator. The LITI apparatus transfers a transferable layer from a film donor device onto a surface of an intermediate electronic device. The LITI apparatus uses a magnetic force to provide a close contact between the transferable layer and the surface of the intermediate device. The magnetic force is generated by magnetic materials formed in two components of the LITI apparatus that are spaced apart interposing transferable layer and the surface of the intermediate device. Magnets or magnetic materials are formed in the two following components of the LITI apparatus: 1) the intermediate device and the film donor device; 2) the intermediate device and the contact frame; 3) the substrate support and the film donor device; or 4) the substrate support and the contact frame.

Abstract: The electrical connection structure includes: a first substrate which has a first electrode part; a second substrate which has a second electrode part opposing the first electrode part, and a wiring pattern connected to the second electrode part; an insulating cavity substrate which is disposed between the first substrate and the second substrate and has a through hole in a position corresponding to the first electrode part, the through hole being deeper than a sum of a height of the first electrode part and a height of the second electrode part and having an opening surface area not smaller than an area of the first electrode part; and conductive material which is filled in the through hole.

Abstract: According to the nitride semiconductor device with the active layer made of the multiple quantum well structure of the present invention, the performance of the multiple quantum well structure can be brought out to intensify the luminous output thereof thereby contributing an expanded application of the nitride semiconductor device.

Abstract: The present invention is directed to composite photonic crystal materials of a photonic crystal structure having voids throughout, where the photonic crystal structure includes a colloidal nanocrystal-doped composite infiltrated within the voids, the colloidal nanocrystal-doped composite including a sol-gel or polymeric host/matrix material.

Abstract: A recess is formed in a land (2) of an LED reflecting plate (1) formed of a metal plate. The recess comprises a flat LED chip mounting portion (7) and a reflecting portion (8) inclined with respect to the LED chip mounting portion (7). The LED reflecting plate (1) is mounted on a printed wiring board (25) such that the land (2) is fitted in a first through hole (18). An LED chip (27) mounted on the LED chip mounting portion (7) is connected to a terminal portion (22) formed on the printed wiring board (25). The printed wiring board (25) is diced along a third through hole (19) to form an LED device (30) as one unit. With this arrangement, heat radiation properties and reflecting efficiency of the LED device (30) can be improved, and the manufacturing cost can be decreased.

Abstract: The LED package structure includes a substrate, an LED chip, a plastic package body, and two leading legs. In addition, the LED chip is arranged on the substrate and covered by the packaging plastic body. Moreover, the plastic package body contains a light-converging part and a light-scattering part, in which the light-converging part has a first axis and the light-scattering part has a second axis. In addition, the first axis of the light-converging part intersects the second axis of the light-scattering part. Furthermore, one terminal of each of the two leading legs is electrically connected to the LED chip while another terminal extends out of the packaging plastic body. Because the LED package structure can converge light and scatter light in different directions, the backlight module implementing the LED package structure has the advantage of a shorter light-mixing distance and better light utilization.

Abstract: A thin-film transistor including a channel layer being formed of an oxide semiconductor transparent to visible light and having a refractive index of nx, a gate-insulating layer disposed on one face of the channel layer, and a transparent layer disposed on the other face of the channel layer and having a refractive index of nt, where there is a relationship of nx>nt. A thin-film transistor including a substrate having a refractive index of no, a transparent layer disposed on the substrate and having a refractive index of nt, and a channel layer disposed on the transparent layer and having a refractive index of nx, where there is a relationship of nx>nt>no.

Abstract: In a semiconductor laser device 10 including a semiconductor laser element 14, a frame 12 having a front face on which the semiconductor laser element 14 is placed, and a resin molded portion 15 that covers the front and back faces of the frame 12, on a front face side of the frame 12, the semiconductor laser element 14 is enclosed with an enclosure portion 15b of the resin molded portion 15, and the resin molded portion 15 has an open front serving as a laser beam emission window 15a. On a back face side of the frame 12, there is provided an exposed portion 16e enclosed with a U-shaped enclosure portion 15d of the resin molded portion 15, the exposed portion 16e where the frame 12 is exposed to the outside.

Abstract: A package allowing agile deployment of the location of each LED chip includes a heat slug to secure multiple LED chips, two lead frames, a conducting area extending along the edge of the heat slug, and a non-conductive material that connects the heat slug and the lead frame for those multiple LED chips to connect to the conducting area by means of a gold wire without being subject to the presence of the lead frame.

Abstract: The invention relates to a light emitting diode package that can prevent deterioration of phosphor and a method of manufacturing the same. The light emitting diode package includes a package body having a recessed part, a light emitting diode chip mounted on a floor surface of the recessed part and a lens structure disposed on an upper surface of the package body, apart from the light emitting diode chip. Phosphor is dispersed in at least a part of the lens structure.

Abstract: Processed traces are formed on at least a part of intended cutting lines A along which a wafer (10) where a nitride semiconductor lamination portion (6) is formed on a GaN based substrate (1) is divided into chips, by irradiating with a laser beam LB having a wavelength which is longer than the band gap wavelength of the GaN based substrate 1 and an electrical field intensity which causes a multiple photons absorption, while adjusting the focal point to a constant depth d within the GaN based substrate (1) from the back surface of the wafer. After that, the wafer (10) is divided into chips along cutting starting points (12) which are formed in the vicinity of the processed traces by hitting with an impact. As a result, the wafer can be easily divided into chips, and in particular, end faces of a resonator can be formed with cleavage planes when an LD is formed.

Abstract: A semiconductor package including a bidirectional compound semiconductor component and two power semiconductor devices connected in a cascode configuration.

Abstract: A bonded-wafer semiconductor device includes a semiconductor substrate, a buried oxide layer disposed on a first main surface of the semiconductor substrate and a multi-layer device stack. The multi-layer device stack includes a first device layer of a first conductivity disposed on the buried oxide layer, a second device layer of a second conductivity disposed on the first device layer, a third device layer of the first conductivity disposed on the second device layer and a fourth device layer of the second conductivity disposed on the third device layer. A trench is formed in the multi-layer device stack. A mesa is defined by the trench. The mesa has first and second sidewalls. A first anode/cathode layer is disposed on a first sidewall of the multi-layer device stack, and a second anode/cathode layer is disposed on the second sidewall of the multi-layer device stack.

Abstract: A semiconductor device is provided. The semiconductor device is suitable for an electrostatic discharge protection circuit. The semiconductor device includes a gate structure, an N-type source region, an N-type well region, an N-type drain region, and an N-doped region. Wherein, the gate structure comprises a gate and a gate oxide layer. The gate oxide layer is disposed between the gate and a substrate. In addition, the N-type source region is disposed in the substrate at one side of the gate, and the N-type well region is disposed in the substrate at another side of the gate. The N-type drain region is disposed in the substrate between the N-type well region and the gate structure. The N-type drain region has a first toothed part disposed in the N-type well region. The N-doped region is disposed in the N-type well region, and the N-doped region has a second toothed part.

Abstract: An integrated thermal imager for detecting combined passive LWIR or MWIR radiation of a scene and active SWIR radiation of a laser source is described The imager includes a two-dimensional focal plane array (2D-FPA) constituted by an assembly of voltage tunable photodetectors. Each voltage tunable photodetector integrates a quantum well infrared photodetector (QWIP) together with a heterojunction bipolar phototransistor (HBPT), thereby forming a pixel element in the 2D-FPA.

Abstract: A field-effect transistor includes a channel layer having a channel and a carrier supply layer, disposed on the channel layer, containing a semiconductor represented by the formula AlxGa1-xN, wherein x is greater than 0.04 and less than 0.45. The channel is formed near the interface between the channel layer and the carrier supply layer or depleted, the carrier supply layer has a band gap energy greater than that of the channel layer, and x in the formula AlxGa1-xN decreases monotonically with an increase in the distance from the interface. The channel layer may be crystalline of gallium nitride. The channel layer may be undoped. X of the formula AlxGa1-xN of the carrier supply layer is greater than or equal to 0.15 and less than or equal to 0.40 at the interface.

Abstract: A partially completed semiconductor integrated circuit device. The device has a semiconductor substrate and a dielectric layer overlying the semiconductor substrate. The device has a gate structure including edges and a substantially pure silicon dioxide mask structure overlying the gate structure. A thickness ranging from about 400 to about 600 Angstroms of the substantially pure silicon dioxide mask structure is included. The device has a dielectric layer forming sidewall spacers on the edges of the gate structure to protect the gate structure including the edges and an exposed portion of the pure silicon dioxide mask structure overlying the gate structure. The device has an epitaxially grown fill material (e.g., silicon/germanium, silicon carbide) in an etched source region and an etched drain region. Preferably, the etched source region and the etched drain region are coupled to the gate structure.

Abstract: In a semiconductor film having a heterojunction structure, for example a semiconductor film (11) including a SiGe layer (2) and a Si layer (3) formed on the SiGe layer (2), impurity concentration is controlled in such a manner that the concentration of impurity in the lower, SiGe layer (2) becomes higher than that in the upper, Si layer (3) by exploiting the fact that there is a difference between the SiGe layer (2) and the Si layer (3) in the diffusion coefficient of the impurity. The impurity contained in the semiconductor film 11 is of the conductivity type opposite to that of the transistor (p-type in the case of an n-type MOS transistor whereas n-type in the case of a p-type MOS transistor). In this way, the mobility in a semiconductor device including a semiconductor film having a heterojunction structure with a compression strain structure is increased, thereby improving the transistor characteristics and reliability of the device.

Abstract: A semiconductor device includes a main pattern disposed to overlap with an active region that is surrounded by a device isolating region, and the dummy pattern disposed on the device isolating region to be spaced apart from the active region by a predetermined distance. A distance between the dummy pattern and the active region is determined in accordance with a predetermined design rule. In particular, the semiconductor device includes a plurality of connector dummy patterns or auxiliary dummy patterns to achieve a stabilized firm dummy pattern.

Abstract: A semiconductor device includes a fin-shaped semiconductor layer, a gate electrode section formed in a widthwise direction of the semiconductor layer with a gate insulation film interposed therebetween, the gate electrode section including a plurality of electrode materials having different work functions and stacked one another, and a channel section formed adjacent to the gate insulation film in the semiconductor layer. The semiconductor device further includes source and drain regions formed adjacent to the channel section.

Abstract: A semiconductor device includes a substrate, a fuse that can be blown by the radiation of light formed above the substrate, and insulating films formed on the fuse and on the substrate. One of the insulating films includes a flat portion formed on the substrate and the surface thereof is higher than the surface of the fuse, and a protruded portion formed on the fuse continuously from the flat portion, and protruded from the surface of the flat portion.

Abstract: It is an object of the present invention to provide a laser irradiation apparatus and a laser irradiation method which can conduct a laser process homogeneously to the whole surface of a semiconductor film. A laser beam oscillated from a laser crystal having a wide wavelength range and a beam homogenizer are used. Since the laser beam having a wide wavelength range has low coherency, an interference pattern does riot appear on a semiconductor film. Moreover, a linear beam having a length of several meters or more in its major axis can be formed, which increases throughput of a laser anneal process.

Abstract: In a transistor adapted to suppress characteristic degradation resulting from fluorine contained in a deposited film, the concentration of fluorine contained in a gate insulating film (3) is reduced to 1.0×1020 atoms/cm3 or less. As a result, the transistor can provide excellent reliability even when it is continuously driven for a long period of time at a relatively high temperature.

Abstract: An object of the present invention is to provide a thin film transistor having a high mobility and having fewer fluctuations in the mobility or threshold voltage characteristics. A non-single-crystal semiconductor thin film having a thickness of less than 50 nm and disposed on an insulating substrate is irradiated with laser light having an inverse-peak-patterned light intensity distribution to grow crystals unidirectionally in a lateral direction. Thus, band-like crystal grains having a dimension in a crystal growth direction, which is longer than a width, are arranged adjacent to each other in a width direction to form a crystal grain array. A source region and a drain region of a TFT are formed so that a current flows in the crystal growth direction in an area including a plurality of crystal grains of this crystal grain array.

Abstract: An inventive electronic device, such as a multi-chip module (MCM), a Single In-line Memory Module (SIMM), or a Dual In-line Memory Module (DIMM), includes a base, such as a printed circuit board, having a surface on which flip-chip pads and wire-bondable pads are provided. The flip-chip pads define an area on the surface of the base at least partially bounded by the wire-bondable pads. A first integrated circuit (IC) die is flip-chip bonded to the flip-chip pads, and a second IC die is back-side attached to the first IC die and then wire-bonded to the wire-bondable pads. As a result, the flip-chip mounted first IC die is stacked with the second IC die in a simple, novel manner.

Abstract: A CMOS device comprising a FinFET comprises at least one fin structure comprising a source region; a drain region; and a channel region comprising silicon separating the source region from the drain region. The FinFET further comprises a gate region over the source region and the drain region and partitioning the fin structure into a first side and a second side, wherein the channel region is in mechanical compression on the first side and in mechanical tension on the second side. The FinFET may comprise any of a nFET and a pFET, wherein the nFET comprises a N-channel inversion region in the second side, and wherein the pFET comprises a P-channel inversion region in the second side. The CMOS device may further comprise a tensile film and a relaxed film on opposite sides of the fin structure, and an oxide cap layer over the fin structure.

Abstract: A power semiconductor device that includes a passive component, e.g., a capacitor, mechanically and electrically coupled to at least one pole thereof.

Abstract: An energy ray sensitive region 11 is divided in its horizontal direction into m columns with the vertical direction as the longitudinal direction, divided in its vertical direction into n rows with the horizontal direction as the longitudinal direction, and is thereby provided with m×n photoelectric conversion portions 13 that are arrayed two-dimensionally. Each of these photoelectric conversion portions 13 generates charges in response to the incidence of energy rays. On the front surface side of energy ray sensitive region 11, a plurality of transfer electrodes 15 are disposed so as to cover energy ray sensitive region 11. The plurality of transfer electrodes 15 are respectively disposed with the horizontal direction as the longitudinal direction and are aligned in the vertical direction. The respective transfer electrodes 15 are electrically connected by voltage dividing resistors 17.

Abstract: An array substrate includes a base substrate, a plurality of gate lines, a plurality of data lines and a pixel matrix. The plurality of gate lines and the plurality of data lines define pixel areas. The pixel matrix is formed on each pixel area, and includes a plurality of pixel columns and pixel rows. Each pixel column has a first pixel group and a second pixel group. The first pixel group is electrically connected to a first gate line adjacent to the pixel column. The second pixel group is electrically connected to a second gate line adjacent to the pixel column. Each pixel row is electrically connected to one data line adjacent to the pixel column.

Abstract: A solid-state imaging device and the production method capable of effectively suppressing color mixture between sensor portions, and a camera provided with the solid-state imaging device are provided: wherein the solid-state imaging device includes a first conductivity type semiconductor substrate, a second conductivity type epitaxial layer formed on the first conductivity type semiconductor substrate, a first conductivity type sensor portion formed in the epitaxial layer, and an active element formed in the epitaxial layer and for reading charges obtained by photoelectric conversion at the sensor portion.

Abstract: In a CMOS image sensor manufacturing process, heavily doped p type impurity ions (for example, B) are implanted in a dummy moat region when the heavily doped p type impurity ions is implanted in a PMOS transistor region, so that metal ion contamination is removed. Accordingly, a CMOS image sensor capable of reducing a leakage current by gettering metal ion contamination is provided.

Abstract: Magnetic multilayer structures, such as magnetic or magnetoresistive tunnel junctions (MTJs) and spin valves, having a magnetic biasing layer formed next to and magnetically coupled to the free ferromagnetic layer to achieve a desired stability against fluctuations caused by, e.g., thermal fluctuations and astray fields. Stable MTJ cells with low aspect ratios can be fabricated using CMOS processing for, e.g., high-density MRAM memory devices and other devices, using the magnetic biasing layer. Such multilayer structures can be programmed using spin transfer induced switching by driving a write current perpendicular to the layers.