Abstract: In an electronically commutated motor (M), rotor position signals are generated by means of a galvanomagnetic rotor position sensor (40). A timer (CNT_HL) brings about an advanced commutation which occurs only once the motor has reached a specific rotation speed, and whose magnitude is a function of the rotation speed.

Abstract: An apparatus for controlling an electric motor provided to drive a movable object such that a detected actual amount of motion of a movable portion of the electric motor or the movable object coincides with a target amount, comprising: a control-condition changing device operable to change at least one of (a) a resolution of detection of the actual amount of motion and (b) a voltage to be applied to the electric motor, depending upon the target amount; and a feedback motor controller operable to control the electric motor by application of the voltage, on the basis of the actual amount of motion detected with the resolution of detection and the target amount, such that the detected actual amount of motion coincides with the target amount. Also disclosed is a motor control method wherein the resolution of detection of the actual amount of motion and/or the voltage of the motor is/are changed depending upon the target amount of motion.

Abstract: There is provided a pivoting apparatus of an industrial robot including: a brake 40 that is fixed to a motor shaft 30s of a motor 30 to halt the motor 30; an encoder 50 that is fixed to the motor shaft 30s to detect the pivoting angle of the motor 30; a speed reducer 60 that is coupled with the motor shaft 30s to form a communicating hollow portion, that is fixed to and coupled with a pivoting-side arm 20, and that reduces the rotation speed of the motor 30; a pipe-supporting bearing 72 that is provided in a fixed-side arm 10 and that is communicated with the communicating hollow portion; and a low-speed pivoting pipe 70 whose one end is fixed to and coupled with the pivoting-side arm 20 and the other end of which is fixed to the pipe-supporting bearing 72, and through which a cable 80 is wired.

Abstract: A DC offset compensation system and method significantly reduce a DC offset voltage in the voltage feedback loop of an AC motor drive control system. A control voltage error signal is demodulated and filtered and applied to the closed loop voltage feedback signals to compensate for DC offset voltages in the closed loop voltage feedback. A frequency discriminator tuned to the fundamental motor frequency improves the precision of the DC offset detection. A startup flux DC offset compensation operates to eliminate initial startup flux DC offset. Motor flux compensation is improved through a variable flux filter time constant.

Abstract: A battery pack apparatus includes a battery pack having multiple rechargeable batteries arranged in parallel and heat medium passages formed therebetween. The battery pack apparatus also includes a heat insulation cover formed of a heat insulation material that covers a circumferential surface of the battery pack substantially entirely. A supply passage and a discharge passage are provided between the heat insulation cover and the battery pack. The supply passage supplies a heat medium to the heat medium passages while the discharge passage discharges the heat medium from the heat medium passages. The battery pack apparatus also includes a supply device that supplies the heat medium to the supply passage.

Abstract: A non-isolated power conversion system has an input stage and an output stage. A plurality of cascaded switching power converter stages are coupled between the input stage and the output stage. Each of the plurality of switching power converter stages has at least one switch that is activated in accordance with a duty cycle associated with a switching cycle. At least one energy storage device temporarily stores energy that is proportional to the duty cycle during the switching cycle for delivery to the output stage.

Abstract: A fixed-frequency current mode converter comprises a power stage to produce an inductor current and an output voltage, an error amplifier to generate an error signal from the difference between the output voltage and a reference voltage varied with the inductor current, a comparator to compare the error signal with a ramp signal varied with the inductor current to generate a comparison signal, and a PWM generator to generate a PWM signal in response to a fixed-frequency clock and the comparison signal to drive the power stage. A second comparator is further comprised to compare the error signal with a second reference voltage varied with the inductor current, and generates a second comparison signal to reset the clock when the error signal is lower than the second reference voltage.

Abstract: A sliding-mode switching power supply (24) having N phases (28) and a method of operating the power supply (24) are provided. N switches (30) are coupled to a bipolar power source (22), with each switch (30) effecting one phase (28). An inductance (32) is coupled to each switch (30), and a capacitance (36) is coupled to the inductances (32). A load (26) is coupled across the capacitance (36). A monitor circuit (38) is coupled to the inductances (32) and the capacitance (36) and configured to monitor currents (IL) through the inductances (32) and/or a voltage (VC) across the capacitance (36). A sliding-surface generator (78) is coupled to the monitor circuit (38) and generates a single sliding surface (?) for all phases (28). A constant-frequency control (104) forms a variable window (??) for the sliding surface (?). A switching circuit (138) switches the switches (30) at a switching frequency (fS) determined by the variable window (??).

Abstract: A PFM-type voltage regulator circuit converts an unregulated input voltage into a regulated output voltage using a first transistor controlled by a pulse control circuit and a second transistor controlled by a linear regulator circuit. The linear regulator circuit controls the second transistor when the regulated output voltage falls to a predetermined minimum target voltage level, thereby maintaining the regulated output voltage at the minimum target voltage level. The pulse control circuit detects the current passing through the second transistor, and in response generates a pulse signal having a predetermined duration that fully turns on the first transistor. The voltage through the first transistor is converted to an increasing inductor current that refreshes the regulated output voltage to a maximum target voltage level. When the pulse signal ends, the regulated output voltage again begins to fall toward the predetermined minimum target voltage level, and the cycle is repeated.

Abstract: A method and a system for current limiting using PWM control have been provided. The method includes sensing a load current to produce a control voltage. The control voltage is compared with a reference voltage to produce a detected output signal. Thereafter, the detected output signal is delayed and multiplied with a master PWM signal.

Abstract: Current source embodiments are provided which generate an output current pulse whose initial and terminal slew rates are enhanced with initial and terminal generators that respectively provide an initial current pulse at initiation of the command signal and a terminal current pulse at termination of the command signal. Current source embodiments also include a correction generator that inserts correction currents to substantially correct Lambda current errors in the current sources.

Abstract: A molded voltage sensor is provided that achieves excellent sensing accuracy over a wide temperature range by molding promary and secondary capacitances are of a voltage divider into a solid dielectric material and wherein th e capacitances are preferably fabricated from the same material, or at least materials having nearly identical temperature coefficients of permittivity. In a preferred arrangement, a first member of dielectric material includes a conductive pattern of the outer surface thereof and an electrical connection attached to the conductive pattern. The first memberis the molded into a prerdetermined location with respect to a central conductor and a layer of the dielectric molding material is also molded over the exterior of the first member. Another conductive pattern is formed on the over-molded layer. The overall assembly is then molded to form a body of the sesired shape and provides insulation between the conductor and the conductive patterns.

Abstract: Novel system and methodology for distinguishing a Network Interface Card (NIC) from a short circuit condition in a Power over Ethernet (PoE) system. A system for providing power to a powered device (PD) includes a PD probing circuit that generates a detection signal supplied to a device being probed and determines a response signal produced in response to the detection signal, and a control circuit that determines a detection value based on the response signal. The control circuit detects a short circuit if the detection value is in a first predetermined range, and detects a NIC if the detection value is in a second predetermined range outside of the first predetermined range.

Abstract: A method and a current sensor for measuring a current in a conductor. The sensor comprises a non-magnetic, flexible core member having a first end and a second end. A locking head having a channel therethrough is coupled to the first end of the core member. A first sensor conductor winding layer is mounted on the core member. Wherein the second end releasably engages the locking thread in the channel and adjustably configures the core member to surround the conductor as the second end is moved through the channel. In another embodiment the current sensor includes a locking tang within the channel and a plurality of sought tooth members on a portion of the core member and configured to selectively engage the locking tang as the second end of the core member is moved through the channel.

Abstract: A current sensor that includes a pair of segments. Each of the segments includes magnetically permeable cores that can be joined together. A winding is used to substantially encircle one of the cores.

Abstract: A quantum junction device having three or more wires connected to a loop surrounding a magnetic flux is used to act as a switch responsive to magnetic flux and therefore useable for mass storage devices or as a flux detector by sensing current direction, conductance tensor, in response to a magnetic field under test.

Abstract: An inspecting apparatus (20, 40, 50, 60) for liquid crystal displays includes a base plate (21, 41), a connecting device (200, 400) mounted on the base plate, a working table (25, 45, 55, 65) supported on the connecting device, and an electrical holding device (29) fixed to the working table. The electrical holding device can hold a mains switch (33) and an electrical connector (31) that is used to connect with leads of the LCD. Because the inspecting apparatus includes the electrical holding device for holding the electrical connector, operators can connect leads of the LCD and the electrical connector easily using a single hand. After that, operators can conveniently turn on the mains switch because the mains switch is adjacent to the electrical connector.

Abstract: A test system of a semiconductor device for a handler remote control is provided. The system includes: a tester for testing the semiconductor device; a handler connected to the tester through a GPIB (General Purpose Instruction Bus) communication cable; a tester server connected to the tester to download a test program, handler remote control program and a handler state check program to the tester; and communication data transmitted and received through the GPIB communication cable between the tester and the handler, wherein the communication data has basic communication data for an electrical test of the semiconductor device, communication data for the handler remote control, and communication data for a handler state check.

Abstract: A tachometer circuit includes a flutter reduction circuit and a tachometer. The tachometer circuit cancels pointer flutter in the tachometer without adversely affecting pointer response.

Abstract: A rotary position sensor measures the relative angular position (within a range of?180°) of a housing or stator and a rotor. The housing carries a galvanomagnetic sensing element and is adapted for fixation to a relatively fixed portion of a host system. The rotor carrying a magnet is disposed for rotation about a fixed axis with respect to the stator and is interconnected to a relatively moving portion of the host system through intermediate linkage. The magnet is juxtaposed in substantially axial alignment with the galvanomagnetic sensing element for magnetic interaction therewith. The housing defines a cavity to receive potting material for encasing the galvanomagnetic sensing element and an adjacent buffer cavity interconnected by a weir, which diverts ant excess potting material into the buffer cavity.

Abstract: A lifecycle analyzer includes a temperature control element for controlling the temperature of a plurality of magnetoresistive (MR) elements, which may be, e.g., in bar, slider, head gimbal assembly, or head stack assembly form. The MR elements are in electrical contact with a stress probe element for applying a bias voltage or current stress. The MR elements and/or a magnetic field generator are moved to place one or more MR elements within the magnetic field of the magnetic field generator for testing. During testing, the MR elements are in electrical contact with a test probe element. The temperature of the MR elements may be controlled during both the stressing and testing.

Abstract: Reference standards or articles having prescribed levels of damage are fabricated by monitoring an electrical property of the article material, mechanically loading the article, and removing the load when a change in electrical properties indicates a prescribed level of damage. The electrical property is measured with an electromagnetic sensor, such as a flexible eddy current sensor, attached to a material surface, which may be between layers of the article material. The damage may be in the form of a fatigue crack or a change in the mechanical stress underneath the sensor. The shape of the article material may be adjusted to concentrate the stress so that the damage initiates under the sensor. Examples adjustments to the article shape include the use of dogbone geometries with thin center sections, reinforcement ribs on the edges of the article, and radius cut-outs in the vicinity of the thin section.

Abstract: Systems, methods, and computer-readable media are disclosed for error-compensated counting of Hall states for motor position feedback and/or commutation. An indicated Hall state is detected by digital Hall state sensors and a duration of the Hall state is compared to a specified time period. When the duration exceeds the specified time period, the indicated Hall state is compared to one or more valid Hall states and a position counter is changed for valid states. When the indicated Hall state is invalid, the position counter is not changed. The Hall state sensors may be connected to logic means and may detect the position of a rotor of a permanent magnet motor relative to a stator. When noise induces a change in an indicated Hall state, corresponding noise-induced effects on the position counter may be may be removed through error-compensated counting.

Abstract: Nuclear spin tomography (synonym: magnetic resonance tomography, MRT) is applied in medicine for the purpose of examining patients. A method is proposed for improving the image homogeneity of image data from phase-cycled steady state sequences in magnetic resonance tomography. In the method, both the sum of squares (SOS) and the maximum intensity projection (MIP) are calculated, pixel-wise, from the image data of the participating sequences. Further, a result image optimized with regard to image homogeneity is obtained by pixel-wise combination of the sum-of-squares image and MIP image.

Abstract: Through advancing the phase of radio frequency (RF) excitation with each phase-encoding level, a method and apparatus increases the effectiveness of a Magnetic Resonance Imaging (MRI) device by correcting for main magnetic field inhomogeneities without noticeably decreasing the signal-to-noise ratio. The present invention also increases the effectiveness of fast imaging with steady precession (FISP) scans and allows FISP scans to image multiple slices. In an MRI device, a patient is subjected to a constant magnetic field, and RF pulses are used to excite the nuclei in the patient's body. The nuclei release a corresponding RF signal as the nuclei relax, which can be measured and mapped into a visual display. The RF pulses used to excite the nuclei in the body cooperate with a slice select gradient and a phase-encoding gradient. When the RF pulse is phase shifted with each phase-encoding gradient level, improved signal-to-noise ratios are observed.

Abstract: A magnetic resonance apparatus includes a main magnetic field generating assembly (12) located in a magnetic resonance suite generates a substantially spatially constant main magnetic field through at least a portion of a subject in an imaging region. A gradient field generating assembly (16) overlays spatially variant gradient magnetic fields onto the main magnetic field. A radio frequency assembly (22) excites magnetic resonance in dipoles of a subject in the imaging region. A receiver (36) receives magnetic resonance signals from resonating dipoles in the imaging region. Radio frequency transponders (60) are affixed to objects (22, 104, 106, 108, 110, 114) in the magnetic resonance suite. The transponders (60) are interrogated by a reader/writer (62) to determine which coils are in the bore (14) and whether other coils and objects are outside of a safety threshold (116).

Abstract: An imaging system 2 is provided comprising a primary gradient coil assembly 52 and a shield coil assembly 42. The shield coil assembly 42 is connected in series to the primary gradient coil assembly 52. The shield coil assembly 42 comprises a first gradient shield coil 82 and a second gradient shield coil 84. The second gradient shield coil 84 is connected in parallel to said first gradient shield coil 82.

Abstract: A magnetic resonance apparatus has an RF antenna unit, a gradient coil unit and an RF shield, the conductor structures of which are independent of one another. The RF shield is arranged between the RF antenna unit and the gradient coil unit, a first RF field return volume is arranged between RF the antenna unit (1, 29, 55A, and the gradient coil unit, the RF field return volume closes RF magnetic field lines of the RF antenna unit and is bordered by the RF shield on the side of the gradient coil unit. The conductor structure of the gradient coil unit occupies a first region. A second conductor-free region is within the first region, on the side facing the RF antenna unit, between a primary gradient coil unit and a secondary shim gradient coil unit of the gradient coil unit. The second conductor-free region is at least partially surrounded by the conductor structure of the gradient coil unit and is fashioned as a second RF field return volume in connection with the first RF field return volume.

Abstract: A magnetic resonance imaging apparatus imaging a subject on the basis of a magnetic resonance signal radiated from the subject in a static magnetic field, includes a radio frequency coil which receives the magnetic resonance signal and has a direction dependency on a flux direction of the static magnetic field, and a support member which rotatably supports the radio frequency coil.

Abstract: The subject invention pertains to a method and apparatus for producing sensitivity maps with respect to medical imaging. The subject invention relates to a method for applying an inpainting model to correct images in parallel imaging. Some images, such as coil sensitivity maps and intensity correction maps, have no signal at some places and may have noise. Advantageously, the subject invention allows an accurate method to fill in holes in sensitivity maps, where holes can arise when, for example, the pixel intensity magnitudes for two images being used to create the sensitivity map are zero. A specific embodiment of the subject invention can accomplish de-noise, interpolation, and extrapolation simultaneously for these types of maps such that the local texture can be carefully protected.

Abstract: The present invention broadly comprises a method and apparatus for testing electrochemical cells which is faster and more cost-effective than current testing methods. Accordingly, the invention provides a method for testing electrochemical cells, particularly batteries for medical applications, such as for implantable devices for pacemakers, defibrillators, etc., comprising the steps of: surrounding at least one electrochemical cell with a vacuum with a pressure range of 0 to 0.001 Torr and measuring energy emitted from the electrochemical cell.

Abstract: An aerosol particle spectrometer utilizes a high voltage central electrode and a series of annular, axially arranged collector electrodes maintained at ground, for collecting positively charged particles suspended in an aerosol flowing between the electrodes. Each collector electrode provides current to an integrating electrometer including circuitry that rapidly charges and discharges the integrating capacitor during a brief reset cycle, to generate accurate particle characterizing information based on low currents, with high bandwidth and high dynamic range, virtually in real time.

Abstract: A sensor having a nanotube grown on and supported by thermal bimorph structures. The nanotube rests on a heat sink during sensing gas or a liquid and is moved from the heat sink when the nanotube is heated to desorb gas or liquid from it. The heatsink may function as a gate along with the bimorph structures as the other terminals of a transistor. Current-voltage and current-gate voltage characteristics may be obtained of the nanotube as a device like a transistor. These characteristics may provide information on a gas or liquid absorbed by the nanotube.

Abstract: The present invention provides a connector test device. The device includes a test jig which has a conductive test pin to detect whether a conductive pin of a connector is appropriately connected to the conductive test pin or not, and a moving pin and a test terminal to detect whether a waterproof pin of the connector is appropriately installed in the connector or not. The device simultaneously displays the electricity conduction states between the conductive pin and the conductive test pin and between the moving pin and the test terminal. The device easily and accurately measures the installed states of both the conductive pin and the waterproof pin provided in the connector.

Abstract: According to the present invention, a multi-layered capacitor includes a first capacitive element having a first conductor plate formed on a first layer, a second conductor plate formed on a second layer and an insulator arranged between the first and second conductor plates; and a second capacitive element which is arranged just on a layer above or below the first capacitive element.

Abstract: A CBCM circuit is capable of separately measuring each component of a measuring target capacitance. A node (N1) is electrically connected to a terminal (P2) between the drains of PMOS and NMOS transistors (MP2, MN2). As a target capacitance forming part, a coupling capacitance (Cc) is formed between the node (N1) and a node (N2). The node (N2) is connected to a pad (58) through the terminal (P2) and an NMOS transistor (MN3), and a node (N3) is connected to a terminal (P3) between the drains of PMOS and NMOS transistors (MP1, MN1). A reference capacitance (Cref) is formed at the node (N3) as a dummy capacitance. Currents (Ir, It) supplied from a power source to the nodes (N3, N1) are measured with current meters (61, 62), respectively and a current (Im) induced from the node (N2) and flowing to a ground level is measured with a current meter (63).

Abstract: The present invention relates to a laser beam inspection apparatus for inspecting a defect on a sample such as semiconductor integrated circuits by using a laser beam. The laser beam inspection apparatus irradiates a laser beam to a sample supplied with a constant current or applied by a constant voltage, and then detects indirectly a change in current or a change in electric field corresponding to a change in the value of resistance developed by scanning the laser beam along the surface of the sample. For example, the change in current is conducted indirectly in such a manner that a magnetic field detecting apparatus detects the change in the magnetic field caused by a current flowing the power supply line provided between a constant voltage source and a sample, and whereby it becomes possible to specify the defective area of the sample based on the detection of the change in the magnetic field.

Abstract: A wafer test assembly includes multiple probe head substrates arranged like tiles with connectors attached to one side and probes supported on the opposing side. In one embodiment, flexible cable connectors directly connect the connectors on the probe head tile to a test head, while in another embodiment the flexible cables connect the probe head tile to a PCB providing horizontal routing to test head connectors. In one embodiment, leveling pins provide a simplified support structure connecting to a retaining element attached to the tiles to provide for applying a push-pull leveling force. A test head connector interface frame enables rearrangement of connectors between the test head and the probe card to provide for both full wafer contact or partial wafer contact. The test head connectors are rearranged by being slidable on rails, and unpluggable using pins, enabling movement over a range of positions.

Abstract: A probe card includes a flexible membrane, a plurality of probes attached to the flexible membrane, and a layer of foam connected to the flexible membrane so that when the probes are moved into the flexible membrane, the layer of foam is also deflected to produce a counteracting force at the probes. A plurality of push rods are used to transfer the force at the contacts to the foam layer. The foam layer is attached to a rigid plate or push plate. A guide plate includes openings through which the push rods pass. The guide plate supports the push rods along their length and reduces the spacing between the push rods at the flexible member when compared to the spacing of the push rods at the foam layer.

Abstract: A system and method for detecting and monitoring wafer probe stability including the steps of, probing each die on a wafer, and for each die determining whether the result of the probe is a pass or a fail. If the result of a probe is a fail, re-probing the die and determining whether the re-probe is a pass or a fail. Once all the dies have been probed determining the rate of die re-probes that lead to passes, comparing the rate of passes on re-probes to a pre-determined limit, and if the rate of passes on re-probes is greater than the predetermined limit, assigning the probe status as unstable.

Abstract: A curved spring structure includes a base section extending parallel to the substrate surface, a curved cantilever section bent away from the substrate surface, and an elongated section extending from the base section along the substrate surface under the cantilevered section. The spring structure includes a spring finger formed from a self-bending material film (e.g., stress-engineered metal, bimorph/bimetallic) that is patterned and released. A cladding layer is then electroplated and/or electroless plated onto the spring finger for strength. The elongated section is formed from plating material deposited simultaneously with cladding layers. To promote the formation of the elongated section, a cementation layer is provided under the spring finger to facilitate electroplating, or the substrate surface is pre-treated to facilitate electroless plating.

Abstract: A wafer staging platform for a wafer inspection system for inspecting of semiconductors or like substrates and method of handling wafers. The platform and related method is designed to reduce the amount of time needed to exchange wafers on a processing tool. The staging platform can include a vacuum-assisted feature. The method of handling includes simultaneously processing a plurality of wafers, during which the staging platform is employed to temporarily store wafer(s) in close proximity to a next in line station.

Abstract: The invention involves a semi-conductor component testing process, and a system for testing semi-conductor components, in which a central computer device, in particular a central test apparatus is provided, with which test result data obtained from at least two separate tests is jointly evaluated, in particular by means of an appropriate pattern recognition process, which incorporates the test result data obtained from the separate tests into the analysis.

Abstract: Corona charges are used to bias a wafer to push down mobile charges and then pull them up during temperature cycles. Mobile charge is measured from the drops in the corona voltage due to the mobile charges. Corrections are made in the measurements for dipole potentials, leakage and silicon band-bending.

Abstract: In an FET-characteristic measuring method, a predetermined bias voltage output from an output terminal of a bias tee is applied to the drain of an FET, and a pulse output from a pulse generator is applied to the gate thereof to thereby cause drain current to be generated. The drain current is converted by a load impedance, connected to an AC output terminal of the bias tee, into a voltage pulse, and is measured based on the voltage pulse. The method includes increasing the bias voltage by an amount corresponding to a voltage drop caused by the load impedance and repeating measurement of a value of the voltage pulse a predetermined number of times, and applying extrapolation to the last two values of the voltage-pulse values obtained by the predetermined number of repeated measurements to determine a drain voltage to be applied to the FET.

Abstract: Method and apparatus for a system monitor embedded in a programmable logic device are described. The system monitor includes a dynamic reconfiguration port interface for configuring or reconfiguring the system monitor during operation thereof. The system monitor includes an analog-to-digital converter which is reconfigurable responsive to input via a dynamic reconfiguration port.

Abstract: In a semiconductor logic circuit device including an internal circuit, a group of first pads, a group of second pads, and a plurality of input buffers, each connected between the internal circuit and one of the first and second pads, for supplying input signals from their corresponding pads to the internal circuit, each of the first pads is connected to at least one of a pull-up circuit for pulling up a voltage at each of the first pads to a first voltage, and a pull-down circuit for pulling down the voltage at each of the first pads to a second voltage lower than the first voltage.

Abstract: Integrated circuit die on wafer are electronically selected for testing using circuitry (161, 201, PA1–PA4) provided on the wafer.

Abstract: An on-DRAM termination resistance control circuit is capable of controlling resistance of an IC termination and minimizing area for the resistance control circuit by using a simplified circuit scheme. The on-DRAM termination resistance control circuit includes a push-up resistance adjusting unit, a pull-down resistance adjusting unit and resistance adjustment control unit. The push-up resistance adjusting unit adjusts resistances of a first and a second inner resistors based on an external reference resistor. The pull-down resistance adjusting unit adjusts a resistance of a third resistor based on the second inner resistor that is adjusted by adjustment of the push-up resistance control unit. The resistance adjustment control unit controls to alternatively repeat the operation of the push-up resistance adjusting unit and the pull-down resistance adjusting unit for a predetermined number of adjustment times.

Abstract: Pseudo-differential drivers and receivers are used to communicate data signals between two or more IC chips. The data paths are aligned using programmable delay circuitry to de-skew each data path. A programmable reference generator is used to generate a reference voltage used by one or a group of receivers to detect the data signals. The reference voltage is adjustable using coarse as well as fine digitally controlled voltage increments. Test signals are sent from the driver to the receiver and the reference voltage is varied over its adjustable range using the coarse and fine adjustment controls while circuitry determines a measure of the detection timing jitter on successive transitions of the test signal. The operational value of the reference voltage is set to the value where the detection timing jitter is determined to be a minimum.