Patents Issued in July 19, 2007
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Publication number: 20070164274Abstract: A brightness enforcement diffusion construction includes a transparent substrate made of plastic material e.g., PET, PMMA, MS, PS or PC, a diffusion layer disposed on one side of the light coupling or illuminating surface of the substrate, and brightness enforcement layer disposed on the other side; the diffusion layer contains multiple diffusion and/or acrylic particles to refract streams of light for producing diffusion results while enforcing the brightness of the streams of light that pass through the brightness enforcement layer.Type: ApplicationFiled: September 25, 2006Publication date: July 19, 2007Inventor: Chin-Hui Chen
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Publication number: 20070164275Abstract: A light-emitting device includes an organic insulating layer lying above a face of a substrate, reflective layers arranged on a face of the organic insulating layer, an Inorganic insulating layer extending over the reflective layers, pixel electrodes arranged on the inorganic insulating layer, and light-emitting sections arranged on the respective pixel electrodes. The inorganic insulating layer has openings and regions in which no pixel electrodes are arranged when viewed from above. The openings extend through the respective regions to the organic insulating layer. A method for manufacturing such a light-emitting device includes forming openings in regions of the inorganic insulating layer in advance of the formation of the light-emitting sections such that the openings extend through the regions to the organic insulating layer, the regions having no pixel electrodes thereon when viewed from above.Type: ApplicationFiled: November 30, 2006Publication date: July 19, 2007Applicant: SEIKO EPSON CORPORATIONInventor: Hideto ISHIGURO
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Publication number: 20070164276Abstract: Layers are produced, where the layers include a first layer formed of a metal and a second layer formed of an organic compound, the metal and the organic compound entering into an interaction, so that the layer serves as an electroactive layer for nonvolatile memories, the metal layer being deposited onto a substrate and, if appropriate, patterned, then being coated with an organic compound and being treated with a second organic compound.Type: ApplicationFiled: January 10, 2007Publication date: July 19, 2007Applicant: Qimonda AGInventors: Reimund Engl, Jorg Schumann, Andreas Walter, Recai Sezi, Anna Maltenberger
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Publication number: 20070164277Abstract: An organic light emitting display (OLED) includes a substrate, first and second driving units positioned on the substrate, a first light emitting diode (LED) connected with the first driving unit and including a first organic light emitting layer and a second emitting diode electrically connected with the second driving unit and including a second organic light emitting layer. The second emitting diode is positioned on the first emitting diode.Type: ApplicationFiled: January 18, 2007Publication date: July 19, 2007Inventors: Myeon Chang Sung, Changnam Kim, Sangkyoon Kim, Sun Kil Kang, Won Jae Yang, Honggyu Kim, Young Hoon Shin, Do Youl Kim, Honyun Lee, Myung Jong Jung
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Publication number: 20070164278Abstract: Provided are an organic light emitting device (OLED) and a flat display including the OLED. The OLED includes an organic layer which includes a pixel electrode, an opposite electrode, and at least an emission layer between the pixel electrode and the opposite electrode, wherein the emission layer includes a long wavelength-blue emission layer emitting blue light having a long wavelength and a short wavelength-blue emission layer emitting blue light having a short wavelength. The long wavelength-blue emission layer is positioned in a location to enhance emission of blue light from the emission layer. The OLED can emit blue light with high efficiency and high brightness.Type: ApplicationFiled: January 18, 2007Publication date: July 19, 2007Inventors: Chang-Ho Lee, Seung-Gak Yang, Hee-Yeon Kim, Jung-Han Shin, Hee-Joo Ko
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Publication number: 20070164279Abstract: A semiconductor chip comprises a metal pad exposed by an opening in a passivation layer, wherein the metal pad has a testing area and a bond area. During a step of testing, a testing probe contacts with the testing area for electrical testing. After the step of testing, a polymer layer is formed on the testing area with a probe mark created by the testing probe. Alternatively, a semiconductor chip comprises a testing pad and a bond pad respectively exposed by two openings in a passivation layer, wherein the testing pad is connected to the bond pad. During a step of testing, a testing probe contacts with the testing pad for electrical testing. After the step of testing, a polymer layer is formed on the testing pad with a probe mark created by the testing probe.Type: ApplicationFiled: December 5, 2006Publication date: July 19, 2007Applicant: MEGICA CORPORATIONInventors: Mou-Shiung Lin, Huei-Mei Yen, Chiu-Ming Chou, Hsin-Jung Lo, Ke-Hung Chen
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Publication number: 20070164280Abstract: The present invention provides a thin film transistor that can be manufactured at lower cost and at higher yield by simplifying a manufacturing process, a manufacturing method thereof, and a manufacturing method of a display device using the thin film transistor. According to this invention, a pattern used in a pattering process is formed by using a droplet discharging method. The pattern is formed by selectively discharging a composition comprising an organic resin. By using the pattern, an electrically conductive material, an insulator or semiconductor constituting a semiconductor element, are patterned into a desired shape by a simple process.Type: ApplicationFiled: August 25, 2004Publication date: July 19, 2007Inventors: Shinji Maekawa, Osamu Nakamura, Koji Muranaka
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Publication number: 20070164281Abstract: An input display is provided in the present invention. The input display includes a thin film transistor (TFT) and a light blocking layer. The TFT includes a low-field electrode, a high-field electrode connected to the low-field electrode with a connecting section, and a field-effect area positioned on the connecting section and connected to the high-field electrode, wherein a PN junction field is formed in the field-effect area when the TFT is switched off. The light blocking layer corresponds to the high-field electrode and hides the field-effect area from all incident light from the TFT.Type: ApplicationFiled: January 18, 2006Publication date: July 19, 2007Inventor: Po-Sheng Shih
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Publication number: 20070164282Abstract: An electrooptic device includes: a plurality of data lines and a plurality of scanning lines that intersect on a substrate; a pixel electrode provided for each of pixels corresponding to the intersection of the data lines and the scanning lines; a first conductive layer provided for each pixel and a second conductive layer provided above the first conductive layer and electrically insulated from the first conductive layer; a third conductive layer provided above the second conductive layer and electrically insulated from the second conductive layer; an insulating side wall provided at an end of the second conductive layer and extending along the thickness of the second conductive layer; and a connecting conductive film disposed opposite to the end with the side wall in between and extending along the thickness to electrically connect the first conductive layer with the third conductive layer.Type: ApplicationFiled: December 1, 2006Publication date: July 19, 2007Applicant: SEIKO EPSON CORPORATIONInventor: Tatsuya ISHII
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ELECTRO-OPTICAL APPARATUS, METHOD FOR MANUFACTURING ELECTRO-OPTICAL APPARATUS, AND ELECTRONIC DEVICE
Publication number: 20070164283Abstract: An electro-optical apparatus includes a base, a resin film on the base, the resin film having at least one of projections and depressions at an upper surface thereof, and a light reflecting film disposed on the at least one of projections and depressions. The resin film under the light reflecting film includes a first region and a second region. A mode of the at least one of projections and depressions in the first region is different from a mode of the at least one of projections and depressions in the second region. A diffuse reflectivity of the first region is larger than a diffuse reflectivity of the second region.Type: ApplicationFiled: January 9, 2007Publication date: July 19, 2007Applicant: SANYO EPSON IMAGING DEVICES CORPORATIONInventor: Reiko WACHI -
Publication number: 20070164284Abstract: A thin film transistor array substrate and a method for manufacturing the thin film transistor array substrate are disclosed. Specifically, a thin film transistor array may be formed using a reduced number of masks.Type: ApplicationFiled: December 14, 2006Publication date: July 19, 2007Inventors: Yong In Park, Jae Young Oh, SooPool Kim
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Publication number: 20070164285Abstract: In the present invention, an electron injection composition for a light-emitting element, comprising a pyridine derivative represented by general formula 1 and at least one of an alkali metal, an alkali earth metal, and a transition metal, is used to form an electron injection layer in a portion of a layer including luminescent material in a light-emitting element, and it is also an object of the present invention to provide, by using the composition, a light-emitting element that has more superior characteristics and a longer lifetime as compared to conventional ones. where each of X1 and X2 represents: (where each of R1 to R8 represents hydrogen, halogen, a cyano group, an alkyl group having 1 to 10 carbon atoms, a haloalkyl group having 1 to 10 carbon atoms, an alkoxyl group having 1 to 10 carbon atoms, a substituted or unsubstituted aryl group, or a substituted or unsbstituted heterocyclic group.Type: ApplicationFiled: March 5, 2007Publication date: July 19, 2007Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Yasuo Nakamura
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Publication number: 20070164286Abstract: A thin film transistor array panel is provided, which includes: a gate line formed on an insulating substrate; a gate insulating layer on the gate line; a semiconductor layer on the gate insulating layer; a data line formed on the gate insulating layer; a drain electrode formed at least in part on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode; a color filter formed on the data line and the drain electrode; a second passivation layer formed on the color filter; and a pixel electrode formed on the color filter, connected to the drain electrode, overlapping the second passivation layer, and enclosed by the second passivation layer.Type: ApplicationFiled: March 8, 2007Publication date: July 19, 2007Inventor: Dong-Gyu Kim
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Publication number: 20070164287Abstract: On an insulating substrate, a first insulating buffer layer, a heat accumulating-light shielding layer having at least a silicon layer on the surface thereof, a second insulating buffer layer and a first silicon layer are laminated in the order recited from the bottom. The lamination structure of the heat accumulating-light shielding layer, second buffer layer and first silicon layer is patterned. A laser beam is applied the patterned first silicon layer to melt and crystallize the first silicon layer. A thin film transistor is formed by using the crystallized first silicon layer. A polysilicon thin film transistor of high performance and small leak current to be caused by light as well as a display device using such thin film transistors is provided.Type: ApplicationFiled: February 23, 2007Publication date: July 19, 2007Inventors: Takuya Hirano, Takuya Watanabe
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Publication number: 20070164288Abstract: A liquid crystal display panel where pixel cells defined by gate lines and data lines which are located to cross each other are arranged in a matrix shape, wherein each of the pixel cells includes a thin film transistor located at a crossing of the gate line and the data line, a pixel electrode connected to the thin film transistor, and a protrusion that overlaps a gate electrode of the thin film transistor to form a parasitic capacitor with the gate electrode and is connected to the pixel electrode, wherein each protrusion in the pixel cells of the liquid crystal display panel have an area determined in accordance with a location of the pixel cell in the liquid crystal display panel.Type: ApplicationFiled: June 26, 2006Publication date: July 19, 2007Applicant: LG. PHILIPS LCD CO., LTD.Inventors: Chang Oh, Hyun Jin, Jin Park, Young Tak
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Publication number: 20070164289Abstract: A thin film transistor substrate and a fabricating method that includes an opening hole that separates a gate shorting line connected to a gate shorting bar used upon a lighting-inspecting of a gate line into an odd and an even gate shorting line is provided.Type: ApplicationFiled: June 30, 2006Publication date: July 19, 2007Inventor: Ji Jung
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Publication number: 20070164290Abstract: There is provided an active matrix type display device in which the display device is formed of a driver circuit with an insulated gate FET capable of operating at high speed, and even if an area of a pixel electrode per unit pixel is made small, sufficient storage capacitance can be obtained. In a semiconductor device comprising an active matrix circuit with an insulated gate field effect transistor having at least an active layer made of single crystalline semiconductor, an organic resin insulating layer is formed over the insulated gate field effect transistor, a storage capacitance is formed of a light shielding layer formed over the organic resin insulating layer, a dielectric layer formed to be in close contact with the light shielding layer, and a light reflecting electrode connected to the insulated gate field effect transistor.Type: ApplicationFiled: January 3, 2007Publication date: July 19, 2007Inventors: Shunpei Yamazaki, Satoshi Murakami, Yasuyuki Arai
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Publication number: 20070164291Abstract: A light emitting diode module, a backlight assembly having the light emitting diode module, and a display device having the backlight assembly. The light emitting diode module includes a light emitting device including a light emitting diode chip, a body that surrounds the light emitting diode chip, and a heat releasing member that is in contact with the light emitting diode chip and protrudes from the body. The light emitting diode module also includes a printed circuit board having a hole corresponding to a protruding end portion of the heat releasing member.Type: ApplicationFiled: July 26, 2006Publication date: July 19, 2007Inventors: Gi-Cherl Kim, Sang-Yu Lee
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Publication number: 20070164292Abstract: A GaN semiconductor light-emitting element is provided. The GaN semiconductor light-emitting element includes an island-type seed region composed of a GaN-based compound semiconductor disposed on a substrate; an underlying layer having a three-dimensional shape composed of a GaN-based compound semiconductor, disposed on at least the seed region; a first GaN-based compound semiconductor layer of a first conductivity type, an active layer composed of a GaN-based compound semiconductor, and a second GaN-based compound semiconductor layer of a second conductivity type disposed in that order on the underlying layer; a first electrode electrically connected to the first GaN-based compound semiconductor layer; and a second electrode disposed on the second GaN-based compound semiconductor layer. The top face of the seed region is the A plane, and at least one side face of the underlying layer is the S plane.Type: ApplicationFiled: January 12, 2007Publication date: July 19, 2007Applicant: Sony CorporationInventor: Hiroyuki Okuyama
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Publication number: 20070164293Abstract: The invention concerns a light-emitting device comprising an electroluminescent element as a light source and a light-detecting element disposed superimposed on the electroluminescent element for detecting the quantity of light emitted by the electroluminescent element to generate an electric signal for use in the correction of the quantity of light emitted, wherein the light-detecting element has a semiconductor island region AR formed larger than a light-projecting region ALE and the thickness of the light-emitting layer in the light-projecting region ALE is uniform.Type: ApplicationFiled: January 16, 2007Publication date: July 19, 2007Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Takafumi HAMANO, Shinya YAMAMOTO, Hiroshi SHIROUZU
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Publication number: 20070164294Abstract: Provided is an organic light emitting display, comprising a substrate; a driving unit formed over the substrate; a planarization layer formed over the driving unit, the planarization layer comprising a normal tapered edge portion; and an emission unit formed over the planarization layer to be electrically connected to the driving unit.Type: ApplicationFiled: January 18, 2007Publication date: July 19, 2007Inventors: Sun Kil Kang, Changnam Kim, Honggyu Kim, Sangkyoon Kim
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Publication number: 20070164295Abstract: A light emitting device which is capable of suppressing deterioration by diffusion of impurities such as moisture, oxygen, alkaline metal and alkaline earth metal, and concretely, a flexible light emitting device which has light emitting element formed on a plastic substrate. On the plastic substrate, disposed are two layers and more of barrier films comprising a layer represented by AlNxOy which is capable of blocking intrusion of moisture and oxygen in a light emitting layer and blocking intrusion of impurities such as an alkaline metal and an alkaline earth metal in an active layer of TFT, and further, a stress relaxation film containing resin is disposed between two layers of barrier films.Type: ApplicationFiled: March 20, 2007Publication date: July 19, 2007Inventors: Shunpei Yamazaki, Toru Takayama
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Publication number: 20070164296Abstract: An object of the present invention is to provide a gallium nitride compound semiconductor multilayer structure useful for producing a gallium nitride compound semiconductor light-emitting device which operates at low voltage while maintaining a satisfactory light emission output. The inventive gallium nitride compound semiconductor multilayer structure comprises a substrate, and an n-type layer, an active layer, and a p-type layer formed on the substrate, the active layer being sandwiched by the n-type layer and the p-type layer, and the active layer comprising a thick portion and a thin portion, wherein the active layer has a flat lower surface (on the substrate side) and an uneven upper surface so as to form the thick portion and the thin portion.Type: ApplicationFiled: January 28, 2005Publication date: July 19, 2007Inventors: Hisayuki Miki, Tetsuo Sakurai, Hitoshi Takeda
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Publication number: 20070164297Abstract: Light-emitting device array 2 is mounted on LSI 1, following which necessary light-emitting devices 2a among two or more light-emitting devices 2 that make up mounted light-emitting device array 2 are allowed to remain and unnecessary light-emitting devices 2a are removed in order to mount light-emitting devices on a plurality of output ports that are randomly arranged on LSI 1.Type: ApplicationFiled: October 14, 2004Publication date: July 19, 2007Inventors: Mikio Oda, Hisaya Takahashi, Kaichiro Nakano, Hikaru Kouta, Kohroh Kobayashi
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Publication number: 20070164298Abstract: A light emitting diode (LED) having a vertical structure and a method for fabricating the same. The light emitting diode (LED) having a vertical structure includes a support layer; a first electrode formed on the support layer; a plurality of semiconductor layers formed on the first electrode; a conductive semiconductor layer formed on the plurality of semiconductor layer and provided with an outer surface having a tilt angel of a designated degree; and a second electrode formed on the conductive semiconductor layer.Type: ApplicationFiled: December 15, 2006Publication date: July 19, 2007Applicants: LG ELECTRONICS INC., LG INNOTEK CO., LTD.Inventors: Jong Wook Kim, Jae Wan Choi, Hyun Kyong Cho, Jong Ho Na, Jun Jang
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Publication number: 20070164299Abstract: Electronic circuits dedicated to high frequency and high power applications based on gallium nitride (GaN) suffer from reliability problems. The main reason is a non-homogenous distribution of the electronic density in these structures that originates from alloy disorders at the atomic and micrometric scale. This invention provides processes for manufacturing semiconducting structures based on nitrides of Group III elements (Bal, Ga, In)/N which are perfectly ordered along a preferred crystalline axis. To obtain this arrangement, the ternary alloy barrier layer is replaced by a barrier layer composed of alternations of binary alloy barrier layers. The lack of fluctuation in the composition of these structures improves electron transport properties and makes the distribution more uniform.Type: ApplicationFiled: March 12, 2007Publication date: July 19, 2007Inventors: Hacene Lahreche, Philippe Bove
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Publication number: 20070164300Abstract: Disclosed is a white light emitting diode possessing a phosphor layer to convert blue light into yellow light, provided on a blue light emitting diode, wherein the phosphor layer possesses an inorganic compound containing a phosphor, and particularly a white light emitting diode, wherein this inorganic compound is a phosphor. Also disclosed is a method of manufacturing a white light emitting diode, possessing a step of forming the foregoing phosphor layer made of an inorganic compound containing a phosphor via an aerosol deposition method. A white light emitting diode exhibiting high reliability and longer operating life, which is prepared via use of a blue LED element, can be provided by what is described above.Type: ApplicationFiled: February 24, 2005Publication date: July 19, 2007Applicant: Konica Minolta Holdings, Inc.Inventors: Hiroyuki Nabeta, Hideaki Wakamatsu
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Publication number: 20070164301Abstract: A light-emitting device with improved light-emitting brightness comprises a first electrode and a second electrode on the upper surface of a light emitting element. On the positions opposite to the first electrode and the second electrode, a first power supply electrode and a second power supply electrode are provided on the partial upper surface of a power supply substrate. A reflective layer is provided between the first power supply electrode, the second power supply electrode and power supply substrate. A eutectic layer is used to firmly provide the light emitting element on the power supply substrate such that the first electrode and second electrode can be electrically connected to corresponding first power supply electrode and second power supply electrode, and thus protecting structural feature of the reflective layer and maintaining the reflective efficiency of the reflective layer.Type: ApplicationFiled: January 18, 2006Publication date: July 19, 2007Inventor: Ming-Der Lin
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Publication number: 20070164302Abstract: A light emitting device capable of efficiently dissipating heat outward, and a method producing it are provided. The light emitting device comprises an insulating board, a metal member, a light emitting element, a conductive member and a transparent member. The insulating board has a through hole. The metal member is inserted into the through hole. The light emitting element is mounted on the top surface of the metal member. The conductive member is formed on the insulating board and is electrically connected to the light emitting element. The transparent member covers the light emitting element and the top surface of the insulating board. The conductive member is continuously formed from the top surface to the bottom surface of the insulating board. The bottom surface of the metal member is substantially coplanar with the bottom surface of the conductive member on the bottom surface side of the insulating board.Type: ApplicationFiled: December 22, 2006Publication date: July 19, 2007Applicant: NICHIA CORPORATIONInventor: Yuichiro Tanda
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Publication number: 20070164303Abstract: A LED lamp includes a substrate, which has through holes cut through the top wall and bottom wall thereof and electric contacts fixedly provided at the top wall corresponding to the through holes for connection to power source, metal locating blocks respectively fixedly mounted in the through holes inside the substrate and carry a respective LED (light emitting diode) chips in each through hole of the substrate, and lead wires respectively electrically coupled between the LED chips at the locating blocks and the contacts at the substrate for guiding electric current from the contacts to the LED chips.Type: ApplicationFiled: January 13, 2006Publication date: July 19, 2007Applicant: LIGHTOP TECHNOLOGY CO., LTD.Inventor: Ying-Ming Ho
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Publication number: 20070164304Abstract: A compound semiconductor light-emitting diode comprising a light-emitting layer composed of a Group III-V compound semiconductor, and a current diffusion layer provided on the light-emitting layer and composed of a Group III-V compound semiconductor, characterized in that the current diffusion layer is composed of a conductive boron-phosphide-based semiconductor and has a bandgap at room temperature wider than that of the light-emitting layer.Type: ApplicationFiled: March 14, 2005Publication date: July 19, 2007Inventors: Ryouichi Takeuchi, Takashi Udagawa
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Publication number: 20070164305Abstract: An ohmic electrode structure of a nitride semiconductor device having a nitride semiconductor. The ohmic electrode structure is provided with a first metal film formed on the nitride semiconductor and a second metal film formed on the first metal film. The first metal film is composed of at least one material selected from a group consisting of V, Mo, Ti, Nb, W, Fe, Hf, Re, Ta and Zr. The second metal film is composed of at least one material different from that of the first metal film (102), selected from a group consisting of V, Mo, Ti, Nb, W, Fe, Hf, Re, Ta, Zr, Pt and Au.Type: ApplicationFiled: February 28, 2005Publication date: July 19, 2007Inventors: Tatsuo Nakayama, Yuji Ando, Hironobu Miyamoto, Masaaki Kuzuhara, Yasuhiro Okamoto, Takashi Inoue, Koji Hataya
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Publication number: 20070164306Abstract: The invention provides Group III nitride semiconductor crystals of a size appropriate for semiconductor devices and methods for manufacturing the same, Group III nitride semiconductor devices and methods for manufacturing the same, and light-emitting appliances. A method of manufacturing a Group III nitride semiconductor crystal includes a process of growing at least one Group III nitride semiconductor crystal substrate on a starting substrate, a process of growing at least one Group III nitride semiconductor crystal layer on the Group III nitride semiconductor crystal substrate, and a process of separating a Group III nitride semiconductor crystal, constituted by the Group III nitride semiconductor crystal substrate and the Group III nitride semiconductor crystal layer, from the starting substrate, and is characterized in that the Group III nitride semiconductor crystal is 10 ?m or more but 600 ?m or less in thickness, and is 0.2 mm or more but 50 mm or less in width.Type: ApplicationFiled: May 13, 2005Publication date: July 19, 2007Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Seiji Nakahata, Hideaki Nakahata, Koji Uematsu, Makoto Kiyama, Youichi Nagai, Takao Nakamura
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Publication number: 20070164307Abstract: A light emitting diode comprising a semiconductor layer, a first electrode, a second electrode and a diamond-like carbon layer is provided. The semiconductor layer includes a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer. Wherein, the light emitting layer locates between the first type doped semiconductor layer and the second type doped semiconductor layer. The first electrode is electrically connected to the first type doped semiconductor layer. The second electrode is electrically connected to the second type doped semiconductor layer. The diamond-like carbon layer covers on the semiconductor layer and exposes at least a portion of the first electrode. Moreover, the exposed outer surface of the diamond-like carbon layer is a rough surface. Alternatively, other passivation layer with rough surface can be substituted for the diamond-like carbon layer.Type: ApplicationFiled: March 16, 2007Publication date: July 19, 2007Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventor: Ching-Chung Chen
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Publication number: 20070164308Abstract: A light emitting apparatus has a light emitting element with an emission wavelength in the range of 360 to 550 nm and a rare-earth element doped oxide nitride phosphor or cerium ion doped lanthanum silicon nitride phosphor. Part of light radiated from the light emitting element is wavelength-converted by the phosphor. The light emitting apparatus radiates white light generated by a mixture of the wavelength-converted light and the other part of light radiated from the light emitting element.Type: ApplicationFiled: March 13, 2007Publication date: July 19, 2007Applicants: TOYODA GOSEI CO., LTD., INDEPENDENT ADMINISTRATIVE INSTITUTION, NATIONAL INSTITUTE FOR MATERIALS SCIENCEInventors: Naoki Yoshimura, Yoshinobu Suehiro, Yuji Takahashi, Koichi Ota, Mamoru Mitomo, Tadashi Endo, Masakazu Komatsu
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Publication number: 20070164309Abstract: A method of making a nonvolatile memory device includes fabricating a diode in a low resistivity, programmed state without an electrical programming step. The memory device includes at least one memory cell. The memory cell is constituted by the diode and electrically conductive electrodes contacting the diode.Type: ApplicationFiled: March 30, 2007Publication date: July 19, 2007Inventors: Tanmay Kumar, S. Brad Herner
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Publication number: 20070164310Abstract: An electrostatic discharge element includes a first diode and a second diode. The first diode has a first well region formed in a substrate, a P-type ion-implanted region formed in the first well region, an N-type ion-implanted region formed in the first well region and spaced from the P-type ion-implanted region by a predetermined first distance, and a first intermediate layer formed on a portion of the first well region corresponding to the predetermined first distance. The second diode has a second well region form in the substrate, a P-type ion-implanted region formed in the second well region, an N-type ion-implanted region formed in the second well region and spaced from the P-type ion-implanted region by a predetermined second distance, and a second intermediate layer formed on a portion of the second well region corresponding to the predetermined second distance.Type: ApplicationFiled: January 18, 2007Publication date: July 19, 2007Inventor: Eun-Kyoung Kwon
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Publication number: 20070164311Abstract: Method for making an InGaAs/GaAs quantum well laser (10) on a Silicon substrate (15.1). The method comprises the steps: Formation of a virtual Germanium substrate (15) on the Silicon substrate (15.1) by means of a low-energy plasma-enhanced chemical vapour deposition (LEPECVD). The virtual Germanium substrate (15) comprises a pure Germanium layer (15.3). Formation of a Gallium Arsenide structure on the virtual Germanium substrate (15) by means of a metal organic chemical vapour deposition process.Type: ApplicationFiled: September 4, 2004Publication date: July 19, 2007Inventors: Hans Von Kaenel, Isabelle Sagnes, Guillaume Jacques Saint-Girons, Sophie Bouchoule
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Publication number: 20070164312Abstract: The present invention is directed to electronic devices comprising high-purity molybdenum oxide in at least a part of the devices. The devices according to the present invention such as a bipolar transistor, a field effect transistor and a thyristor have a high withstand voltage. The present invention is directed also hostile-environment electron devices formed using high-purity molybdenum oxide. The devices according to the present invention can be fabricated at a relatively lower temperature such as 700° C. than that at which GaN or SiC devices are fabricated, that is a temperature higher 1000° C.Type: ApplicationFiled: March 12, 2007Publication date: July 19, 2007Inventor: Takashi Katoda
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Publication number: 20070164313Abstract: A semiconductor structure, comprising: a substrate; a first aluminum nitride (AlN) layer having an aluminum/reactive nitride (Al/N) flux ratio less than 1 disposed on the substrate; and a second AlN layer having an Al/reactive N flux ratio greater than 1 disposed on the first AlN layer. The substrate is a compound of silicon wherein the first AlN layer is substantially free of silicon.Type: ApplicationFiled: March 30, 2007Publication date: July 19, 2007Inventors: William Hoke, John Mosca
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Publication number: 20070164314Abstract: An N-polar III-nitride heterojunction JFET which includes a P-type III-nitride body under the gate electrode thereof.Type: ApplicationFiled: January 3, 2007Publication date: July 19, 2007Inventors: Robert Beach, Zhi He
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Publication number: 20070164315Abstract: High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.Type: ApplicationFiled: March 12, 2007Publication date: July 19, 2007Inventors: Richard Smith, Adam Saxler, Scott Sheppard
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Publication number: 20070164316Abstract: A heterojunction bipolar transistor with InGaP as the emitter layer and capable of both reliable electrical conduction and thermal stability wherein a GaAs layer is inserted between the InGaP emitter layer and AlGaAs ballast resistance layer, to prevent holes reverse-injected from the base layer from diffusing and reaching the AlGaAs ballast resistance layer.Type: ApplicationFiled: March 22, 2007Publication date: July 19, 2007Inventors: Isao Ohbu, Chushiro Kusano, Yasunari Umemoto, Atsushi Kurokawa
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Publication number: 20070164317Abstract: A cell includes a plurality of diffusion region pairs, each of the diffusion region pairs being formed by a first impurity diffusion region which is a constituent of a transistor and a second impurity diffusion region such that the first and second impurity diffusion regions are provided side-by-side in a gate length direction with a device isolation region interposed therebetween. In each of the diffusion region pairs, the first and second impurity diffusion regions have an equal length in the gate width direction and are provided at equal positions in the gate width direction, and a first isolation region portion, which is part of the device isolation region between the first and second impurity diffusion regions, has a constant separation length. In the diffusion region pairs, the first isolation region portions have an equal separation length.Type: ApplicationFiled: January 17, 2007Publication date: July 19, 2007Inventor: Kazuyuki Nakanishi
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Publication number: 20070164318Abstract: A semiconductor device includes: a semiconductor layer formed on a semiconductor substrate by performing epitaxial growth; a first buried insulating layer which is buried in the first region under the semiconductor layer; and a second buried insulating layer which is buried in the second region under the semiconductor layer in the position lower than the first buried insulating layer.Type: ApplicationFiled: January 17, 2007Publication date: July 19, 2007Applicant: SEIKO EPSON CORPORATIONInventor: Teruo Takizawa
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Publication number: 20070164319Abstract: In order to form a more stable silicon pillar which can be used for the formation of vertical transistors in DRAM cells, a multi-step masking process is used. In a preferred embodiment, an oxide layer and a nitride layer are used as masks to define trenches, pillars, and active areas in a substrate. Preferably, two substrate etch processes use the masks to form three levels of bulk silicon.Type: ApplicationFiled: March 7, 2007Publication date: July 19, 2007Applicant: MICRON TECHNOLOGY, INC.Inventor: Patrick Thomas
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Publication number: 20070164320Abstract: Semiconductor component or device is provided which includes a current barrier element and for which the impedance may be tuned (i.e. modified, changed, etc.) using a focused heating source.Type: ApplicationFiled: May 11, 2006Publication date: July 19, 2007Inventors: Alain Lacourse, Mathieu Ducharme, Hugo St-Jean, Yves Gagnon, Yvon Savaria, Michel Meunier
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Publication number: 20070164321Abstract: Transistors are fabricated by forming a protective layer having an opening extending therethrough on a substrate, and forming a gate electrode in the opening. A first portion of the gate electrode laterally extends on surface portions of the protective layer outside the opening, and a second portion of the gate electrode is spaced apart from the protective layer and laterally extends beyond the first portion. Related devices. and fabrication methods are also discussed.Type: ApplicationFiled: January 17, 2006Publication date: July 19, 2007Inventors: Scott Sheppard, Scott Allen
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Publication number: 20070164322Abstract: Transistors are fabricated by forming a protective layer having a first opening extending therethrough on a substrate, forming a dielectric layer on the protective layer having a second opening extending therethrough that is wider than the first opening, and forming a gate electrode in the first and second openings. A first portion of the gate electrode laterally extends on surface portions of the protective layer outside the first opening, and a second portion of the gate electrode is spaced apart from the protective layer and laterally extends beyond the first portion on portions of the dielectric layer outside the second opening. Related devices and fabrication methods are also discussed.Type: ApplicationFiled: July 26, 2006Publication date: July 19, 2007Inventors: Richard Peter Smith, Scott T. Sheppard
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Publication number: 20070164323Abstract: Gates of at least one of NMOS transistors and PMOS transistors of a CMOS integrated circuit are formed with an intermetallic compound. The work function of the gate electrode is tunable by controlling the selection of the metals that form a layer of the intermetallic compound. In one embodiment, a layer of each metal is deposited onto the gate area of a MOS transistor. At least one metal is deposited using atomic layer deposition. The intermetallic compound is formed by annealing subsequent to the deposition of the metals.Type: ApplicationFiled: January 18, 2006Publication date: July 19, 2007Inventors: Leonard Forbes, Paul Farrar, Kie Ahn