Abstract: An electrical interface between a scene to be imaged and a bolometer type sensor is disclosed. Efficiency is improved by means of a thermal energy concentrator including a lens and an antenna. Where a plurality of bolometer pixels are located in an array, a microantenna is provided for each pixel in the array with a common lens being provided to focus and channel incoming radiation to each microantenna. Radiation from a scene is further coupled by means of a lens and microantenna to the absorbing element of each bolometer through an AC coupling circuit including an electronic chopper implemented by means of a PIN diode, the conductivity of which is varied so as to affect the reflection coefficient of the input signal supplied through the microantenna.

Abstract: A system for identifying a gas sample includes a canister, a docking station, a thermal desorption device, and a spectrometer. The canister includes a sorbent and a valve. The docking station is configured to removably engage the canister. When the canister is engaged with the docking station, the canister is capable of fluid communication with a gas cell via the valve.

Abstract: Methods and apparatus for continuous real-time measurement of bulk material using gamma irradiation. A multi-energy gamma attenuation device monitors bulk material flow and produces a spectrum that is compared to a baseline spectrum to produce a relative weight/impurity/component ratio. A sample analysis, in combination with measurement of the relative weight/impurity/component ratio of the sample, allows for determination of the coefficients for determining the absolute weight/impurity/component values of the bulk material.

Abstract: An improved gamma ray detector and method for discriminating between “true” pairs of gamma rays produced by a single positron annihilation event and those randomly occurring “pairs” of gamma rays that may fall within the conventional acceptance criteria for “true” pairs. The gamma ray detector incorporates an additional array of “veto” detectors arranged adjacent or around a primary detector array. The array of “veto” detectors is configured to detect gamma rays that escape detection in the primary detector array. The detection data from both the primary detector array and the veto detector array are used as inputs into a discrimination circuit for “vetoing” those pairs of gamma rays detected by the primary detector array that are likely to be the result of two or more unrelated positron annihilation events.

Abstract: In a detector arrangement for a medical diagnosis apparatus as well as a medical imaging diagnostic method, radiation quanta striking a detector are detected and evaluated with spatial resolution. The use of collimators is thereby omitted, such that radiation quanta that strike at a non-perpendicular angle to the detector are also evaluated. For spatial resolution of the origin of the radiation quantum, the spatial distribution of sensor elements of the detector that emit a signal upon incidence of a radiation quantum is evaluated. A higher efficiency of the radiation evaluation is enabled and, particularly in nuclear medical diagnostic methods, the radiation exposure of the patient can be distinctly reduced.

Abstract: The invention provides an optical system for a charged particle multi-beam system. The optical system comprises an electrostatic lens component and a magnetic lens component. The components are used to focus a plurality of charged particle beams in a separate opening for each of at least a plurality a charged particle beams traveling through the optical system.

Abstract: A chamber suitable for use with a scanning electron microscope. The chamber comprises at least one aperture sealed with a membrane. The membrane is adapted to withstand a vacuum, and is transparent to electrons and the interior of the chamber is isolated from said vacuum. The chamber is useful for allowing wet samples including living cells to be viewed under an electron microscope.

Abstract: An apertured plate support mechanism used in an electron beam lithography machine. The apertured plate is held to a plate holder. The plate support mechanism has the plate holder for holding the apertured plate and a holder support for supporting the plate holder. The apertured plate is provided with an aperture through which a beam of charged particles passes. Grooves extending radially in plural directions about the center axis of the aperture are formed in the supported surface of the plate holder or the supporting surface of the holder support. Convex portions engaged in the grooves are formed on the other of the supported or supporting surfaces.

Abstract: A scanning microscope system includes an optical microscope observation unit that irradiates the sample with excitation light, and forms an optical image from fluorescence emitted from a sample. The system also includes a scanning map creator and a flying spot scanning observation unit. The scanning map creator creates a scanning map indicating a scanning region in which a substance to be scanned exists in the sample, based on brightness of pixels of the optical image. The flying spot scanning observation unit scans the scanning region of the sample with laser beam, and forms a scanning image based on fluorescence emitted from the sample.

Abstract: A radiation image storage panel which is provided with a stimulable phosphor substance layer containing a stimulable phosphor substance formed by a gas phase accumulation method on a support, wherein said stimulable phosphor substance layer is constituted of a columnar crystal structure, and slopes D1 and D2 satisfy 0°?|D1?D2|?40°, when acute angles formed by said radiation image storage panel surface and axial lines passing through the center of said columnar crystals, with respect to columnar crystals at arbitrary two points in the radiation image storage panel plane, are designated as slopes of columnar crystals, D1 and D2.

Abstract: A method of making an identifiable container by providing a molded plastic container that includes at least one layer of material blended with an additive. A mask is provided having a radiation aperture in the form of identifiable indicia, and radiation is directed through the aperture of the mask and onto the container such that the radiation is absorbed by the additive, thereby causing the additive to visibly respond in the form of the identifiable indicia.

Abstract: A technique for uniformity tuning in an ion implanter system is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for uniformity tuning in an ion implanter system. The method may comprise measuring an ion beam at a plurality of predetermined locations along a beam path. The method may also comprise calculating an ion beam profile along the beam path based at least in part on the ion beam measurements at the plurality of predetermined locations. The method may further comprise determining a desired velocity profile along the beam path based at least in part on the calculated ion beam profile such that the ion beam, when scanned according to the desired velocity profile, produces a desired ion beam profile along the beam path.

Abstract: An implanter provides two-dimensional scanning of a substrate relative to an implant beam so that the beam draws a raster of scan lines on the substrate. The beam current is measured at turnaround points off the substrate and the current value is used to control the subsequent fast scan speed so as to compensate for the effect of any variation in beam current on dose uniformity in the slow scan direction. The scanning may produce a raster of non-intersecting uniformly spaced parallel scan lines and the spacing between the lines is selected to ensure appropriate dose uniformity.

Abstract: The exposure of selected optical materials to large area electron beam irradiation can raise the refractive index of the optical material to allow the fabrication of waveguides, optical fibers, gradient index lenses, interference filters, antireflection coatings, heat reflective thermal control coatings and other optical elements.

Abstract: A device couples energy from an electromagnetic wave to charged particles in a beam. The device includes a micro-resonant structure and a cathode for providing electrons along a path. The micro-resonant structure, on receiving the electromagnetic wave, generates a varying field in a space including a portion of the path. Electrons are deflected or angularly modulated to a second path.

Abstract: An object plane detection system comprises a light source adapted to illuminate a media object to generate an image area on a photosensitive sensor. The system also comprises a detection module adapted to determine a location of an object plane corresponding to the media object based on a size of the image area.

Abstract: A system for identifying a mark or other recess formed in a substrate and at least partially covered by at least one layer of opaque or visibly opaque material. The system includes a radiation source configured and positioned to direct incident electromagnetic radiation of at least one wavelength toward the substrate, a reflectometer positioned so as to receive electromagnetic radiation reflected from a location of the substrate, and at least one processor associated with the reflectometer for analyzing an intensity of electromagnetic radiation of each wavelength of radiation reflected from the substrate. The radiation source may direct incident radiation including a range of wavelengths toward a substrate.

Abstract: A programmable resistance memory element including a memory material which is raised above a semiconductor substrate by a dielectric layer.

Abstract: An ovonic phase-change semiconductor memory device having a reduced area of contact between electrodes of chalcogenide memories, and methods of forming the same are disclosed. Such memory devices are formed by forming a tip protruding from a lower surface of a lower electrode element. An insulative material is applied over the lower electrode such that an upper surface of the tip is exposed. A chalcogenide material and an upper electrode are either formed atop the tip, or the tip is etched into the insulative material and the chalcogenide material and upper electrode are deposited within the recess. This allows the memory cells to be made smaller and allows the overall power requirements for the memory cell to be minimized.

Abstract: A method is provided for doping a carbon nanotube. The method comprises exposing the nanotube to a one-electron oxidant in a solution phase. A method is also provided for forming a carbon nanotube FET device.

Abstract: A photodetector and method of detecting far infrared optical signals. In one embodiment of the present invention, the photodetctor has a plurality of N barriers, N being an integer greater than 1, each barrier being a layer of a material made from a first and a second group III elements and a first group V element and characterized by a bandgap. The photodetector further has a plurality of N?1 emitters, each emitter being a layer of material made from a third group III element and a second group V element and characterized by a bandgap different from that of the barriers and having at least one free carrier responsive to optical signals, wherein each emitter is located between two barriers so as to form a heterojunction at each interface between an emitter and a barrier.

Abstract: An organic electroluminescent device comprising: an organic thin-film transistor element including at least an active layer made of an organic material; and an organic electroluminescent element driven by the organic thin-film transistor element.

Abstract: The invention provides a carbon nanotube field effect transistor including a nanotube having a length suspended between source and drain electrodes. A gate dielectric material coaxially coats the suspended nanotube length and at least a portion of the source and drain electrodes. A gate metal layer coaxially coats the gate dielectric material along the suspended nanotube length and overlaps a portion of the source and drain electrodes, and is separated from those electrode portions by the gate dielectric material. The nanotube field effect transistor is fabricated by coating substantially the full suspended nanotube length and a portion of the source and drain electrodes with a gate dielectric material. Then the gate dielectric material along the suspended nanotube length and at least a portion of the gate dielectric material on the source and drain electrodes are coated with a gate metal layer.

Abstract: Systems using coded particles for multiplexed analysis of biological samples or reagents, in which the codes on the particles are at least partially defined by light-polarizing materials.

Abstract: A resistance defect assessment device provided on a wafer for assessing a resistance variation defect in a component of an integrated circuit device, the resistance defect assessment device including test patterns capable of measuring a resistance variation component to be the resistance variation defect in each chip area or each shot area of the wafer, wherein the number of test patterns included in one chip area or one shot area is set so that it is possible to estimate the yield of the integrated circuit device.

Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device comprising an insulated gate field effect transistor provided with a region having added thereto an element at least one selected from the group consisting of carbon, nitrogen, and oxygen, said region having established at either or both of the vicinity of the boundary between the drain and the semiconductor layer under the gate electrode and the vicinity of the boundary between the source and the semiconductor layer under the gate electrode for example by ion implantation using a mask. It is free from the problems of reverse leakage between the source and the drain, and of throw leakage which occurs even at a voltage below the threshold ascribed to the low voltage resistance between the source and the drain.

Abstract: A liquid crystal apparatus is provided wherein the liquid crystal layer comprises a section formed by polymerizing a polymerizable compound in the presence of a liquid crystal by selectively irradiating active energy rays onto the substrate surface when no voltage is applied, or alignment control layers and bumps are formed by polymerizing a polymerizable compound which is added to said liquid crystal, or first electrodes with a vertical alignment control film and a second electrode with a horizontal alignment control film face each other and alignment control of the liquid crystal is performed by irradiating light from a direction tilted from the normal line direction on said liquid crystal display apparatus. A liquid crystal display apparatus which can implement high transmittance, high-speed response and a wide viewing angle can be provided.

Abstract: The invention relates to a substrate for a display, a method of manufacturing the same, and a display having the same and provides a substrate for a display which can be manufactured through simple steps with high reliability, a method of manufacturing the same, and a display having the same. The substrate is configured to have a gate bus line, an OC layer formed on the gate bus line, a pixel electrode formed on the OC layer at each pixel region, and a gate terminal for electrically connecting an external circuit and the gate bus line.

Abstract: A semiconductor device having a substrate having an insulating surface; at least first and second semiconductor islands formed over the substrate where each of the semiconductor islands has a channel region and a pair of impurity regions; an insulating film formed over the substrate, the insulating film including at least first and second gate insulating films formed over the first and second semiconductor islands, respectively; at least first and second gate electrodes formed over the first and second semiconductor islands with the first and second gate insulating films interposed therebetween; a wiring formed on the insulating film for electrically connecting one of the impurity regions of the first semiconductor island with the second gate electrode where said wiring is connected to the one of the impurity regions through a hold opened in the insulating film; an interlayer insulating film formed over the first and second semiconductor islands, the first and second gate electrodes and the wiring; and a pixe

Abstract: The object of the present invention is to form a low-concentration impurity region with good accuracy in a top gate type TFT. Phosphorus is added to a semiconductor layer by using a pattern made of a conductive film as a mask to form an N-type impurity region in a self-alignment manner. A positive photoresist is applied to a substrate so as to cover the pattern and then is exposed to light applied to the back of the substrate and then is developed, whereby a photoresist 110 is formed. The pattern is etched by using the photoresist pattern as an etching mask to form a gate electrode. A channel forming region, a source region, a drain region, and low-concentration impurity regions, are formed in the semiconductor layer in a self-alignment manner by using the gate electrode as a doping mask.

Abstract: A thermal interface material (40) includes a macromolecular material (32), and a plurality of carbon nanotubes (22) embedded in the macromolecular material uniformly. The thermal interface material includes a first surface (42) and an opposite second surface (44). Each carbon nanotube is open at both ends thereof, and extends from the first surface to the second surface of the thermal interface material. A method for manufacturing the thermal interface material includes the steps of: (a) forming an array of carbon nanotubes on a substrate; (b) submerging the carbon nanotubes in a liquid macromolecular material; (c) solidifying the liquid macromolecular material; and (d) cutting the solidified liquid macromolecular material to obtain the thermal interface material with the carbon nanotubes secured therein.

Abstract: An electronic device having a semiconductor circuit formed therein includes a semiconductor device in which the semiconductor circuit is formed; and a light emitting device, formed integrally with the semiconductor device, for emitting light indicating a reference position of the semiconductor device.

Abstract: A light-emitting unit containing a substrate and light emitting diodes (LEDs) is housed inside a casing constituted by a first member and a second member which are joined together. The second member has a projecting piece which is inserted to the first member, and inside the projecting piece a passage is formed. When silicone is injected through an injection opening from an injector, the silicone starting from the projecting piece flows through in the order of the passage, first-member side space, connecting passage and second-member side space and it finally overflows from a discharge opening. By implementing this structure and process, the air or air bubbles inside the light-emitting unit is pushed outside completely.

Abstract: A device emits radiation at a predetermined wavelength. The device includes a light-emitting structure which generates the radiation. The device further includes at least one reflective edge in radiative communication with the light-emitting structure, the reflective edge having a dielectric portion. The device further includes at least one electrical contact extending through the dielectric portion of the reflective edge, the contact in electrical communication with the light-emitting structure.

Abstract: A light-emitting device and illumination apparatus using the same are provided. The light-emitting device includes a semiconductor light-emitting element that emits blue-violet or blue light and a fluorescent material that absorbs the light emitted by the semiconductor light-emitting element and emits fluorescence of wavelengths different from the light, wherein the fluorescent material includes a mixture of a first fluorescent material, a second fluorescent material that has a longer emission wavelength than that of the first fluorescent material, and a third fluorescent material that has a longer emission wavelength than the second fluorescent material, and the first fluorescent material is a europium-activated ?-SiAlON fluorescent material, the second fluorescent material is a europium-activated ?-SiAlON fluorescent material, and the third fluorescent material is a nitride crystalline red fluorescent material of a general formula of (Ca,Eu)AlSiN3.

Abstract: A light emitting diode has a base made of heat conductive material, a wire plate made of an insulation material and secured to an upper surface of the base. Conductive patterns are secured to the wire plate, and a light emitting diode element is secured to the base at an exposed mounting area. The light emitting diode element is electrically connected to the conductive patterns.

Abstract: A semiconductor optical radiation package includes a leadframe, at least one semiconductor optical radiation emitter, and an encapsulant. The leadframe has a heat extraction member, which supports the semiconductor optical emitter and provides one or more thermal paths for removing heat generated within the emitter to the ambient environment, as well as at least two electrical leads for providing electrical coupling to the semiconductor optical radiation emitter. The encapsulant covers and protects the emitter and optional wire bonds from damage and allows radiation to be emitted from the emitter into the ambient environment. The semiconductor optical radiation package provides high emitted flux and is preferably compatible with automated processing techniques.

Abstract: A light source module for a light emitting diode (LED) is provided. In the present invention, a common printed circuit board (PCB) is utilized to provide electric current and isolated from the heat dissipation mechanism, and the thermal conductive element, protruding from the LED package structure, is connected to another thermal conductive element to dissipate out the internal heat.

Abstract: A foam-holding body 52 having a large difference in refractive index between foams 521 and the surrounding material is disposed on the major light extraction surface of the sapphire substrate 50. The foam-holding body 52 has translucency to light of a light-emitting wavelength and is formed of a material such as a silicone or the like, having a refractive index equal to or more than 1.77, and includes a foam-holding layer holding a plurality of foams made of an air or an inactive gas having a refractive index of about one. Therefore, when the light emitted in the light-emitting portion scatters in the foam-holding body 52, the spread of the scattered light becomes wide, which restricts repetition of the total reflection in the light-emitting device to improve an efficiency of the light extraction.

Abstract: The present invention relates to an III-nitride semiconductor light emitting device in which a single layer or plural layers made of SixCyNz(x?0, y?0, x+y>0, z>0) are inserted into or under an active layer and it is directed to a technology in which Al(x)Ga(y)In(1?x?y)N(0?x?1, 0?y?1, 0?x+y?1) of the hexagonal structure and SixCyNz(x?0, y?0, x+y>0, z>0) of the hexagonal structure are combined together in view of the properties of the SixCyNz(x?0, y?0, x+y>0, z>0) material.

Abstract: A semiconductor nanocrystal includes a core including a first semiconductor material and an overcoating including a second semiconductor material. A monodisperse population of the nanocrystals emits blue light over a narrow range of wavelengths with a high quantum efficiency.

Abstract: An integrated circuit for providing electrostatic discharge protection that includes a contact pad, a CMOS device including a transistor having a substrate, and a CDM clamp for providing electrostatic discharge protection coupled between the contact pad and the CMOS device, the CDM clamp including at least one active device, wherein the CDM clamp conducts electrostatic charges accumulated in the substrate of the transistor to the contact pad and wherein the CMOS device is coupled between a high voltage line and a low voltage line.

Abstract: A HEMT device including a GaN channel structure including a very thin (Al,In,Ga)N subchannel layer that is disposed between a first GaN channel layer and a second GaN channel layer, to effect band bending induced from the piezoelectric and spontaneous charges associated with the (Al,In,Ga)N subchannel layer. This GaN channel/(Al,In,Ga)N subchannel arrangement effectively disperses the 2DEG throughout the channel of the device, thereby rendering the device more linear in character (relative to a corresponding device lacking the subchannel (Al,In,Ga)N sub-layer), without substantial loss of electron mobility.

Abstract: In one embodiment, a semiconductor device (500) includes a buffer layer (504) formed over a substrate (502). An AlxGa1?xAs layer (506) is formed over the buffer layer (504) and has a first doped region (508) formed therein. An InxGa1?xAs channel layer (512) is formed over the AlxGa1?xAs layer (506). An AlxGa1?xAs layer (518) is formed over the InxGa1?xAs channel layer (512), and the AlxGa1?xAs layer (518) has a second doped region formed therein. A GaAs layer (520) having a first recess is formed over the AlxGa1?xAs layer (518). A control electrode (526) is formed over the AlxGa1?xAs layer (518). A doped GaAs layer (524) is formed over the undoped GaAs layer (520) and on opposite sides of the control electrode (526) and provides first and second current electrodes. When used to amplify a digital modulation signal, the semiconductor device (500) maintains linear operation over a wide temperature range.

Abstract: A diode structure having high ESD stability is described. Other embodiments provide an integral power switching arrangement having an integrated low leakage diode.

Abstract: A semiconductor device, which may be changed to a mirror package after the assembly without having to reinstall bonding wires, comprises: a plurality of fixed external terminals which include a power supply external terminal and a ground potential external terminal and which are arranged symmetrically in fixed positions; a plurality of variable external terminals of different types which are arranged symmetrically; a plurality of reverse-polarity selection external terminals which are symmetrically arranged in fixed positions, and a signal switching circuit which switches the arrangement of the symmetrically arranged variable external terminal according to the setting of the selection terminal.

Abstract: A complementary metal oxide semiconductor field effect transistor (CMOS-FET) image sensor. An active photosensing pixel is formed on a substrate. At least one side of the pixel has a width equal to or less than approximately 3 ?m. At least one dielectric layer is disposed on the substrate covering the pixel. A color filter is disposed on the least one dielectric layer. A microlens array is disposed on the color filter of the pixel, and the sum of the thickness of all dielectric layers and the color filter divided by the pixel width is equal to or less than approximately 1.87.

Abstract: A semiconductor device, for example a MOSFET or IGBT, includes a region (30, 36, 50) in the drain drift region (14) juxtaposed with its channel-accommodating region (15) and spaced from the drain contact region (14a) by means of an intermediate portion of the drift region. The region comprises alternating stripes (31, 32) of the first and second conductivity types, which stripes extend alongside the channel-accommodating region (15). In a trench gated device the stripes are elongated in a direction perpendicular to the trench walls. In a planar gate device the stripes extend around the periphery of the channel-accommodating region (15) leaving the region near the gate in a direction perpendicular with respect to the gate electrotes. The dimensions and doping levels of the stripes (31, 32) are selected such that region (30, 36, 50) provides a voltage-sustaining space-charge zone when depleted.

Abstract: An active matrix panel comprises a semiconductor thin film to constitute the switching element which includes••a common source-drain region having a bend portion with a channel region on one end and the other end further followed by a second source region of the channel region sequentially formed to one end of the common source-drain region and a second drain region of the channel region sequentially formed to the other end of the common source-drain which is connected to one of the data lines; a gate insulating film arranged on a surface of the semiconductor thin film; and a gate electrode arranged in areas on the gate insulating film corresponding to the channel region upper part for the second source region and the second drain region which is connected to one of the scanning lines.

Abstract: A pixel image sensor has an isolation barrier and diffusion well connected to a biasing voltage to prevent substrate charge leakage caused by photoelectrons generated in the substrate beneath a photon sensing area of the pixel image sensor from drifting to a storage node. An opaque metallic silicide layer is deposited on and a metal shield is fabricated above the storage node and storage node control transistor switches to prevent light from impinging on the storage node and storage node control transistor switches and thus preventing generation of photoelectrons at the storage node and storage node control transistor switches. A guard ring surrounds the photo sensing area, the storage node, and the storage node control transistor switches and is in contact with the biasing voltage and reduces cross-talk from photoelectrons drifting from adjacent image sensors.