Abstract: A method for making a multi-layer electronic structure. A layer of dielectric material having a top surface and a bottom surface is provided. A layer of electrically conducting material is provided on one of the top surface and the bottom surface of the dielectric layer. At least one passage is formed through the dielectric layer to expose the layer of electrically conducting material. Electrically conducting material is deposited in at least one of the at least one passage through the dielectric layer. Portions of the layer of electrically conducting material are removed to define a pattern of circuitry. A stack is formed of plurality of structures including the layer of dielectric material and layer of electrically conducting material. The plurality of structures are aligned and joined together. Spaces between the structures are filled with electrically insulating material.

Abstract: A switch device includes a semiconductor chip, and at least two switches formed on the semiconductor chip. Ground parts of the at least two switches are arranged between said at least two switches.

Abstract: A connecting element for electrically connecting a semiconductor chip and a superordinate circuit board includes an elastic metal strip that is bent forming two metal limbs with flattened limb ends, thus forming a base between the metal limbs which is suitable for contacting and providing electrical connectivity to a plurality of contact pads of a superordinate circuit board. At least one of the two limb ends is electrically connected to the contact areas of a semiconductor chip, while the other limb end is elastically supported on the top side of the semiconductor chip, thereby enabling the connecting element to be self supporting.

Abstract: In a semiconductor package, a semiconductor chip is mounted on a wiring board or package board. A lid member defines a recess for accommodating the semiconductor chip, and is mounted on the package board so that the semiconductor chip is accommodated in the recess of the lid member. A first adhesive layer is formed on the package board so that a peripheral portion of the lid member is adhered on the package board with the first adhesive layer. A second adhesive layer is formed on the semiconductor chip so that a central portion of the lid member is adhered to the semiconductor chip with the second adhesive layer. The following relationship is established: 25 ?m?h?d?300 ?m where: “d” is a depth of the recess of the lid member; and “h” is a sum of a thickness of the semiconductor chip and a thickness of the second adhesive layer.

Abstract: Consistent with an example embodiment, an electronic device comprises an integrated circuit and a carrier substrate with a bottom and top conductive layer, and is provided with voltage supply, ground and signal transmission connections. In order to enable the use of more than one supply voltage, the integrated circuit is subdivided into core functionality and peripheral functionality, and the carrier substrate is subdivided into a corresponding core area and peripheral area. The ground connections of both core and periphery are mutually coupled through an interconnect in the carrier substrate. This interconnect is particularly a ground plane, and allows the provision of a transmission line character to the interconnects for signal transmission of the periphery.

Abstract: An apparatus includes a circuit having first, second and third circuit portions, the first and third circuit portions each including at least one semiconductor circuit component. The second circuit portion includes at least one non-semiconductor circuit component, and is free of semiconductor circuit components. A first substrate has the first and second circuit portions disposed adjacent one side thereof. A second substrate is physically separate from the first substrate, and has the third circuit portion disposed adjacent a side thereof which faces the one side of the first substrate. The second and third circuit portions have electrically conductive parts which are coupled by thermo-formed bonds.

Abstract: A wirebond electronic package which includes a semiconductor chip bonded to the upper surface of an organic laminate substrate, including to a thermal material located on the substrate and comprised of a plurality of thermally conductive concentric lines. These lines form paths of heat escape for the chip during operation thereof and may operate in combination with other elements to extend the heat paths. Concentric lines also assure sufficient bonding area on the substrate so as to prevent delamination of the chip from the substrate as may occur during high temperatures associated with subsequent processing such as solder ball re-flow. A method of making the package is also provided, as is an information handling system (e.g., computer) adapted for utilizing such packages.

Abstract: A chip structure comprising a chip, a redistribution layer, a second passivation layer and at least a bump is provided. The chip has a first passivation layer and at least a bonding pad. The first passivation layer exposes the bonding pad and has at least a recess. The redistribution layer is formed over the first passivation layer and electrically connected to the bonding pad. Furthermore, the redistribution layer also extends from the bonding pad to the recess. The second passivation layer is formed over the first passivation layer and the redistribution layer. The second passivation layer also has an opening that exposes the redistribution layer above the recess. The bump passes through the opening and connects electrically with the redistribution layer above the recess.

Abstract: A semiconductor device comprises a semiconductor chip which has a first surface, a pad which is formed directly on the first surface, an oxide film which is formed on the first surface, an insulating film which is formed on the oxide film and a part of the pad, a conductive film which is formed on the insulating film and the pad, a sealing material which covers a part of the conductive film and the insulating film and a bump which is formed over the conductive film, wherein the bump is exposed from a surface of the sealing material.

Abstract: Integrated circuits include networks of electrical components that are typically wired, or interconnected, together with aluminum wires. In recent years, researchers have begun using copper in combination with diffusion barriers, rather than aluminum, to form the wires. Unfortunately, typical diffusion barriers add appreciable resistance to the wiring and require costly fabrication methods. Accordingly, the inventors devised one or more exemplary methods for making integrated-circuit wiring from materials, such as copper-, silver-, and gold-based metals. One exemplary method removes two or more masks in a single removal procedure, forms a low-resistance diffusion barrier on two or more wiring levels in a single formation procedure, and fills insulative material around and between two or more wiring levels in a single fill procedure. This and other embodiments hold the promise of simplifying fabrication of integrated-circuit wiring.

Abstract: A precision RF passive component including: a silicon substrate; a first dielectric layer deposited above the silicon substrate; a first metal layer formed above the first dielectric layer; a second dielectric layer formed above the first metal layer; and a second metal layer formed above the second dielectric layer. In one embodiment a passivation layer is added above the second metal layer. In an exemplary embodiment the first metal layer includes a first adhesion layer, a metal sub-layer, and a second adhesion layer; and the second dielectric layer includes a first diffusion barrier layer, a dielectric sub-layer second diffusion barrier. In an exemplary embodiment, the metal sub-layer includes copper. In another exemplary embodiment the dielectric sub-layer includes SiO2 or Si3N4 between diffusion barrier layers including SiN.

Abstract: A process of making a reworkable thermal interface material is described. The reworkable thermal interface material is bonded to a die and a heat sink. The reworkable thermal interface material includes a phase-change polymer matrix material. Other materials in the reworkable thermal interface material can include heat transfer particles and low melting-point metal particles. The phase-change polymer matrix material includes a melting temperature below a selected temperature and the heat transfer particles have a melting temperature substantially above the selected temperature. The heat transfer particles act as a spacer limit, which holds the thermal interface material to a given bond-line thickness during use.

Abstract: A semiconductor substrate has a first copper layer, on which an etch stop layer and a dielectric layer are successively formed. A second copper layer penetrates the dielectric layer and the etch stop layer to electrically connect to the first metal layer. The etch stop layer has a dielectric constant smaller than 3.5, and the dielectric layer has a dielectric constant smaller than 3.0.

Abstract: The semiconductor device comprises a semiconductor substrate 10, a conducting film 20 formed on the semiconductor substrate 10 and including two conductor patterns adjacent to each other; an etching stopper film covering the upper surface of the conducting film 20; an insulation film 28 which includes a contact hole which reaches the semiconductor substrate 10 between the two conductor patterns and the an end of which is positioned on the etching stopper film 22 on the two conductor patterns; and a sidewall insulation film 32 formed on the side walls of the conducting film 20 and of the etching stopper film 22 in the contact hole. The fluctuation of a contact hole size due to disalignment of the lithography can be restrained, and in the lithography step of opening the contact hole, the photoresist can have a large openings size, which facilitate the lithography step.

Abstract: A semiconductor packaging substrate and a process for producing the same is disclosed. An internal circuit is formed by lamination. Then, external circuit is formed on the internal circuit by build-up technology. The substrate can be used as a flip-chip ball grid array packaging substrate with high density and small pitch. Furthermore, the substrate of the invention has a plurality of bonding pads thereon. The bump pads are divided into power/ground bump pads, first signal bump pads, and second signal bump pads. The first signal bump pads surround the power/ground bump pads and are surrounded by the second signal bump pads.

Abstract: A semiconductor chip production method including the steps of: forming a front side recess in a semiconductor substrate; depositing a metal material in the front side recess to form a front side electrode electrically connected to a functional device formed on the front surface; removing a rear surface portion of the semiconductor substrate to reduce the thickness of the semiconductor substrate to a thickness greater than the depth of the front side recess; forming a rear side recess communicating with the front side recess in the rear surface of the semiconductor substrate after the thickness reducing step; and depositing a metal material in the rear side recess to form a rear side electrode electrically connected to the front side electrode for formation of a through-electrode.

Abstract: A design methodology reduces electromigration in integrated circuit joints such as flip-chip bumps by seeking to produce a more uniform current distribution at the interface between the integrated circuit pad and the joint while maintaining an interface form that coincides with standard integrated circuit designs is presented. The design methodology addresses the current distribution at the pad by introducing an intermediate trace routing design between the current delivering trace and the pad that distributes the inflow of current from the trace to multiple points of entry on the pad. The intermediate trace routing design includes an outer trace channel connected to the current delivering trace. A plurality of conductive trace leads connect the outer trace channel to the pad. Preferably, each of the plurality of conductive trace leads is characterized by a respective trace impedance so as to distribute equal current flow through each of the leads to the pad.

Abstract: The present invention relates to a multi-chip package structure, comprising a first substrate, a first chip, a sub-package and a first molding compound. The first chip is attached to the first substrate. The first molding compound encapsulates the first chip, the sub-package and the top surface of the first substrate. The bottom surface of the sub-package is attached to the first chip. The sub-package comprises a second substrate, a second chip and a second molding compound. The second substrate has a top surface and a bottom surface, and is electrically connected to the first chip. The second chip is attached to the top surface of the second substrate to which the second chip is electrically connected. The second molding compound encapsulates the second chip and part of the top surface of the second substrate. Whereby, the relative large area caused by the parallel arrangement of a plurality of conventional package structures can be reduced, and there is no need to redesign signal-transmitting path.

Abstract: A plurality of interconnect layers are produced on a top side of one or two semiconductor chips, and are mutually isolated from one another in each case by insulation layers that are patterned in such a way that an interconnect layer applied as bridge makes contact with the interconnects applied previously.

Abstract: The invention provides a bonding pad structure. At least one lower circuit layer is disposed overlying the substrate, wherein the lower circuit layer is a layout of circuit under pad. A top circuit layer is disposed overlying the lower circuit layer, wherein the top circuit layer comprises a top interconnect dielectric layer and a top interconnect pattern in the top interconnect dielectric layer. A top connecting layer is disposed overlying the top circuit layer, electrically connecting the top interconnect pattern. A top pad layer is disposed overlying the top connecting layer. A bonding ball is disposed overlying the top pad layer, wherein sides of the top interconnect pattern do not overlap a region extending inwardly and outwardly from a boundary of the bonding ball within distance of about 2.5?m.

Abstract: To refine an electrical or electronic component having at least one discrete or integrated device formed from a wafer, in plate or disk form, of semiconductive or insulating material, the front face of which device has at least one protruding electrode and is encapsulated by at least one front-face encapsulant, the side faces of which device are at least partly encapsulated by at least one side-face encapsulant, and the rear face of which device is encapsulated by at least one rear-face encapsulant, and to refine a method of producing the same, in such a way that, with the aim of widening the possible uses and applications, electrical contact is made not solely with the front face of the device that is to be housed in the plastics package of very small dimensions, it is proposed that both the side-face encapsulant and the rear-face encapsulant be formed at least partly of layers, but with the layers connected, of electrically conductive material.

Abstract: A divided shadow mask for use in fabricating an organic light emitting diode display including a first shadow mask section having a plurality of openings; and at least a second shadow mask section having a plurality of openings.

Abstract: The exemplary embodiment of the present invention provides a device for converting human power to electrical power. The exemplary device comprises: a plurality of gear wheels (e.g., 1, 2, 3, 4, 5 and 6) interconnected with a plurality of interconnection means (e.g., 12, 13, and 14); a first axle (9), said first axle (9) disposed through an opening in a center of a first gear wheel (1) of the plurality of gear wheels; a first pedal (18) mounted on a first pedal arm (17) and a second pedal (18) mounted on a second pedal arm (17), each pedal arm (17) mounted on opposing ends of the first axle (9); a second gear wheel (2) of the plurality of gear wheels interconnected to the first gear wheel (1) with a first interconnection means (12) of the plurality of interconnection means; an alternator (8) interconnected to one of the gear wheels (e.g., 6) of the plurality of gear wheels; a battery (22); and an inverter (27).

Abstract: A starting system and method for a gas turbine engine applies a change in conventional starter generator torque profiles near the conclusion of the start cycle after the engine self sustaining speed and just prior to starter generator cut-out. By decreasing the applied torque to zero prior to transition from a start mode to a generator mode, both the mechanical and electrical transients are greatly decreased.

Abstract: A water supply apparatus includes an apparatus body disposed in a flow passage for sucking water to an indoor facility and a power generation unit installed in the apparatus body. Further, the power generation unit further comprises a rotating shaft extended in a direction perpendicular to the water channel direction of the flow passage, and impeller installed on the rotating shaft and rotated by a water flow, a magnet rotated interlockingly with the impeller, and a coil arranged oppositely to the magnet, wherein the impeller forms blades in the radial outer direction and forms clearances allowing water to pass to the inside of the blades. Since the clearances are formed between the blades and the rotating shaft such a trouble that water flowing into the base ends of the blades obstructs the rotation of the impeller can be eliminated to increase a power generation amount by the power generation unit.

Abstract: A protection system and a protection method are provided for protecting a double fed induction generator and a gearbox during a grid fault. The protection system includes a plurality of controlled impedance devices. Each of the controlled impedance devices is coupled between a respective phase of a stator winding of the double fed induction generator and a respective phase of a grid side converter. The protection system also includes a controller configured for coupling and decoupling impedance in one or more of the plurality of controlled impedance devices in response to changes in at least one of a utility grid voltage and a utility grid current.

Abstract: A method and a system of supplying electric power from shore to a ship with generators 60, 61, the ship being berthed in port include: a first step of synchronizing the electric power 11 from shore with electric power from the generators 60, 61, a second step of carrying out temporary parallel operation of the electric power 11 from shore and the electric power from the generators 60, 61 after the synchronization, and a third step of shutting off the electric power from the generators 60, 61 to supply the electric power 11 from shore to the ship after the temporary parallel operation. According to the method and system, electric power supply interruption can be prevented when a shore power source is changed over to an onboard power source, and vice versa. Also, onboard control devices can be smoothly operated even on the way of changing over the power sources.

Abstract: A circuit arrangement for sequential classification of a plurality of controllable components, to each of which a calibration resistor (11) is assigned for which the resistance value classifies the component in relation to at least one characteristics, comprises switching means through which each calibration resistor (11) can be connected individually into a calibration network which is suitable for creation of an electrical calibration voltage (14) dependent on the value of the calibration resistor (11). The calibration network comprises a constant current source (13) and a reference resistor (12) connected in parallel to this via which the output voltage (14) can be tapped off and can be connected in parallel in each case via the switching means to a calibration resistance (11).

Abstract: The invention relates to a method for statically balancing the loading of power semiconductor switches (S1, S2, S3) in a parallel circuit (1). To achieve this in prior art, switching instants of individual switches (S1, S2, S3) are adapted in the case of GTOs and current amplitudes of individual switches are adapted in the case of IGBTs. According to the invention, a primary pattern (4) of frame-switching pulses is predetermined for a total current (i) through the parallel circuit (1) and a secondary pattern (51, 52, 53) comprising more or fewer pulses than the primary pattern (4) is generated for at least one switch (S1, S2, S3). In contrast in conventional methods, the asynchronicity of the pulses enables a rapid redistribution of the loading between the parallel switches (S1, S2, S3), thus reducing or obviating the need for inductive suppressor circuits for limiting the current.

Abstract: The present invention provides a power tool with a hand proximity detector to detect the hand of an operator and a trigger circuit operable with the detector to control the operation of a light in the housing or to provide a safety lockout function.

Abstract: A novel a circuit for driving a fan includes an output terminal for supplying the fan with drive power, a pulse width modulation driver, and a limiter. A first power terminal of the fan is held at a first voltage (e.g., 0V), and a second power terminal of the fan is coupled to the output terminal of the driver circuit. The PWM driver provides a series of fan drive pulses on the output terminal, and the limiter prevents the voltage on the output terminal from falling below a predetermined voltage. The predetermined voltage is greater than the first voltage at which the fan's first power terminal is held, and is sufficient to keep the fan in motion even when the duty cycle of the PWM signal is 0%. In a particular embodiment the limiter includes a voltage clamp. In a more particular embodiment, the voltage clamp is a diode. In another particular embodiment, the limiter includes a switch for combining a PWM signal with a DC voltage at an output.

Abstract: A compact-sized, high-efficient, and high-speed electric blower has high centrifugal resistance. The electric blower includes a rotor that has a multi-slot rotor winding along which an excitation electric current is supplied through a slip ring by a power supply brush, a stator that detects the position of a magnetic pole of the rotor, and has a stator winding in a pole-focused winding pattern, a centrifugal fan attached to a rotational axis of the rotor, and a casing housing the stator and having a path for wind. In response to the rotor pole position detection signal, a semiconductor switch regulates and controls the electric current through the rotor winding or the stator winding. Semiconductor switches control the electric current through the rotor winding or stator winding in accordance with the detection signal regarding the position of rotor magnetic pole.

Abstract: A spindle motor, especially for an optical disc drive, includes a bearing system, a shaft and a magnetic apparatus. The bearing system thereon a radial orientation is defined. The shaft is rotatably inserted into the bearing system and rotates relative to the bearing system during operation of the spindle motor. The magnetic apparatus functions by applying a magnetic force on the shaft, toward the radial orientation of the bearing system, to inhibit a Half-omega whirl (HOW) of the shaft induced during rotation of the shaft relative to the bearing system.

Abstract: Disclosed within is a fist bracket comprising a base and a circumferential portion extending from the base in which the circumferential portion comprises an outer surface and an inner surface and the outer surface comprises a curved section and a planar section. Also disclosed within is a combination of a motor mount bracket and fist bracket comprising a fist bracket with a base and a circumferential portion extending from the base. The circumferential portion includes an outer surface and an inner surface and the outer surface comprises a curved section and a planar section. The combination further includes a bushing disposed within the circumferential portion of the fist bracket.

Abstract: An electric motor driven by three-phase electric power includes armature windings that are connected in series, via an armature-winding connecting line, for each of a plurality of groups of three or N circumferentially-adjoining poles to thereby provide three-phase armature windings, wherein N is an arbitrary number equal to a multiple of three. The armature-winding connecting line connects in series the adjoining armature windings in such a way as to not substantially straddle a relatively great part of the outer periphery of any of the adjoining armature windings.

Abstract: The present invention discloses a stator of a motor including a circular stator core formed by stacking a plurality of sheets, a plurality of bobbins fixed to the inner circumferential surface of the stator core at predetermined intervals and rotatably connected to each other, and stator coils wound around the outer circumferential surfaces of the bobbins to be connected to each other, and a method for manufacturing the same. The stator of the motor can reduce an assembly time by omitting a process for wiring the stator coils, and also reduce a number of components and manufacturing expenses by omitting a wiring PCB.

Abstract: The invention provides a method and apparatus for controlling a machine in which the magnetic flux emanating from a rotor is selectively diverted to a second path in the stator which bypasses the winding or windings so as to magnetically de-couple the winding or windings from the rotor.

Abstract: In accordance with one embodiment of the present invention, a Gap Diode is disclosed in which a tubular actuating element serves as both a housing for a pair of electrodes and as a means for controlling the separation between the electrode pair. In a preferred embodiment, the tubular actuating element is a quartz piezo-electric tube. In accordance with another embodiment of the present invention, a Gap Diode is disclosed which is fabricated by micromachining techniques in which the separation of the electrodes is controlled by piezo-electric, electrostrictive or magnetostrictive actuators. Preferred embodiments of Gap Diodes include Cool Chips, Power Chips, and photoelectric converters.

Abstract: Multiple drives are coupled together to cause rotation about a single axis by an arrangement in which two moveable electrode plates flank a fixed electrode plate such that the opposite direction rotations of the two moveable electrode plates are combined. To this end, at least one arm from at least one of the moveable electrode plates is connected to at least one arm of a moveable electrode plate on the opposite side of the fixed electrode plate, e.g., by a spring. The electrode plates may have comb projections. A post may be coupled at one of its ends to the top of one of the moveable electrode plates, and the post's other end is coupled to a plate, e.g., a mirror or other structure to be moved.

Abstract: An apparatus to produce acoustic cavitation by controlling cavitation events in a liquid insonification medium utilizing a waveform to excite a transducer with a series of bipolar inharmonic tone bursts having medium recovery intervals between respective bursts so that the medium repeatedly recovers from cavitation events between bursts. The apparatus may be used to clean a semiconductor wafer, to de-coat a painted surface having, to induce a chemical reaction, and/or to provide recycled paper made from inked paper de-inked by cavitation. Cavitation events are generated using a transducer and a waveform generator, e.g., square wave tone bursts, to excite the transducer with a signal controlled in frequency, burst repetition rate, duty-cycle and/or amplitude, e.g., utilizing bursts having a frequency between 500 KHz and 10 MHz, and a duty cycle between 0.1% and 70%.

Abstract: A rectangular vibrating plate 10 in which a piezoelectric element and a reinforcing plate are stacked is supported on a main plate by a support member 11, and is urged toward the rotor 100 by an elastic force of the support member 11. This brings a projection 36 provided on the vibrating plate 10 into abutment with an outer peripheral surface of the rotor 100. In this construction, when the vibrating plate 10 vibrates in the horizontal direction in the figure by an applied voltage from a driving circuit (not shown), the rotor 100 is rotated in a clockwise direction in accordance with the displacement of the projection 36 due to the vibration.

Abstract: Provided is an electronic component permitting lead wires or the like to be securely soldered to a plurality of respective terminal electrodes connected to electroconductive members in through holes. On a surface 7a of a stack-type piezoelectric device being an electronic component, a lead wire is soldered to a second electrode layer 23 on one end side in the longitudinal direction of one terminal electrode 17 out of two adjacent terminal electrodes, and a lead wire is soldered to a second electrode layer 23 on the other end side in the longitudinal direction of the other terminal electrode 17. Since the one end side of one terminal electrode 17 and the other end side of the other terminal electrode 17 are located on the side opposite to the side where each terminal electrode is connected to an electroconductive member 14 in a through hole 13, it is feasible to prevent the electroconductive member 14 in the through hole 13 from dissolving into a molten solder 25.

Abstract: The invention concerns a piezoelectric resonator (10), intended to be packaged in a case, including a base (12) formed of a first fixing zone (121), a second central mechanical uncoupling zone (122) and a third zone (123) opposite to the first fixing zone. At least two vibrating arms (13a, 13b) extend from said third zone, on each of which at least one groove (141a-144a, 141b-144b) is formed on at least one of the top or bottom faces of the arms. The resonator is characterised in that the base is provided with a hole (15) through the second central mechanical uncoupling zone.

Abstract: A bulb in an electrodeless lamp system comprises a bulb unit having an envelope space in which luminous material excited by an electric field to form plasma and generate light is filled and two or more conductors installed in the envelope space so that ends of the conductors face each other.

Abstract: A lamp for a light string has a mechanical shunt to allow current to pass to the next light in the event of a missing bulb. A resilient shunt is held in a generally lateral orientation by a shunt holder within the socket. When the hollow base with its bottom opening is inserted into the socket, the walls of the base cam the ends of the shunt away from the electrical contacts on the walls of the socket. Likewise, when the base is removed, the resilient lateral ends of the shunt return to engage the electrical contacts. The timing of the contact by the shunt with the electrical contacts avoids arcing. Additionally, slits formed in the wall of the base allows the Dumet wires to exit the sides of the base in the correct location for engaging the electrical contacts, thus reducing the instances of misaligned Dumet wires.

Abstract: A light source for testing sites using a fluorescent dye is described. The light source can include a low voltage lamp or a low heat generating lamp.

Abstract: A plasma display panel for improving brightness and as reducing power consumption is disclosed. In the plasma display panel, transparent electrodes make a pair at each of discharge cells. Protruded transparent electrodes are protruded from the respective transparent electrodes with a structure in which a square shape is connected to a trapezoidal shape. Connectors connects the protruded transparent electrodes arranged at adjacent discharge cells to each other to be stepped from one end of the protruded transparent electrode positioned at the middle portion of the discharge cell.

Abstract: A plasma display panel is able to contrast thereof by increasing a color temperature of the plasma display panel, which comprises a dielectric layer controlling a light transmittance for visible light of a certain wavelength emitted from a phosphor in the plasma display panel.

Abstract: An AC plasma display panel has a pair of panels disposed in spaced opposed relation, and each having a plurality of electrodes formed on an opposed surface thereof and mostly covered with a dielectric layer; and a sealing member which seals the periphery of the pair of panels. The electrodes each have a portion uncovered with the dielectric layer, and the sealing member is disposed in contact with the uncovered portions of the electrodes. With this arrangement, the discharge space can be kept gas-tightly sealed by the sealing member without communication with the outside of the display panel which may otherwise occur due to the presence of voids on opposite sides and surfaces of the electrodes.

Abstract: Disclosed is a plasma display panel including a first substrate and a second substrate provided with a predetermined gap therebetween, and disposed substantially parallel to each other; a plurality of address electrodes formed on the first substrate; a first dielectric layer formed on a front surface of the first substrate, covering the address electrodes; a plurality of barrier ribs mounted on the first dielectric layer with a predetermined height to provide a discharge space; a phosphor layer formed within the discharge space; a plurality of discharge sustain electrodes provided on a front surface of the second substrate facing the first substrate, and disposed generally perpendicular to the address electrodes; a second dielectric layer formed on the front surface of the second substrate, covering the discharge sustain electrodes; and a passivation layer coated on the second dielectric layer, comprising MgO and dopant elements Si and Fe.