Abstract: A redundancy circuit in a semiconductor memory device comprises a fuse set controller configured to output a redundancy enable signal enabled according to applied address signals; a redundant selector; a spare redundant selector; and a spare fuse controller configured to be controlled by the redundancy enable signal, and to output a selection control signal that selects at least one of the redundant selector and the spare redundant selector in accordance with an internal fuse option.

Abstract: A semiconductor integrated circuit memory device, and test method for a memory device are provided in which an external wordline voltage is applied to a wordline of the memory device. A current on the wordline is measured as a result of application of the externally supplied wordline voltage. The measured current is compared to a reference value to determine whether the wordline has a defect, in particular a short-circuit defect. A tester device is connected to the memory device and supplies the external wordline voltage. The current measurement and comparison may be made internally by circuitry on the memory device or externally by circuitry in a tester device.

Abstract: A method of controlling a discharge of bit lines of a matrix of memory cells comprises conditioning a value of a current flowing through a bit line of the matrix during a bit line discharge phase to an absence of an indication of defectiveness of the bit line. The method allows preventing crowbar currents that otherwise flow during the bit line discharge phase when a defective bit line exhibits a short-circuit to a defective word line.

Abstract: A fast pre-charge circuit and method of providing a fast pre-charge for an integrated circuit memory device is disclosed. The fast pre-charge circuit comprises an address calculating unit and a multi-power driver. The address calculating unit detects the sector distance from driver of the integrated circuit memory device, and the driver provides a voltage to the loading of the integrated circuit memory device based on an output of the address calculating unit. Unlike a conventional fixed-power wordline driver, the driver of the present invention provides multiple voltage levels to the wordline or dynamically adjusts for different loading situations.

Abstract: In a memory circuit, memory cells are arranged in a matrix by “row line-and column line” (may also denoted as “word line and bit line”). The invention provides a memory circuit and related method capable for independently pre-charging the column lines or bit lines selectively during data accessing according to results of column pre-decoding to decrease the pre-charging power consumption. After pre-charging, the objective memory cell is enabled to change or not to change the corresponding electric level of the connected column line according to the stored data, and a sense amplifier detects the stored data by measuring the electric level of the column line.

Abstract: A sense amplifier circuit for sensing a logic state of a selected memory cell in a memory circuit includes a precharge circuit and a latch circuit. The precharge circuit is adapted for connection to a pair of complementary bit lines corresponding to the selected memory cell and is operative to selectively drive the pair of complementary bit lines to a first voltage in response to a first control signal. The latch circuit is adapted for connection to the pair of complementary bit lines. The sense amplifier circuit further includes a replication circuit adapted for connection to the pair of complementary bit lines. The replication circuit is operative to selectively transfer a voltage representative of a logic state on a first bit line of the pair of complementary bit lines to a second bit line of the pair of complementary bit lines in response to at least a second control signal.

Abstract: A memory device includes isolation devices located between-memory cells. A plurality of isolation lines connects the isolation devices to a positive voltage during normal operations but still keeps the isolation devices in the off state to provide isolation between the memory cells. A current control circuit is placed between the isolation lines and a power node for reducing a current flowing between the isolation lines and the power node in case a deflect occurs at any one of isolation devices.

Abstract: There is provided a fuse module that holds trimming information for an internal oscillation circuit module. The fuse module includes information-writing fuse circuits to which trimming information is written depending on whether an information-writing fuse is blown; a reference fuse circuit for determining whether the information-writing fuse has been blown; and a current-to-voltage converter section. Since the reference fuse circuit and the current-to-voltage converter section are shared by the information-writing fuse circuits, the circuit area of the fuse module is greatly reduced.

Abstract: An address decoder. The address decoder includes a plurality of decoder circuits. Each decoder circuit includes a first stage including a first logic circuit having n?1 inputs, the n?1 inputs being a subset of n inputs conveyed to each decoder circuit. Each decoder circuit further includes a second stage having a second and third logic circuits. Both the second and third logic circuits receive an output provided by the first logic circuit. The second logic circuit also receives the other one of the n bits, while the third logic circuit receives its complement. The second and third logic circuits provide second and third outputs, respectively. The address decoder is configured to assert one of a plurality of address selection outputs by asserting one of the second or third outputs of one of the decoder circuits, while de-asserting both the second or third outputs of the other decoder circuits.

Abstract: A bitline selection network is composed of a plurality of bitlines and a plurality of global bitlines. The bitlines are grouped into bytes with eight bitlines per byte. The bitlines provide access to memory cells for read and write operations. A bitline is connected to a global bitline through a bitline select transistor. Each of the bitline select transistors is activated one at a time by a bitline select controller. Activation of each bitline select transistor provides a connection to a source line, which in turn connects to a sense amplifier and a write data loading logic block. The sense amplifier and the write data loading logic block are used in read and write operations respectively.

Abstract: A page buffer circuit of a flash memory device includes page buffers which are connected to the plurality of bit line pairs, respectively, and execute a read operation or a program operation on memory cells in response to bit line control signals, bit line select signals and control signals, and bit line precharge circuits, which are connected to the plurality of bit line pairs, respectively, and in the read operation, precharge one of a pair of bit lines connected thereto to a reference voltage level in response to bit line precharge signals. The reference voltage can be a stable voltage regardless of variation in temperature and/or voltage. A bit line precharge circuit supplies a stable precharge voltage to bit line regardless of variation in temperature and/or voltage in a read operation. Therefore, erroneous data can be prevented from being read.

Abstract: An acoustic countermeasure system comprises a plurality of individual countermeasure devices which act in concert to emulate a target with spatial extent. The individual countermeasure devices may be programmed to navigate into predetermined positions within a preset pattern with spatial characteristics similar to that of a target of interest, e.g., a submarine. The individual countermeasure devices are programmed to produce acoustic signals, such as in response to a ping or pulse by an incoming torpedo that collectively appears to be an echo similar to that which would come from a target having spatial extent.

Abstract: A method of seismic surveying comprises emitting seismic energy at two or more different depths during a sweep. In one embodiment, the depth of a seismic source is varied during a sweep, by raising or lower the source while it is emitting seismic energy. In another embodiment, an array of two or more marine vibrators is used as the source of seismic energy, with the vibrators in the array being disposed at different depths. The invention allows notch frequencies in the amplitude spectrum to be eliminated, and allows improvements in both the spectral flatness and the amplitude at low frequencies.

Abstract: A telemetry system having: a pipe; a SCADA box acoustically coupled to the pipe; and a gauge inserted in the pipe, the gauge comprising: an acoustic wave generator; a coupler mechanically connected to the acoustic wave generator, wherein the coupler is engageable and disengageable with the pipe, wherein the coupler defines an acoustic transmission path between the acoustic wave generator and the pipe when engaged with the pipe; and a signal controller in communication with the acoustic wave generator. A method for communicating information in a wellbore from a downhole location to the surface, the method having the following steps: running a downhole gauge into a pipe within the wellbore, wherein the downhole gauge comprise an acoustic wave generator; setting the downhole gauge in the pipe; and communicating an acoustic signal between the downhole gauge and the pipe.

Abstract: An integrated switch matrix for reconfiguring subelements of a mosaic sensor array to form elements. The configuration of the switch matrix is fully programmable. The switch matrix includes access switches that connect subelements to bus lines and matrix switches that connect subelements to subelements. Each subelement has a unit switch cell comprising at least one access switch, at least one matrix switch, a respective memory element for storing the future state of each switch, and a respective control circuit for each switch. The access and matrix switches are of a type having the ability to memorize control data representing the current switch state of the switch, which control data includes a data bit input to turn-on/off circuits incorporated in the control circuit. The sensor array and the switching matrix may be built in different strata of a co-integrated structure or they may be built on separate wafers that are electrically connected.

Abstract: A tracking control apparatus comprises an signal processing section, a lens characteristic measuring section and an optimum lens position searching section. The lens characteristic measuring section acquires a first address and second address of an optical disk. The lens characteristic measuring section successively generates offset set values so that the position of a converging lens is moved by an actuator at predetermined spatial intervals and counts the number of times both the first address and the second address are acquired. The optimum lens position searching section searches for a maximum value of the acquisition count and moves the converging lens using the actuator based on the offset set value when the acquisition count reaches a maximum value.

Abstract: An optical disk apparatus having a high reliability by evading collision between a condensing lens and an optical disk regardless whether the focus control is in the operative state or in the inoperative state, thereby preventing damage to the condensing lens and the optical disk. When the focus control is in the inoperative state, by using a reflection light amount from the optical disk (1), it is ascertained that the focus of the light beam is in the vicinity of the information surface and the condensing lens (15) is driven to be apart from the optical disk (1).

Abstract: An optical recording/reproducing apparatus includes an optical pickup recognizing information of an optical disc; a main shaft and a sub-shaft oppositely installed on a base plate, for supporting the optical pickup; a fixing portion for movably supporting one end of the main shaft; a support portion installed on the base plate at a certain distance from the fixing portion, for elastically supporting the other end of the main shaft; a prop portion installed on the base plate, for supporting a bottom middle surface of the main shaft; and a skew adjustment screw rotatably installed at the base plate, for upwardly pushing an end of the main shaft supported by the support portion.

Abstract: A method and a related apparatus for diagnosing crosstalk within an optical pick-up unit by utilizing firmware. The method includes calculating a tracking driving signal and a focusing driving signal according to a tracking error signal and a focusing error signal respectively, adding a noise to the focusing driving signal to form a test focusing driving signal through executing firmware, driving an optical pick-up unit by the tracking driving signal and the test focusing driving signal, and diagnosing characteristics of the pick-up unit through observing the tracking error signal.

Abstract: In a tracking controller for an optical pickup, a photodetector having four light reception parts receives return light from an optical disc and outputs light detection electric signals. Predetermined addition and subtraction operations are performed on the light detection electric signals from the light reception parts. A phase comparator compares phases and outputs a pseudo radial contrast signal. Bringing into tracking servo control is performed based on the pseudo radial contrast signal.

Abstract: An information recording medium is provided that includes a data area for recording user data and a defect management area for recording a defect list for managing N number of defect areas existing in the data area, where N is an integer satisfying N?0. The defect list includes two or more blocks, and further includes a header located at a fixed position in the defect list and N number of defect entries, located subsequent to the header, including position information on the respective positions of the N number of defect areas. An anchor is located subsequent to the defect entries, and the header includes first update times information representing the number of times that the defect list has been updated. The anchor includes second update times information representing the number of times that the defect list has been updated.

Abstract: An offset adjusting circuit for an optical disc comprises an offset-adjustment differential operational amplifier having an input terminal to which an output signal of an optical pickup is input and the other input terminal to which a control voltage is applied, an A/D converter that outputs a digital signal based on an output signal of the offset-adjustment differential operational amplifier, and a control voltage adjuster that varies the control voltage applied to the offset-adjustment differential operational amplifier based on the digital signal so as to remove an offset.

Abstract: A demodulator includes a wobble signal processor configured to convert a waveform of a wobble signal, and to generate a clock and a reference value based on a converted wobble signal. A sampling circuit is configured to sample the converted wobble signal by using the clock, and to generate a sampled signal. A viterbi decoder is configured to decode an auxiliary recording signal superposed on an optical disk by using the reference value and the sampled signal.

Abstract: When encoded data is divided every predetermined length, a header is added, the data is packetized, a header is further added to thereby form pack data, and the data is recorded onto a recording medium which is divided into sectors and can be accessed on said sector unit basis, encode units are stuffed and recorded into each packet and a position of a complete encode unit existing at the head of the sector is indicated by a pointer. If the pointer is used, the position of the encode unit serving as a complete encode unit is known, so that the decoding can be immediately started from the head of the encode unit. A length up to the head of the complete encode unit can be specified by the sector number if the encode unit is determined by a fixed length.

Abstract: The present invention relates to a method of searching for a recordable position of a writable disk, the method comprising the steps of (a) reading data recording information of the writable disk, the data recording information indicating a position of a last track recorded and a recordable position for data to be recorded; (b) examining whether or not an area after the recordable position indicated by the read data recording information has recorded data; and (c) determining whether to change the recordable position to another position for new input data based on the examination result.

Abstract: An optical disc drive includes a spindle motor and a computer program. The spindle motor is adapted for rotating an optical disc. The computer program configures the optical disc drive to perform consecutive steps of a method for detecting eccentricity of the optical disc, including: a) while the optical disc drive operates under focused and track-locked conditions, controlling the spindle motor to rotate the optical disc at a specified rotation speed; b) measuring an eccentricity value of the optical disc being rotated by the spindle motor; and c) comparing the eccentricity value measured in step b) with a reference value to determine extent of eccentricity of the optical disc.

Abstract: An information storage medium and an apparatus for recording and/or reproducing the information storage medium capable of controlling optimal recording power without an influence of an optimal power control (OPC) area in a layer upon an OPC area in a different layer. The information storage medium includes at least one information storage layer including an optimal power control area for obtaining an optical recording condition. OPC areas in adjacent information storage layers are disposed within different radiuses of the information storage medium. Accordingly, even when the information storage medium is made eccentric or has a manufacturing error, a recording property of the information storage medium is prevented from being degraded due to an influence of an OPC area in an information storage layer upon an OPC area in an adjacent information storage layer.

Abstract: An information storage medium having a plurality of information storage layers, each of which includes an optimal power control (OPC) area for obtaining an optimal recording condition, wherein OPC areas in odd-numbered and even-numbered information storage layers are disposed not to face each other and not to contact each other, or partially overlap each other and lock out use of the overlapped portion. Therefore, when an OPC area of one information storage layer performs OPC, this OPC does not affect another information storage layer.

Abstract: An information storage medium having a plurality of information storage layers, each of which includes an optimal power control (OPC) area for obtaining an optimal recording condition, wherein OPC areas in odd-numbered and even-numbered information storage layers are disposed not to face each other and not to contact each other, or partially overlap each other and lock out use of the overlapped portion. Therefore, when an OPC area of one information storage layer performs OPC, this OPC does not affect another information storage layer.

Abstract: A defect detection device for detecting a defect of data recorded on a recording medium includes a waveform state detection part generating information representing a state of a waveform of a reproduced signal from the recording medium based on soft decision results obtained in process of reproducing the data in accordance with a maximum likelihood decoding algorithm corresponding to partial response, and a defect determination part determining the defect of the recorded data based on the information generated in said waveform state detection part.

Abstract: A method of and drive for recording medium defect management, and a defect managed recording medium. The defect management method includes: writing first state information that specifies that an update cycle of a temporary defect management structure (TDMS) is open when updating of the TDMS begins, the TDMS containing information regarding temporary defect management; updating the TDMS when data is written to or read from the information storage medium; and writing second state information that specifies that the update cycle of the TDMS is closed, when the updating of the TDMS is completed.

Abstract: An apparatus and method are provided for reproducing replacement data recorded in a spare area of a disc, such as a DVD-RAM. The replacement data is temporarily stored in a memory provided in a disc reading or player apparatus or a RAM provided in a PC connected to the disc reading or player apparatus so that the temporarily stored data can be read without movement of an optical pickup to the spare area during a subsequent data reproducing operation. The replacement data is thereby reproduced along with data recorded in a data area of the disc, in a successive manner. Accordingly, it is possible, for example, to efficiently prevent reproduced pictures from being discontinuously outputted due to a delayed data reading operation caused by a searching operation for the spare area in which the replacement data is recorded.

Abstract: An optical storage device having a lens opposite to a storage medium comprises an actuator that moves the lens,a mechanical shock acceleration sensing means that senses a mechanical shock acceleration, a collision prevention control means that drives the actuator for a predetermined period of time with a first driving force greater than the maximum rating force of the actuator when the mechanical shock acceleration sensed by the mechanical shock acceleration sensing means becomes a value equal to a predetermined value, and then, that drives the actuator with a second driving force smaller than the maximum rating force of the actuator.

Abstract: The astigmatic aberration in an optical system is to be adjusted. Specifically, in an optical disc device on which can be selectively loaded a first optical disc having a first index of double refraction or a second optical disc having a second index of double refraction larger than said first index of double refraction, and which includes a liquid crystal device 31 between a light source 11 and an objective lens 15 converging a light beam radiated from said light source on the optical disc 2 loaded on the optical disc device, the voltage applied to the liquid crystal device 31 is adjusted to correct the coma aberration or the astigmatic aberration for the first disc or the second disc, respectively.

Abstract: A frame synchronization signal detection apparatus includes a synchronization signal detector, a main frame synchronization signal generator, a sub frame synchronization signal generator, and an output unit. The synchronization signal detector detects and outputs a synchronization signal from a digital data signal. The main frame synchronization signal generator detects and outputs a first valid synchronization signal from the synchronization signal, as an internal frame synchronization signal, and generates and outputs a first insertion synchronization signal, as the internal frame synchronization signal, if the first valid synchronization signal is not detected in a predetermined first time period. The sub frame synchronization signal generator detects and outputs a second valid synchronization signal from a synchronization signal. The output unit outputs a frame synchronization signal.

Abstract: A digital audio data reproducing system includes a digital audio data reproducing apparatus having a record medium, a detection part for the record medium and a processing unit; an analog record player; and a rotation detecting apparatus for sensing the speed and sense of revolution of an analog record. The rotation detecting apparatus is provided for easily controlling audio data in the other electrical appliances by an analog record in which audio data is stored. The scratch operation of the analog record together with the reproduction of the analog record by a player allows the rotation body to be rotated around a shaft in accordance with the rotation of the analog record. A rotary encoder senses the speed of revolution and the direction of rotation for the rotation body to output pulse signals, and the audio data in the data reproduction apparatus are scratch-controlled on the basis of the pulse signals.

Abstract: An optical disc medium comprises a track groove, along which main information is recorded. The track groove is divided into a plurality of blocks. The plurality of blocks each include a plurality of frames. The plurality of frames each include one shape of wobbles indicating sub information, among a plurality of prescribed shapes of wobbles. The plurality of blocks each have address information. The address information is represented by a string of at least one piece of sub information represented by the shape of wobbles of at least one of the plurality of frames.

Abstract: A temporary defect management area 14 is placed between a control information recording area 12 and a data area 11. Before a recording medium 10 is finalized, defect management information is temporarily recorded into the temporary defect management area. Upon finalizing, the defect management information is recorded into a definite defect management area 13 placed in the control information recording area.

Abstract: A recording medium, such as a high-density and/or read-only recording medium that has the same or similar physical recording format, including a linking area, in order to improve reproduction compatibility with a high-density and/or rewritable recording medium, and to methods and apparatuses for forming, recording, and reproducing the recording medium.

Abstract: A magneto-optical recording medium in which the inside of grooves formed along recording tracks is a signal recording area in groove recording, and the domain wall displacement detection method is employed; and a curvature radius R1, in the cross section perpendicular to the recording tracks, of a shoulder portion of a land separating the grooves that is adjacent to the groove is 30 nm or less and a curvature radius R2, in the cross section perpendicular to the recording tracks, of the inside edge portion of the groove for the recording that is adjacent to the land is 20 nm or more, so that a wide recording power margin can be obtained, the jitter can be improved, and the error rate can also be improved.

Abstract: A procedure for determining active code sequences of a plurality of overlaid code sequences (ca(v)·ga), wherein the active code sequences have a greater gain factor (ga) than the inactive code sequences, includes: (1) formation of a cost function (L) dependent upon unknown estimated values ({tilde over (g)}a,?a) of the gain factors (ga) of composite code sequences (ca(v)·ga), (2) partial differentiation of the cost function (L) in accord with the unknown estimated values ({tilde over (g)}a ?a) of the gain factors (ga), (3) formation of an equation system from the presupposition that all partial differentials of the cost function (L) are zero and a minimum of the cost function (L) is present, (4) determination of the estimated values ({tilde over (g)}, ?a) of the gain factors (ga) by solving the equation system, and (5) determining that an active code sequence exists, if the estimated values ({tilde over (g)}a, ?a) of the corresponding gain factors (ga) are greater than a specified threshold value.

Abstract: An RF receiver includes a plurality of OFDM modules. The OFDM modules include receiver antennas for substantially simultaneously receiving a plurality of transmission signals transmitted via a single frequency band having a plurality of sub-channels. Further included is a channel estimation module connected to the plurality of OFDM modules, and a channel compensation module connected to the channel estimation module and the plurality of OFDM modules. For each sub-channel, the channel estimation module is capable of estimating channel frequency responses affecting the transmission signals, and the channel compensation module is capable of compensating the transmission signals according to the estimated channel frequency responses. The receiver allows an improved transfer rate per frequency band.

Abstract: A word-based interface between a MAC and a PHY, allowing for variable pin counts, variable PHY and MAC data speeds, and variable numbers of connected PHYs. The word-based interface allows for the PHY to provide PHY-to-MAC words to the MAC, and for the MAC to provided MAC-to-PHY words to the PHY, where the PHY-to-MAC words are synchronized with the MAC-to-PHY words. Data and commands are provided in fields of the words, and may be time multiplexed over the interface. Circuits within the MAC and PHY allow for the MAC to detect if a PHY is present, the number of active pins, and the number of PHYs connected. The reset and synchronization signals are integrated into a single reset/sync signal. Identification data is exchanged between the MAC and PHY so that the proper device driver for the PHY may be loaded independently of the BIOS.

Abstract: An apparatus comprising a plurality of first counters, a second counter, and a logic circuit. The plurality of first counters may each be configured to increment a first value in response to receiving one of a plurality of incoming data packets on an associated port. The second counter may be configured to increment a second value in response to a highest value of said first values being incremented. The logic circuit may be configured to generate an output representing a volume of packet traffic in response to the plurality of first values and the second value. The output signal generally indicates which of a plurality of ports is best suited for implementing flow control.

Abstract: A method and system for monitoring traffic and path information in a packet communication network operated according to an IP routing protocol is disclosed. The method and system enables a user, such as a network administrator, to explicitly identify a full set of paths (i.e., links and routers) that the traffic of a specific customer or set of customers, such as service providers hosted at a hosting site, is using when traversing the network. The system allows the dynamic monitoring of the set of active links carrying traffic belonging to the specific customer or set of customers, and the proportion of that traffic that is carried by each active link. This allows, among other things, the identification of network links that are critical for ensuring a high level of service to key customers.

Abstract: There is disclosed apparatus and methods for mimicking self-similar traffic in a telecommunications network. One ore more self-similar streams of data units may be generated according to values of selected parameters for the streams, such as the Hurst parameter. Values may be pre-calculated and stored in a table in a memory. To generate the stream, a traffic distribution is generated based on the values of the parameters, and through retrieval of the values from the table.

Abstract: To address the need for protecting the QoS of high priority flows in a communication network when network conditions vary, original queue weights (B) are modified by a bandwidth allocation adaptor. The modification of the original queue weights is based, in part, on channel conditions.

Abstract: A traffic management processor includes a departure time calculator for generating a departure time for each packet, a departure time table having a plurality of rows, each having a first portion for storing the departure time for a corresponding packet and having a second portion for storing a rollover bit, and a reset circuit configured to reset the rollover bits in a predetermined time.

Abstract: A wireless communication network with improved performance and a method and controller for controlling data rate in the network are provided. The invention provides a feedforward approach to data rate control in wireless networks. The invention is based on designing an optimal, but non-causal, controller and its subsequent “causification,” which results in a practical, implementable controller, driven by an estimate of the bit error probability. This controller leads to a minimum 5%-85% increase in average throughput without additional power utilization, as compared with fixed data rate operation.

Abstract: A method and system for effectuating network routing over primary and backup channels. In one embodiment, a primary link is enabled to transfer customer traffic between network nodes, while a transmission quality of the link is monitored. Upon determining the primary link has entered a marginal state, the primary link is disabled such that the network immediately determines it is unavailable. Test traffic is sent over the primary link while monitoring the transmission quality to determine if the link returns to a non-marginal state, and in response thereto the primary link is re-enabled such that the network immediately determines it is available for routing customer traffic again. In one embodiment, rerouting the customer traffic is effectuated by opening and closing the primary link, such that it appears to the network to be disconnected and reconnected. In one embodiment, the primary link comprises a free space optical (FSO) link.