Abstract: A mounting structure for current detection resistor device has a feature that voltage detection terminal wiring is configured so as to extend along a current path in the resistor body first, and then, to bend at right angles to the current path, while maintaining electrical isolation from a resistor body of the current detection resistor device. The voltage detection terminal wiring connecting to the voltage detection terminals on the circuit board is disposed to extend for some distance in the same direction as the current path so as to cause mutual-inductance between that section of the voltage detection terminal wiring and the resistor body. This causes cancellation of induced voltage caused by the self-inductance of the resistor body, so that it is possible to nullify detection error generated by the voltage induced by the resistor body from the viewpoint of the measuring system.

Abstract: A Burn-In Board (BIB) transfer module links a Burn-In Board (BIB) Loader/Unloader (BLU) to a burn-in chamber rack. The BIB transfer module is capable of transferring a BIB between the BLU and the burn-in chamber rack by moving the BIB in at least two perpendicular directions while minimizing the physical footprint required by the BIB transfer module. The BIB transfer module supports slot level burn-in of components as opposed to batch level burn-in because the burn-in chamber rack may begin the burn-in process as soon as a BIB is delivered to an individual chamber slot in the burn-in chamber rack. The BIB transfer module may easily be detached and separated from the BLU and the burn-in chamber rack without affecting the continuing operation of the BLU and the burn-in chamber rack.

Abstract: Defect mitigation in display panels. Defects in a display panel are mapped, and the defect information is associated with the display system or associated with the panel. During panel operation, the values of pixels neighboring defective pixels are altered to minimize their visibility to the observer. In a first model, luminance error caused by a defect is compensated by adjust neighboring pixels. In a second model, Error in luminance and one of the two chrominance channels is compensated by adjusting neighboring pixels. The defect mitigation methods seek to shift the errors introduced by defective pixels into high spatial frequency elements and chromatic elements, which the human eye is not sensitive to.

Abstract: A magnetostrictive-based sensor is disclosed which obtains higher return signals through the use of multiple consecutive input pulses.

Abstract: An apparatus and a method for providing an output signal correlated with a part position for a moveable part over a positional range, the apparatus includes a transmitter coil, the transmitter coil producing an electromagnetic field when excited by an exciter signal; a receiver coil located proximate to the transmitter coil, the receiver coil generating a receiver signal when the transmitter coil is excited due to inductive coupling between the transmitter coil and the receiver coil, the receiver signal being sensitive to the part position; a reference coil, providing a reference signal substantially independent of the part position; a signal conditioner receiving the receiver signal and the reference signal, the signal conditioner including an analog divider generating a ratio signal from the receiver signal and the reference signal, the output signal being obtained from the ratio signal.

Abstract: A vehicle occupant sensing system that includes a sensor assembly. The sensor assembly has a housing that includes a base and an upper slide member. The upper slide member is moveable toward and away from the base. A sensor is operatively fixed relative to at least one of the upper slide member and the base and is operable to detect movement of the upper slide member toward and away from the base. Additionally, the vehicle occupant sensing system includes a variable biasing member adapted to bias the upper slide member away from the base with a force that is non-linearly related to movement of the upper slide member toward and away from the base. The vehicle occupant sensing system of the present invention may be employed in a vehicle seat assembly to detect a condition of the vehicle seat assembly.

Abstract: An apparatus serves to sense the absolute value of the rotational position of a shaft (14). The apparatus has a first single-turn rotary encoder (30) that is arranged at one end (20) of the shaft (14) and is arranged to sense the latter's rotational position within a single shaft revolution. Also provided are: a multi-turn rotary encoder unit which senses the number of revolutions of the shaft (14) and which comprises a reduction gear linkage (18); a rotary element (42), driven by the output of the linkage, that is oriented as an imaginary continuation of the shaft (14) and coaxially therewith; and a second single-turn rotary encoder (48) which is arranged to sense the rotational position of the rotary element (42) within a single revolution. The reduction gear linkage (18) surrounds the shaft (14), and its output element (38) is connected, via a connecting member (40), to said rotary element (42) around the first single-turn rotary encoder (30).

Abstract: A method for detecting substructure includes the steps of: nondestructively scanning an assembly using a substructure scanning system including a precision motion carriage and a nondestructive scanning sensor, positioning the assembly under the substructure scanning system, positioning the scanning sensor on the outer skin, moving the scanning sensor over the outer skin with the precision motion carriage, locating the substructure through the outer skin, and controlling an assembly process using the location of the substructure. By using the method of the present invention substructure features may be located through an outer skin with sufficient accuracy to control assembly operations and to meet engineering tolerances. The method for precisely detecting substructure using precision eddy current scanning may be used for, but is not limited to, the location of substructure features, such as edges of flanges, machined steps, or tooling holes, covered by outer mold line skins of an aircraft airframe.

Abstract: This invention relates to a combined nuclear quadrupole resonance and X-ray contraband detection system with a metal shield alarm that is activated when the area of the metal in the object being scanned as determined by the resonance frequency shifts of the NQR sensors exceeds the area of the metal in the object being scanned as determined by X-rays by an amount sufficient to shield contraband.

Abstract: A cell in one example comprises an alkali metal and a coating of parylene on an interior surface of the cell. In one implementation, the alkali metal may be an optically pumped gaseous phase of an alkali metal. The parylene coating minimizes interaction of the excited state of the alkali metal, increases lifetime of the excited state, and minimizes interaction of nuclear spin states with the cell walls.

Abstract: An automated image processing technique is disclosed that evaluates pixels of a phase-difference image to determine those pixels corresponding to inflowing phase data and background phase data. Phase-difference images are generated from a first acquisition and a second acquisition. Non-zero spatially varying background phase from the phase-difference images that are due to eddy currents induced by flow encoding gradients used to generate the phase-difference images is determined. This non-zero spatially varying background phase is removed from the phase-difference images to determine phase associated with flowing spins and phase associated with stationary spins.

Abstract: A sensor assembly for the detection of substances by means of nuclear quadrupolar resonance (NQR) and in the presence of environmental interference. The sensor assembly has a transmitter Tx which comprises excitation means which generate excitation signals and a switch connected at the outlet of the Transmitter. A first phase-shifted signal divider/adder is connected to the outlet of the switch. First and second sensor elements are connected to the respective outlets of the first phase-shifted signal divider/adder. First and second coupling circuits, preferably of common mode, are connected to the outlet of the first and second sensor elements, respectively. First and second amplifiers are connected to the outlets of the first and second coupling circuits, respectively. First and second bandpass filters are connected to the outlets of the first and second amplifiers, respectively. A second phase-shifted signal divider/adder is connected to the outlets of the first and second bandpass filters, respectively.

Abstract: A magnetic resonance (NMR) method for fast, dynamic, spatially resolved measurement of the temporal changes in NMR signals by means of repeated data acquisition in individual measurements (Acq) with measuring sequences which are sensitive to a parameter to be observed, in an NMR apparatus with shim coils for correcting the magnetic field is characterized in that during data acquisition of each individual measurement (Acq) in acquisition steps (S1 . . . Sn) with a time lag, the magnetic field distribution in the NMR apparatus is measured, technically or physiologically based changes in the magnetic field distribution are determined therefrom in a calculation step (Scalc) as well as a change in the currents in the magnetic field required for compensation thereof, and the dynamic changes in the magnetic field distribution are compensated for by means of the correspondingly changed shim currents.

Abstract: An NMR/ESR antenna is inserted into a magnet device for generating a static magnetic field, and irradiates a sample with an electromagnetic wave to detect a signal generated from the sample. The NMR/ESR antenna comprises a sample tube, an NMR solenoid coil, an ESR microwave cavity, and a microwave guide. The solenoid coil has a central axis coaxial with a central axis of the ESR microwave cavity, and orthogonal to a direction of a main magnetic field generated by the magnetic device.

Abstract: A magnetic resonance imaging (MRI) system includes a gradient coil system. The gradient coil system comprises an inner coil configuration (1,2,3) and an outer coil configuration (4,5,6) positioned substantially coaxially with said inner coil configuration (1,2,3). Both coil configurations are attached to a tubular body (7) located between said two coil configurations (1,2,3,4,5,6) and extend substantially coaxially with both of the coil configurations. The tubular body (7) comprises stainless steel rods (10) positioned substantially in an axial direction.

Abstract: A method and device generating a computer tomography data set CT* of an object, wherein a nuclear spin tomography recording MR of said object is obtained, and a transformation or mapping protocol f(MRR) for a nuclear spin tomography reference data set MRR is ascertained. The nuclear spin tomography reference data set MRR can be mapped onto said recorded nuclear spin tomography data set MR, wherein said ascertained transformation or mapping protocol f is applied to a computer tomography reference data set CTR corresponding to the nuclear spin tomography reference data set MRR to determine a virtual computer tomography data set CT*=f(CTR).

Abstract: The MRI rf coil known as the balanced high-pass-weighted hybrid birdcage is modified to obtain two homogeneous degenerate resonances, capable of generating circular polarization at widely separated frequencies, by including inductors in parallel with the ring (high-pass) tuning capacitors such that their isolated parallel resonant frequency is greater than the desired low-frequency (LF) homogeneous resonance and not greater than 10% more than the desired high-frequency (HF) homogeneous resonance. The coil is advantageous for the frequency-diameter product range of 10 to 60 MHz-m. The coil is preferably balanced at both frequencies such that the electric potentials vanish on the central axial plane at both the LF and HF homogeneous modes. Additional parasitic-mode-shifting reactive elements, either capacitors or inductors, may be added between adjacent rungs near their ends, and the rungs may each consist of two parallel bands shorted together at their ends, as in the Crozier birdcage.

Abstract: Systems and techniques for acquiring a medical image of a region of interest are described. A plurality of electromagnetic excitation pulses are applied to the region of interest according to predetermined parameters, and a predetermined delay period is introduced after which the longitudinal magnetization of a first species generated within the region of interest reaches zero and a longitudinal magnetization of a second species generated within the region of interest is in steady-state.

Abstract: A superconducting magnet configured for an NMR spectrometer includes a split type superconducting magnet having left solenoid superconducting magnets and right solenoid superconducting magnets with a center space therebetween for receiving a sample tube. A permanent current switch is provided and the left and right solenoid superconducting magnets are arranged symmetrically with respect to a center face of the center space. The left and right solenoid superconducting magnets are constituted by an outermost magnet and a plurality of innermost magnets and are arranged in concentric relation with respect to a vertical axis of the center space. A direction of current in at least one of the plurality of innermost magnets is minus when a direction of current in the outermost magnet is plus.

Abstract: The use of a bias controlled diode in the Q-damping circuit of a high temperature superconductor transmit, receive, or transmit and receive self-resonant coil in a nuclear quadrupole resonance detection system results in improved performance. The diode is operated with a forward bias such that the diode is resistive with a resistance of about 10 to about 1000 ohms.

Abstract: A ground fault detector and detection method for a vehicle that can determine the cause of the occurrence of a ground fault after detecting the presence of the ground fault. The output terminal of a high-voltage battery is connected to one side of a coupling capacitor. In operation, a pulse signal is applied to a measurement point on the other side of the coupling capacitor, and the voltage generated at that point is detected. Whether the high-voltage battery or the electrical equipment units are grounded is determined. To determine the cause of the ground fault, the oscillation frequency of the square-wave pulse signal is changed and applied to the measurement point. From the change in voltage amplitude detected, it is determined whether the cause of the ground fault is a resistive or a capacitive ground fault, according to the change in the impedance of the battery or the units.

Abstract: Electronically reset table test apparatus. The test apparatus includes an electronically operable current breaker connected to a test jig for testing semiconductor die. The electronically operable current breaker is connected through an interface that converts signals to signals appropriate for use on a computer bus to a computer system. The test apparatus can detect faults in the semiconductor die and open the electronically operable current breaker in response to detecting the fault. The electronically operable current breaker can be closed when the fault is removed.

Abstract: In a first embodiment of the invention there is provided an electronic chip for use with an automatic testing equipment device testing a device under test. The device under test has a plurality of pins and the electronic chip is placed in a channel of a test card that is associated with one of the pins. An input signal is provided to a pin of the device under test and the resulting output is provided to the pin electronics for the channel of the test card. In most embodiments, the output signal is a voltage signal. One purpose for the electronic chip is to measure jitter based upon timing measurements performed by the electronic chip. Jitter measurements are particularly important for high-speed serial devices. The electronic chip includes an integrating time measurement circuit for receiving the input signal and producing an output signal including a timing measurement of at least a portion of the input signal.

Abstract: Method and apparatus for detecting or suppressing electrical arcing or other abnormal change in the electrical impedance of a load connected to a power source. Preferably the load is a plasma chamber used for manufacturing electronic components such as semiconductors and flat panel displays. Arcing is detected by monitoring one or more sensors. Each sensor either responds to a characteristic of the electrical power being supplied by an electrical power source to the plasma or is coupled to the plasma chamber so as to respond to an electromagnetic condition within the chamber. Arcing is suppressed by reducing the power output for a brief period. Then the power source increases its power output, preferably to its original value. If the arcing resumes, the power source repeats the steps of reducing and then restoring the power output.

Abstract: A circuit and method of operation for simulating a capacitive load for an integrated circuit or chip. The circuit adds a small capacitor to a test cell that tests the performance of a chip, such as a DRAM memory device, so that it may be tested realistically before being soldered into a final assembly, such as a DRAM module. Other passive devices, such as inductors or resistors may also be used in place of or in addition to a capacitor. By providing increased capacitance, or inductance or resistance for the test sequence, each circuit is tested under more realistic conditions. In one example, DRAM memory device modules may be realistically tested for performance by using sockets with small capacitors hard wired between pins of the DRAM device and a test interface used to perform the tests.

Abstract: A high-frequency power source supplies high-frequency power to a load whose reflection characteristic for the power varies with time. The power source includes a frequency-variable power generator, a power detector for detecting the power into the load and the power from the load, a reflection coefficient calculator for calculating a reflection coefficient based on the detection of the power into and from the load, a frequency detector causing the power generator to generate high-frequency powers at various frequencies within a predetermined frequency range for obtaining the frequency that gives a minimum value to the calculated reflection coefficient, and a power supply controller for causing the power generator to generate a high-frequency power of the frequency obtained by the frequency detector and for supplying the high-frequency power to the load.

Abstract: Method and device for measuring a dielectric response of an electrical insulating system, wherein a first measurement result is determined by a frequency domain method and a second measurement result is determined by a time domain method, whereupon the first measurement result and the second measurement result are combined to form an overall measurement result as the dielectric response. Standard types of measurement methods, for example the FDS and PDC methods, may be used as measurement methods for the frequency domain and the time domain.

Abstract: An improved system and method for providing a dielectric monitor which allows the measurement of the dielectric constant of a conductive material. The capability to accurately and efficiently measure the dielectric constant in soil allows the moisture content of the soil to be accurately determined. The preferred embodiment teaches a sensor that has the ability to compensate for some level of variable conductivity. Alternate embodiments are applicable to areas other than soil moisture measurement.

Abstract: A method for determining misalignment between two semiconductor dies is described in which signals are transmitted through a first subset of an array of proximity connectors that are proximate to a surface of one of the semiconductor dies and received through a second subset of an array of proximity connectors that are proximate to a surface of the other semiconductor die. A spatial beat frequency is determined from the received signals. This spatial beat frequency corresponds to misalignment-induced aliasing of spatial frequencies associated with the first subset of the array of proximity connectors and the second subset of the array of proximity connectors. The misalignment is then determined using the spatial beat frequency.

Abstract: A flap type handle equipped with an electrostatic capacitance sensor, in which sensitivity adjustment can be easily performed without changing the specification of a sensor body 3, reduces the difference in detection sensitivity with respect to the position and perform required balance adjustment. A sensor body is fixed to a handle base portion. The detection face of the sensor body is oriented to a predetermined detection range at the inner surface side of a hand flap. An electrically conductive face is provided to the inner surface of the handle flap so as to cover the detection range. A connecting electric conductor for electromagnetically couple the electrically conductive face and the detection electrode at least under the non-operation of the handle flap is provided. The connecting electric conductor or/and the electrically conductive face are subjected to detection sensitivity adjusting trimming (provided with a cut-out or the like).

Abstract: The present invention relates to a pipeline examination apparatus for Direct Current Voltage Gradient (DCVG) and Closed Interval Potential Survey (CIPS) methods. The pipeline examination apparatus of the present invention detects and analyzes at least one electrode signal while supplying an anticorrosive current to a buried pipeline by switching on and off the anticorrosive current at predetermined intervals. The pipeline examination apparatus includes a signal detection unit and a measurement unit. The signal detection unit detects the electrode signal including a DCVG electrode signal and/or a CIPS electrode signal. The measurement unit receives the electrode signal from the signal detection unit and analyzes the electrode signal. The measurement unit includes a measurement method selection unit, a control unit, a storage unit, an analysis unit and a display unit.

Abstract: The present invention provides a high-voltage measuring device capable of providing sufficient electric isolation between resistors and between resistors and a voltage measurement circuit without necessity of enlarging a size of a substrate for carry thereon the circuit. A high-voltage measuring device mounted on a substrate, including a high-voltage input terminal pair, a measuring terminal pair, a voltage measuring circuit having input terminals connected to the measuring terminal pair, and two resistive parts. One of the resistive parts electrically connects one of high-voltage input terminal pair and one of measuring terminal pair. The other of resistive parts electrically connects between the other of high-voltage input terminal pair and the other of measuring terminal pair.

Abstract: An impedance measuring apparatus includes a plurality of RF (radio frequency) probes; a plurality of rotation mechanisms coupled to the plurality of RF probes, respectively; a processing unit, and a mechanical controller. The mechanical controller controls the plurality of rotation mechanisms and the plurality of RF probes to measure package RF signals between terminals formed on a package substrate. The processing unit measures calibration RF signals between terminals formed on at least one calibration substrate; determines RF impedances of the package substrate from the package RF signals and phase differences corresponding to a thickness of the package substrate and distances between the terminals on the package substrate from the calibration RF signals, and calibrates the RF impedances based on the phase differences.

Abstract: An interposer including at least two dielectric layers bonded to each other, sandwiching a plurality of conductors there-between. The conductors each electrically couple a respective pair of opposed electrical contacts formed within and protruding from openings with the dielectric layers.

Abstract: Provided is a membrane with bumps whose variations in shape are minimized to a least extent and which are capable of supporting a micro electrical circuit. The membrane with bumps includes: a plurality of bumps, each of which is made up of a probe and an electrode, with the probe having a diameter which becomes smaller from one end toward another end of the probe, and with the electrode having a diameter which is larger than the diameter of the one end of the probe; and an insulating base where the bumps are positioned at predetermined locations so that the bumps are insulated from each other, wherein the probe is positioned, penetrating the insulating base in a thickness direction, and a metal film is placed between the electrode and the insulating base.

Abstract: To reduce noise in measurements obtained by probing a device supported on surface of a thermal chuck in a probe station, a conductive member is arranged to intercept current coupling the thermal unit of the chuck to the surface supporting the device. The conductive member is capacitively coupled to the thermal unit but free of direct electrical connection thereto.

Abstract: According to one embodiment of the invention, a method for estimating the failure rate of semiconductor devices includes obtaining accelerated stress duration data for a plurality of semiconductor devices, determining which of the semiconductor devices fail, classifying the defects for the failed semiconductor devices, determining a distribution model for the accelerated stress duration data, determining a set of parameters for the distribution model, determining a relative proportion of each defect classification to the total number of defect classifications, determining temperature and voltage acceleration factors for each defect classification, identifying actual operating conditions for the semiconductor devices, comparing the actual operating conditions for the semiconductor device with the distribution model, and determining a defect ratio for the semiconductor devices at the actual operating conditions for a predetermined time period based on the comparison.

Abstract: A power supply assembly includes a dielectric substrate and a power supply circuit supported by the dielectric substrate. A conductive connection block is attached to the dielectric substrate at a main surface thereof and is connected to a power supply terminal of the power supply circuit. A spring probe pin is fitted in a bore formed in the connection block and includes a conductive sleeve and a conductive plunger fitted in the sleeve. The conductive sleeve is in electrically conductive contact with the connection block.

Abstract: An example embodiment of the present invention relates to a method of executing a logic operation while remaining safe from side channel attacks. Another example embodiment of the present invention relates to a logic circuit and device for executing a logic operation while remaining safe from side channel attacks.

Abstract: A semiconductor integrated circuit includes a CMOS controlled inverter consisting of series-connected PMOS and NMOS transistors. The source of the NMOS transistor is coupled to a ground line through an additional NMOS transistor for power gating of voltage VSS. The source of the PMOS transistor can be coupled to a power supply line through an additional PMOS transistor for power gating of voltage VDD. The inverter receives an input signal IN and its complementary version that has transitioned earlier than the input signal. In response to the input signal, the inverter produces an output signal. A NAND gate that receives the output signal and the complementary input signal controls the power gating NMOS transistor. A NOR gate that receives the output signal and the complementary input signal controls the power gating PMOS transistor.

Abstract: A system and method for distributing signals throughout an integrated circuit (IC). The system comprises a transmitter unit and a plurality of receiver units. The transmitter unit combines a plurality of signals into a serial signal stream and couples the serial signal stream to a conductor for distribution to a plurality of destinations in the IC. There is a receiver unit at each of the plurality of destinations and connected to the conductor. Each receiver unit extracts one of the plurality of signals from the serial signal stream received on the conductor. The transmitter unit comprises a multiplexer circuit and a counter circuit and time multiplexes the plurality of signals to form a serial signal stream, wherein a signal is selected for a time slot based on a count value of the counter circuit. The counter signal is also supplied to each receiver unit, which uses the counter signal to determine when to latch a signal from the serial signal stream.

Abstract: A method for interconnecting sub-functions of metal-mask programmable functions that includes the steps of (A) forming a base layer of a platform application specific integrated circuit (ASIC) comprising a plurality of pre-diffused regions disposed around a periphery of the platform ASIC, (B) forming two or more sub-functions of a function with a metal mask set placed over a number of the plurality of pre-diffused regions of the platform application specific integrated circuit and (C) configuring one or more connection points in each of the two or more sub-functions such that interconnections between the two or more sub-functions are tool routable in a single layer. Each of the pre-diffused regions is configured to be metal-programmable.

Abstract: A synchronous output buffer circuit which effectively moves combinational logic associated with an output enable operation, boundary scan operation, and voltage translation to a pipe that leads into a pair of output registers that operate in response to the output clock signal. The output registers may be forced to asynchronously route an input signal to an output terminal during a reset mode and during a boundary scan mode. The output registers can include a safety circuit, which prevents pull-up and pull-down devices (which drive the output signal), from turning on at the same time.

Abstract: Enhanced passgate structures for use in low-voltage systems are presented in which the operational speed of the passgate structures is maximized, while minimizing leakage current when the structure is turned “OFF.” In one arrangement, the VT of the pass-gate structures is increased relative to the VT of other transistors fabricated according to a particular process dimension. In addition, a passgate activation voltage is applied to the passgate structures such that the passgate activation voltage is higher in voltage than a nominal voltage being supplied to circuitry other than the passgate structures.

Abstract: A one-time programmable circuit uses forced BJT hFE degradation to permanently store digital information as a logic zero or logic one state. The forced degradation is accomplished by applying a voltage or current to the BJT for a specific time to the reversed biased base-emitter junction, allowing a significant degradation of the junction without destroying it.

Abstract: A buffer system includes a logic adjusting circuit for translating a first logic level of a first component to a second logic level of a second component. The first and second logic level values are substantially different, and the buffer system has no directional control signal. A method of interfacing at least two components with different logic voltage requirements on a single bus without a separate directional control signal includes initializing a buffering circuit, activating the buffering circuit, transferring data through the buffering circuit, and deactivating the buffering circuit. A method of implementing a bi-directional interface between at least two devices interfaced on a bus includes providing a plurality of logic components interconnected to transfer data through the bus, and transferring data through the bus from a first device to a second device. The direction of data transfer is determined without a separate directional control signal.

Abstract: There is provided an output driver for use in a semiconductor device capable of remarkably improving linearity of impedance by reducing or minimizing a change of an impedance for output data caused due to a change of an external power supply. The output driver for outputting internal data of a semiconductor device to the exterior of a chip comprises a first driving section including a driving transistor to maintain an impedance for applied data at a certain level in response to the data; and a second driving section for compensating for linearity of the impedance in response to an operation signal from the driving transistor of the first driving section and providing an output terminal with the data.

Abstract: Embodiments utilize analog sub-threshold circuits to perform Boolean logic and soft-gate logic. These analog circuits may be grouped into configurable logic blocks that are locally asynchronous, but block-level synchronous. The Boolean logic, or function, performed by these blocks may be configured by programming bits. Other embodiments are described and claimed.

Abstract: A device such as a programmable logic device (“PLD”) includes circuitry for detecting the PPM frequency difference between two input clock signals. For example, this circuitry may accept a user-programmable PPM threshold value and output a signal when this threshold value is met.

Abstract: A circuit and method thereof for sampling/holding signal is provided. The signal sampling/holding circuit comprises a first signal sampling/holding device, a second signal sampling/holding device, a target signal and a reference voltage. First, the first signal sampling/holding device is supplied with the reference voltage and the target signal. The reference voltage is disconnected from the first signal sampling/holding device before the target signal is. Similarly, the reference voltage is disconnected from the second signal sampling/holding device before the target signal is. Thus the target signal is respectively sampled and held in the first signal sampling/holding device and the second signal sampling/holding device.