Patents Issued in November 13, 2007
  • Patent number: 7294920
    Abstract: This invention relates to a wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: November 13, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Shou-Lung Chen, Ching-Wen Hsiao, Yu-Hua Chen, Jeng-Dar Ko, Chih-Ming Tzeng, Jyh-Rong Lin, Shan-Pu Yu
  • Patent number: 7294921
    Abstract: The present invention is directed to a high-performance system on a chip which uses multi-layer wiring/insulation through-hole interconnections to provide short wiring and controlled low-impedance wiring including ground planes and power supply distribution planes between chips.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: November 13, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 7294922
    Abstract: A semiconductor device includes a semiconductor construction assembly having a semiconductor substrate which has first and second surfaces, and has an integrated circuit element formed on the first surface, a plurality of connection pads which are connected to the integrated circuit element, a protective layer which covers the semiconductor substrate and has openings for exposing the connection pads, and conductors which are connected to the connection pads, arranged on the protective layer, and have pads. An upper insulating layer covers the entire upper surface of the semiconductor construction assembly including the conductors except the pads. A sealing member covers at least one side surface of the semiconductor construction assembly.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: November 13, 2007
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hiroyasu Jobetto, Ichiro Mihara
  • Patent number: 7294923
    Abstract: The present invention provides a metallization scheme, a method for manufacturing the metallization scheme, and an integrated circuit including the metallization scheme. In one aspect, the metallization scheme (300) includes a protective layer (320) located over a substrate (310), and a conductive layer (330) located over the protective layer (320). The metallization scheme (300) further includes a stress-reducing low-modulus material (340) located between the protective layer (320) and the conductive layer (330).
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: November 13, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Howard Test
  • Patent number: 7294924
    Abstract: The flat panel display device may include a substrate and source/drain electrodes having a heat-resistant metal layer pattern, an Al-based metal layer pattern and a capping metal layer pattern, deposited on the substrate. With this design, the flat panel display device may have low wiring resistance, thermal stability and improved contact resistance with the pixel electrode.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: November 13, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Tae-Sung Kim
  • Patent number: 7294925
    Abstract: An optical scanner package having a heating dam is provided. The optical scanner package having a heating dam includes: an optical scanner on which a mirror surface is formed; a ceramic package in which the optical scanner is installed at the bottom of a cavity thereof; a glass lid covering a sidewall of the ceramic package; a heating dam formed on the sidewall of the ceramic package; and solder on the heating dam sealing between the glass lid and the sidewall of the ceramic package. The heating dam locally heats the solder to form hermetic sealing.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: November 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-kyoung Choi, Young-chul Ko
  • Patent number: 7294926
    Abstract: A chip cooling system including a semiconductor device having a bulk region, wherein at least one fluid channel extends at least partially through the bulk region, the fluid channel having an inlet and an outlet, a fluid inlet port in fluid communication with the channel inlet, and a fluid outlet port in fluid communication with the channel outlet, and a cooling fluid flows from the fluid inlet port, through the fluid channel and to the fluid outlet port to cool the bulk region.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: November 13, 2007
    Assignee: Delphi Technologies, Inc.
    Inventors: Peter J. Schubert, Bruce A. Myers
  • Patent number: 7294927
    Abstract: An acceleration sensor chip package comprises a frame section, a first semiconductor chip corresponding to an MEMS chip having a plurality of first bumps, a second semiconductor chip having a plurality of second bumps, a substrate on which the first and second semiconductor chips are mounted in parallel with each other and which has a plurality of electrode pads directly connected to the first or second bumps in opposing relationship to the first or second bumps, and external terminals respectively connected to the electrode pads, a closed ring-shaped first sealing section which seals a space defined between the frame section and the substrate so as to surround arrangements of the plurality of first bumps, and a second sealing section which covers the first semiconductor chip, the second semiconductor chip and the first sealing section to seal them.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: November 13, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Norio Takahashi
  • Patent number: 7294928
    Abstract: A bottom unit including a bottom unit semiconductor chip is mounted to a circuit board and one or more top elements such as packaged semiconductor chips are mounted to the bottom unit. Both mounting operations can be performed using the same techniques as commonly employed for mounting components to a circuit board. Ordinary packaged chips can be employed as the top elements, thereby reducing the cost of the assembly and allowing customization of the assembly by selecting packaged chips. The assembly achieves benefits similar to those obtained with a preassembled stacked chip unit, but without the expense of special handling of the bare dies included in the packaged chips.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: November 13, 2007
    Assignee: Tessera, Inc.
    Inventors: Kyong-Mo Bang, David Gibson, Young-Gon Kim, John B. Riley
  • Patent number: 7294929
    Abstract: An interconnect structure a substrate, a contact pad disposed over a surface of the substrate, and an insulative mask disposed over the contact pad. The insulative mask can include an opening that is aligned over and exposes an inner portion of the contact pad. The inner portion of the contact pad includes a compliant layer and a conductive layer that is disposed over the compliant layer. The inner portion of the contact pad has sufficient flexibility to distribute mechanical stress applied to the contact pad and can mitigate damage to the interconnect structure.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: November 13, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Hiroshi Miyazaki
  • Patent number: 7294930
    Abstract: An objective of this invention is to allow each process of contacting of a test probe and bonding to be reliably conducted within a given region. A semiconductor device 100 has a probing mark 111 forming region; a bonding pad 110 having a bonding region 113; and a check mark 120 separate from the bonding pad 110. In the configuration, the probing mark 111 forming region and the bonding region 113 can be identified on the basis of a planar shape of the check mark 120.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: November 13, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Akihito Tanabe
  • Patent number: 7294931
    Abstract: A method for selectively depositing a source material on a wafer is disclosed. In one embodiment, a wafer is having at least one recessed feature is provided. A top surface of the wafer is then coated with an inhibiting material. Finally, a source material is selectively deposited in the at least one recessed feature, the source material repelled by the inhibiting material. In another embodiment, the inhibiting material is one of a wax, a surfactant or an oil.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: November 13, 2007
    Assignee: Intel Corporation
    Inventor: Chris Barns
  • Patent number: 7294932
    Abstract: The semiconductor device 100 includes a multilayer wiring structure formed on the semiconductor substrate. The multilayer wiring structure includes at least a first inter layer dielectric film 120 in which interconnects 124 are formed, and at least a second inter layer dielectric film 122 in which vias 126 are formed. The multilayer wiring structure includes a circuit region 110 in which the interconnects 124 and the vias 126 are formed, a seal ring region 112 formed around the circuit region 110 and in which seal rings surrounding the circuit region 110 in order to seal the circuit region 110 are formed, and a peripheral region 114 formed around the seal ring region 112. The semiconductor device 100 further includes dummy vias 136 formed of a metal material, formed in the second interlayer dielectric film 122 at the peripheral region 114.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: November 13, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Masayuki Hiroi
  • Patent number: 7294933
    Abstract: A semiconductor wafer includes a redistribution layer which is electrically connected with a pad which is an end portion of an interconnect, a first resin layer which is formed over the redistribution layer, a second resin layer which is formed over the first resin layer and covers the side surface of the first resin layer, and an external terminal which is formed to be electrically connected with the redistribution layer in a manner to avoid the pad.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: November 13, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Terunao Hanaoka
  • Patent number: 7294934
    Abstract: A low-k dielectric sacrificial material is formed within a microelectronic structure covered with a suitable porous or low density permeable material. At an appropriate time, the underlying sacrificial material is decomposed and diffused away through the overlying permeable material. As a result, at least one void is created, contributing to desirable dielectric characteristics.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: November 13, 2007
    Assignee: Intel Corporation
    Inventors: Grant M. Kloster, Xiarong Morrow, Jihperng Leu
  • Patent number: 7294935
    Abstract: Semiconducting devices, including integrated circuits, protected from reverse engineering comprising metal traces leading to field oxide. Metallization usually leads to the gate, source or drain areas of the circuit, but not to the insulating field oxide, thus misleading a reverse engineer. A method for fabricating such devices.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: November 13, 2007
    Assignee: HRL Laboratories, LLC
    Inventors: Lap-Wai Chow, James P. Baukus, William M. Clark, Jr.
  • Patent number: 7294936
    Abstract: In the case where a first semiconductor chip 100 and a second semiconductor chip 200 are stacked, both the semiconductor chips 100 and 200 are connected using micro bumps, in which a circuit block in the first semiconductor chip and a circuit block in the second semiconductor chip are connected by the micro bumps, and the circuit block in the second semiconductor chip is also connected to the external electrode by the micro bumps through the first semiconductor chip. Further, micro bumps 121, 221 that connect circuit blocks 101, 102, 103, 104 and 210 of both the semiconductor chips 100, 200 and the micro bumps 122, 222 that connect the circuit block 210 in one chip 200 to an external electrode are arranged in different positions.
    Type: Grant
    Filed: February 8, 2005
    Date of Patent: November 13, 2007
    Assignee: Sony Corporation
    Inventor: Kazuhiro Kondo
  • Patent number: 7294937
    Abstract: A multi-layered semiconductor structure with free areas limiting the placement of test keys. First and second scribe lines intersect to define one corner point of a die. The first and second scribe lines are part of the multilayered structure and at least one layer of the multi-layer structure is a low-k dielectric layer. Free area A1 is defined on the first scribe line and is defined by the equation A1=D1×S1, where D1 is the distance from the corner point of the die toward the main area of the die, and S1 is the width of the first scribe line. Free area AS is defined at the intersection of the first scribe line and the second scribe line adjacent the die and is defined by the equation AS=S1×S2, where S2 is the width of the second scribe line.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: November 13, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Yuan Su, Pei-Haw Tsao, Hsin-Hui Lee, Chender Huang, Shang Y. Hou, Shin Puu Jeng, Hao-Yi Tsai, Chenming Hu
  • Patent number: 7294938
    Abstract: A method of controlling a vehicle driving system having differential gear including an input shaft, an outlet shaft and a reactionary shaft, a flywheel, an engine, the flywheel and the engine being interlocked with the input shaft, an output shaft interlocked with the outlet shaft, a first motor generator (MG) interlocked with the reactionary shaft and a second MG adapted to receive the output electric power of the first MG as input.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: November 13, 2007
    Inventor: Takayuki Miyao
  • Patent number: 7294939
    Abstract: A wind-power electricity generating apparatus includes a base, a cover and an electricity generating set. The cover is pivotally coupled to a lateral side of the base and can be lifted open or covered onto the base. A wind collecting surface is formed inside the cover, and a penetrating hole penetrating the cover is disposed at the center of the wind collecting surface. The electricity generating set includes a vane wheel and an electricity generator at a side of the vane wheel, and the vane wheel and the electricity generator are foldably disposed in the penetrating hole of the cover. The kinetic energy produced by rotating the vane wheel is used for driving the electricity generator to generate electric energy. The present invention greatly reduces the storage volume and facilitates users to carry the apparatus. In addition, the apparatus of the invention does not occupy much space for its storage.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: November 13, 2007
    Inventor: Shih H Chen
  • Patent number: 7294940
    Abstract: An apparatus, system, and method for providing DC battery backup power to Power over Ethernet, (PoE) Mid Span or End Point Power Sourcing Equipment, (PSE), such that in the event of the loss of utility power the PSE device is able to continue to provide power for some time while battery capacity remains. The apparatus includes an AC to DC converter that receives an AC power input and outputs DC power to the power over Ethernet circuitry and a DC battery pack that provides backup DC power to the power over Ethernet circuitry.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: November 13, 2007
    Assignee: System Engineering International
    Inventors: Martin Grolnic, William J. Kautter
  • Patent number: 7294941
    Abstract: A winding coil assembly (6) of a reciprocating motor comprising: an outer stator; an inner stator (2) arranged at an inner circumference surface of the outer stator (2) with a certain air gap; a magnet linearly and movably arranged between the outer stator and the inner stator; and a winding coil (20) mounted on either the outer stator or the inner stator, wherein the winding coil (20) is formed as a ring shape by being wound a coil (20) with a plurality of turns, and the coil (20) is molded by a molding material (22). According to this, the coil (20) is prevented from being deformed at the time of winding operation and can be manufactured to have a minute dimension, so that the number of components can be reduced and thereby a manufacture cost can be reduced.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: November 13, 2007
    Assignee: LG Electronics Inc.
    Inventors: Won-Hyun Jung, Sun-Ki Yoon
  • Patent number: 7294942
    Abstract: Direct coupling type motor for drum type washing machine having a stator which can reduce material required for fabrication, and a weight after fabrication, simplify a fabrication process, and can be mounted on a fixing side, such as a tub or a bearing housing securely, and a rotor which can enhance rigidity an outer rotor and protect a surface of the outer rotor.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: November 13, 2007
    Assignee: LG Electronics Inc.
    Inventors: Deug Hee Lee, Seung Bong Choi, Byung Hwan Ahn
  • Patent number: 7294943
    Abstract: An electric rotating machine capable of lowering the temperature of a rotor disposed, wherein at least one of closed ventilation loops for cooling is formed, one of the loops constituting a ventilation passage communicating with an exhaust side through a heat source of the end of the generator to a cooler, thereby to supply cooling wind to the rotor after it passes through the cooler.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: November 13, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Hattori, Kazumasa Ide, Akiyoshi Komura, Takashi Watanabe, Ryoichi Shiobara, Yasuomi Yagi, Kengo Iwashige, Keiji Kobashi
  • Patent number: 7294944
    Abstract: A compact, highly accurate and inexpensive brushless motor is disclosed. A bearing is fixed to the inner periphery of a cylindrical portion of a housing, and a shaft is rotatably inserted through the bearing to cover the housing. A yoke arranged at the forward end of the cylindrical portion of the housing is fixed on the shaft. In this configuration, the bearing is arranged at a position on the inside of the yoke, and therefore the motor can be reduced in size to the extent of superposition between the yoke and the housing. The bearing is fixed to one member of the housing, and therefore a high accuracy is realized.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: November 13, 2007
    Assignee: Nidec Corporation
    Inventor: Yoshio Fujii
  • Patent number: 7294945
    Abstract: The invention relates to a gate or door drive housing with a basic carrier body for preference in the shape of a bowl or shell, to which various different drive components can be secured, and a cover hood which can be connected to the basic carrier body. According to the invention, a housing extension for accommodating additional and/or larger drive components can be connected in a releasable manner in an exact fit to the basic carrying body.
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: November 13, 2007
    Assignee: Marantec Antriebs-und Steuerungstechnik GmbH & Co. KG
    Inventor: Michael Hormann
  • Patent number: 7294946
    Abstract: A dynamic pressure gas bearing motor in which a radial dynamic pressure gas bearing and a thrust dynamic pressure gas bearing are ensured to have sufficient length and diameter even though the clamping screw holes for introducing screws to reliably hold a disk are formed in the top wall of the motor rotation body.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: November 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Jyono, Yasunori Tokuno, Takeyoshi Yamamoto, Taizo Ikegawa, Satoko Miki
  • Patent number: 7294947
    Abstract: An apparatus for transferring torque magnetically with a primary rotary member and a secondary rotary member. The primary rotary member has permanent magnets, the secondary rotary member with electro-conductive materials. The secondary rotary member also having magnetically permeable material. The secondary rotary member is placed partially or totally inside the primary rotating member. This causes the two rotary members to axially overlap one another more or less as desired. Rotation of the primary rotary member causes rotation of the secondary rotary member, since magnetic flux lines emanating from the permanent magnets mounted on the primary rotating member, cut through all, or part of, the electro-conductive material placed on the secondary rotary member. This can vary the torque transmitted between the two rotary members, thereby enabling the varying of the rotational speed of the secondary rotary member relative to the primary rotary member.
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: November 13, 2007
    Assignee: Flux Drive, Inc.
    Inventors: Philip Corbin, III, Robert L. Dahlin, John A. Molnar, John B. Rusconi, Walter F. Strong
  • Patent number: 7294948
    Abstract: A rotor-stator structure for electrodynamic machinery is disclosed to, among other things, minimize magnetic flux path lengths and to eliminate back-iron for increasing torque and/or efficiency per unit size (or unit weight) and for reducing manufacturing costs. In one embodiment, an exemplary rotor-stator structure can comprise a shaft defining an axis of rotation, and a rotor on which at least two magnets are mounted on the shaft. The two magnets can be cylindrical or conical magnets having magnetic surfaces that confront air gaps. In some embodiments, substantially straight field pole members can be arranged coaxially and have flux interaction surfaces formed at both ends of those field poles. Those surfaces are located adjacent to the confronting magnetic surfaces to define functioning air gaps, which are generally curved in shape.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: November 13, 2007
    Assignee: Novatorque, Inc.
    Inventors: Ken George Wasson, John Patrick Petro
  • Patent number: 7294949
    Abstract: A single-phase induction motor comprises a stator having a stator coil; an induction cage rotor rotatably inserted into a receiving groove of the stator, having a rotation shaft at a center thereof, having a plurality of first conductor bars at an outer peripheral portion thereof with the same interval in a circumferential direction, having a protrusion portion at an outer circumferential surface thereof, and having a plurality of second conductor bars installed at the protrusion portion in a circumferential direction; and a permanent magnet rotor free-rotatably installed between the stator and the induction cage rotor.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: November 13, 2007
    Assignee: LG Electronics Inc.
    Inventors: Seung-Do Han, Hyoun-Jeong Shin, Jae-Hong Ahn
  • Patent number: 7294950
    Abstract: An electrostatic actuator includes a stator having an electrode substrate, a movable unit having a movable element and an electrode arranged opposite to the electrode substrate, a plurality of first operation modules each of which issues an operation command for realizing a first operation, a plurality of second operation modules each of which issues an operation command for realizing a second operation, a module selector which selectively enables one first operation module of the first operation modules and selectively enables one second operation module of the second operation modules, an actuator drive module which generates a waveform signal on the basis of the operation command from the enabled first operation module and the operation command from the enabled second operation module and a switching circuit which converts the waveform signal into a voltage to apply the voltage to the electrode substrate.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: November 13, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mitsunobu Yoshida
  • Patent number: 7294951
    Abstract: A piezoelectric vibrator has a vibrator piece and a frame integral with the vibrator piece. The frame is connected to one end of and surrounds the vibrator piece. A lid has a surface anodically bonded to a first surface of the frame. The lid has a recessed portion at a position disposed opposite to and confronting the vibrator piece. A base has a surface anodically bonded to a second surface of the frame opposite the first surface thereof. The base has a recessed portion at a position disposed opposite to and confronting the vibrator piece. A beveled portion is formed around a surface of one of the lid and the base which does not correspond to the anodically bonded surface thereof.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: November 13, 2007
    Assignee: Seiko Instruments Inc.
    Inventors: Keiichi Oouchi, Susumu Yoshida, Shuji Yamane
  • Patent number: 7294952
    Abstract: A laminated-type piezoelectric element includes first electrode layers defining individual electrodes, second electrode layers defining common electrodes, and piezoelectric sheets sandwiched between the first and second electrode layers. The first and second electrode layers are laminated alternately. Each individual electrode has a substantially rectangle shape extending in a first direction. The individual electrodes defined in each first electrode layer are arranged at predetermined intervals in a second direction perpendicular to the first direction, to form a row. The common electrode includes a first portion having a band shape. The first portion overlaps the row when viewed in a plan view. The first portion has a pair of edges extending to be perpendicular to a long side of the rectangle shape of each individual electrode. Both ends of each individual electrode in the first direction protrude to outer positions than the edges, when viewed in the plan view.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: November 13, 2007
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Atsushi Ito
  • Patent number: 7294953
    Abstract: This invention provides a stacked piezoelectric element that has excellent durability and reliability by ensuring reliable electrical conduction between internal electrode layer and conductive adhesive, and a method of fabricating such a stacked piezoelectric element, wherein the stacked piezoelectric element 1 comprises: a ceramic stack 10 constructed by alternately stacking piezoelectric layers 11 made of a piezoelectric material and internal electrode layers 21, 22 having electrical conductivity; and external electrodes 32 bonded to the side faces 101 and 102 of the ceramic stack 10 via an electrically conductive adhesive 31.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: November 13, 2007
    Assignee: Denso Corporation
    Inventors: Akio Iwase, Shige Kadotani, Tetsuji Itou
  • Patent number: 7294954
    Abstract: This invention provides for a simple method of fabricating miniature electron multipliers, in an in-plane configuration suitable for use with miniature analytic instruments such as mass filters. The materials involved are predominantly silicon and compatible oxides, allowing the possibility of integration with a mass filter formed in a similar materials system. The materials are selected simultaneously to withstand high voltages and to enhance secondary electron emission. Fabrication is based on standard planar processing methods. These methods also allow the construction of an integrated set of bias resistors in a multi-electrode device, so that the device may be operated from a single high-voltage source.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: November 13, 2007
    Assignee: Microsaic Systems Limited
    Inventor: Richard Syms
  • Patent number: 7294955
    Abstract: An electrode for an electron gun and an electron gun using same are provided which make use of stable carbon material having small work function and which permit orientation control to be achieved and which can be manufactured at a low cost. An electrode for an electron gun uses carbon electrode(s) formed from amorphous carbon and carbon nanotubes or carbon nanofibers and molded in linear shape. The carbon electrode is obtained by mixing a resin composition such as chlorinated vinyl chloride resin, furan resin, etc., which forms non-graphitizing carbon after carbonizing, with a carbon powder such as carbon nanotubes or carbon nanofibers and, after extrusion, molding and carbonizing the molding obtained.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: November 13, 2007
    Assignee: Mitsubishi Pencil Co., Ltd.
    Inventors: Morinobu Endou, Yoshihisa Suda, Osamu Shimizu
  • Patent number: 7294956
    Abstract: The semiconductor light emitting device is composed of a combination of a near ultraviolet LED and a phosphor layer including a plurality of phosphors for absorbing near ultraviolet emitted by the near ultraviolet LED and for emitting fluorescence having an emission peak in a visible wavelength region, and the phosphor layer includes four kinds of phosphors, that is, a blue-based phosphor, a green-based phosphor, a red-based phosphor and a yellow-based phosphor. Thus, lowering of luminous flux derived from red-based light with low luminosity is compensated by yellow-based light with comparatively high luminosity, and the resultant white-based light can be well color balanced, and hence, a semiconductor light emitting device emitting white-based light with high luminous flux and a large Ra can be obtained.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: November 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshihide Maeda, Shozo Oshio, Katsuaki Iwama, Hiromi Kitahara
  • Patent number: 7294957
    Abstract: Provided is a flat lamp which includes a lower substrate and an upper substrate that form discharge space therebetween disposed facing each other, a plurality of discharge electrodes formed at least on one of the lower substrate and the upper substrate, a plurality of spacers that form a plurality of discharge cells by defining the discharge space, and disposed parallel to the discharge electrodes between the lower substrate and the upper substrate, a plurality of auxiliary electrodes, to which a voltage is induced by applying a voltage to the discharge electrodes, formed on a surface of the spacers, and a fluorescent layer formed on an inner wall of the discharge cells.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: November 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gi-young Kim, Seong-eui Lee, Hyoung-bin Park
  • Patent number: 7294958
    Abstract: An electrode substrate of a flat panel display at least comprises a substrate, an electrode layer, a first barrier layer, a second barrier layer and a conductive layer. The electrode layer is disposed above the substrate. The first barrier layer is disposed above the electrode layer. The second barrier layer is disposed above the first barrier layer. The conductive layer is disposed between the first barrier layer and the second barrier layer.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: November 13, 2007
    Assignee: Rit Display Corporation
    Inventors: Chao Chin Wu, Meng-Chieh Liao, Jiun-Haw Lee
  • Patent number: 7294959
    Abstract: A full-color organic light-emitting diode (OLED) device, comprising: a) a plurality of light emitting OLED pixels, each pixel having three or more color light-emitting elements for emitting different colors of light specifying a gamut and at least one additional light-emitting element for emitting a color of light within the gamut and wherein the power efficiency of the additional element is higher than the power efficiency of at least one of the three or more gamut elements; and b) a patterned neutral density filter selectively filtering the emitted light from the additional light emitting element.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: November 13, 2007
    Assignee: Eastman Kodak Company
    Inventors: Ronald S. Cok, Michael L. Boroson
  • Patent number: 7294960
    Abstract: An organic EL device comprises a plurality of organic EL elements, each of which has a pair of electrodes and functional layers including at least a light-emitting layer between the electrodes. With respect to components other than the light-emitting layer, the structure of the functional layer in one organic EL element among the organic EL elements is different from those of the functional layers in other organic EL elements.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: November 13, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Shunichi Seki, Masahiro Uchida
  • Patent number: 7294961
    Abstract: A photo-radiation source for the selective polymerization of photo-radiation-curable organic material. In a first embodiment, a first electrode is provided with a second electrode disposed adjacent to the first electrode, and defining a gap therebetween. A photo-radiation emission layer is disposed in the gap. The photo-radiation emission layer includes a charge-transport matrix material and an emissive particulate dispersed within the charge-transport matrix material. The emissive particulate receives electrical energy through the charge-transport matrix material applied as a voltage to the first electrode and the second electrode photo-radiation. The emissive particulate generates photo-radiation in response to the applied voltage. This photo-radiation is effective for the selective polymerization of photo-radiation curable organic material.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: November 13, 2007
    Assignee: Articulated Technologies, LLC
    Inventors: John James Daniels, Gregory Victor Nelson
  • Patent number: 7294962
    Abstract: The invention is directed to an improved organic electroluminescent device. In one embodiment, the OLED includes a thin film transistor formed in a non-emission region on an insulating substrate that also includes source and drain electrodes. The OLED further includes a lower electrode formed in an emission region on the insulating substrate and connected to one electrode of the source/drain electrodes through a contact hole. The OLED yet further includes an organic emission layer formed in the emission region on the lower electrode, and an upper electrode formed on the organic emission layer, wherein the lower electrode has a surface with its corners rounded off. The lower electrode acts as a pixel electrode. Having its surface with corners rounded off prevents short-induced defects caused by outgassing.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: November 13, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Mu-Hyun Kim, Kyong-Do Kim
  • Patent number: 7294963
    Abstract: An electro-luminescence display device includes a connection film being connected to a driving circuit, a pad connected to the connection film in order to supply a driving signal from the driving circuit to a signal line formed on a substrate, a conductive film for connecting the connection film to the pad, and a plurality of dummy pads. Each dummy pad includes a transparent conductive layer. At least one of the dummy pads is formed to expose the transparent conductive layer in order to test an adhesive level of the connection film and the pad by the conductive film.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: November 13, 2007
    Assignee: LG Electronics Inc.
    Inventors: Jung Hwan Lee, Hyo Dae Bae
  • Patent number: 7294964
    Abstract: A display which does not require color filters, has low optical losses, and is not heavy and large, and a method for displaying an image using the display includes a substrate on one side of which sub-pixels are arranged. Each sub-pixel includes two opposite electrodes and an emitter layer which is interposed between the two electrodes. The emitter layer receives the light projected from an excitation light source, and is able to radiate photoluminescence light. The photoluminescence light from the emitter layer may be controllably quenched by an electrical field formed by the electrodes.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: November 13, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Michael Redecker
  • Patent number: 7294965
    Abstract: A color-conversion light-emitting device includes a color-conversion layer for converting a wavelength distribution of light, a light-emitting unit formed on the color-conversion layer and having a pair of transparent electrodes and an organic EL light-emitting layer disposed between the transparent electrodes, and a color filter layer formed on the light-emitting unit. The color-conversion light-emitting device may further include a reflective layer, a wavelength selection mirror, a second color-conversion layer, or a passivation layer.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: November 13, 2007
    Assignee: Fuji Electric Holding Co., Ltd.
    Inventors: Makoto Kobayashi, Koji Kawaguchi
  • Patent number: 7294966
    Abstract: An EL panel on a rigid substrate is thinned in selected areas, or overall, to provide a backlight for keypads and other applications that would otherwise require a more flexible panel or additional structure. Lamp materials are deposited on one side of a rigid substrate and then substrate material is ablated with a suitable tool, working from the opposite side of the substrate as the lamp materials. The depth of cut can be constant or variable, enabling one to tailor the flexibility of an area to the desired tactile response for a keypad or to provide clearance in close quarters. The invention is compatible with known process for making an EL panel.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: November 13, 2007
    Assignee: World Properties, Inc.
    Inventor: Rodney T. Eckersley
  • Patent number: 7294968
    Abstract: There is provided a vehicular lamp that can be miniaturized by reducing signal lines connected to a vehicle main body.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: November 13, 2007
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Masayasu Ito, Hitoshi Takeda
  • Patent number: 7294969
    Abstract: Disclosed is a high-frequency discharge plasma generation-based two-stage Hall-effect plasma accelerator, which comprises an annular acceleration channel having a gas inlet port, a high-frequency wave supply section, an anode, a cathode, a neutralizing electron generation portion and a magnetic-field generation element, wherein: gas introduced from the gas inlet port into the annular acceleration channel is ionized by a high-frequency wave supplied from the high-frequency wave supply section, to generate plasma; a positive ion includes in the generated plasma is accelerated by an acceleration voltage applied between the anode and cathode, and ejected outside; and an electron included in the generated plasma is restricted in its movement in the axial direction of the annular acceleration channel by an interaction with a magnetic field.
    Type: Grant
    Filed: June 1, 2005
    Date of Patent: November 13, 2007
    Assignee: Japan Aerospace Exploration Agency
    Inventor: Hitoshi Kuninaka
  • Patent number: 7294970
    Abstract: A light emitting diode (LED) driver drives a plurality of LEDs, and includes a plurality of LED drivers with inherent addresses thereof respectively driving the plurality of LEDs; a serial bus connected to the plurality of LED drivers; and a sequence controller serially transmitting a control signal for driving the plurality of LEDs and the inherent addresses, allowing the plurality of LED drivers to be sequentially driven, in the form of digital data through the serial bus. Thus, the LED driver accomplishes appropriate response speed corresponding to a human eye's recognition limit. Further, the LED driver provides easy fabrication, small size and lower production cost. The LED driver generates less noise while large current and high voltage fluctuate. Also, the LED driver automatically detects malfunction and automates initial current setting for production.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: November 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Joon-hyun Yang