Abstract: The present invention relates to methods, reagents, and substrates that can be used for, for example, immobilizing biomolecules, such as nucleic acids and proteins. In an embodiment, the present invention relates to surfaces coated with a polymer according to the present invention. In an embodiment, the present invention relates to methods for thermochemically and/or photochemically attaching molecules to a surface at a high density.

Abstract: Provided are crystals relating to Protein kinase B?/AKT1 and its various uses.

Abstract: The present invention provides An isolated polypeptide which has proline specific endoprotease activity, selected from the group consisting of:(a) a polypeptide which has an amino acid sequence which has at least 40% amino acid sequence identity with amino acids 1 to 526 of SEQ ID NO:2 or a fragment thereof;(b) a polypeptide which is encoded by a polynucleotide which hybridizes under low stringency conditions with (i) the nucleic acid sequence of SEQ ID NO:1 or a fragment thereof which is at least 80% or 90% identical over 60, preferably over 100 nucleotides, more preferably at least 90% identical over 200 nucleotides, or (ii) a nucleic acid sequence complementary to the nucleic acid sequence of SEQ ID NO:1.

Abstract: The present invention relates generally to proteinase inhibitors, a precursor thereof and to genetic sequences encoding same. More particularly, the present invention relates to isolated monomers of a type II serine proteinase inhibitor.

Abstract: Alanine 2,3-aminomutase sequences are disclosed, as are cells having alanine 2,3-aminomutase activity and methods of selecting for such cells. Methods for producing beta-alanine, pantothenate, 3-hydroxypropionic acid, as well as other organic compounds, are disclosed.

Abstract: This invention relates to Equine Herpes Viruses (EHV) wherein the protein gM is essentially absent or modified and non-functional with respect to its immunomodulatory capacity. Further aspects of the invention relate to nucleic acids coding said viruses, pharmaceutical compositions comprising these viruses or nucleic acids and uses thereof. The invention also relates to methods for improving the immune response induced by an EHV vaccine against wild type EHV infections, methods for the prophylaxis and treatment of EHV infections and methods for distinguishing wild type EHV infected animals from animals treated with EHV's according to the invention.

Abstract: A method and apparatus for effectively aerating large-scale cultures of microorganisms is disclosed.

Abstract: The present invention is directed to sialytransferases, such as SiaA sialytransferases isolated from Haemophilus influenzae. Further provided herein are methods for producing sialylated lipooligosaccharides, vaccines, and host cells and systems for the production of sialylated lipooligosaccharides.

Abstract: rDNA corresponding to an endosymbiotic bacteria associated with Ecteinascidia turbinata has been identified. The bacterium appears to be responsible for the biosynthesis of ecteinascidin compounds. The 16S rDNA sequence corresponding to Candidatus Endoecteinascidia frumentensis SEQ ID NO: 1 has been deposited in GeneBank with the accession number AY054370.

Abstract: The present invention provides compositions and methods designed to increase value output of a fermentation reaction. In particular, the present invention provides a business method of increasing value output of a fermentation plant. The present invention also provides a modified fermentation residual of higher commercial value. Also provided in the present invention are complete animal feeds, nutritional supplements comprising the subject ferment residuals. Further provided by the present invention is a method of performing fermentation, a modified fermentative microorganism and a genetic vehicle for modifying such microoganism.

Abstract: Multiwell plates with lids that reduce evaporation in the wells adjacent the edge of the plates are disclosed. The lids control the amount of evaporation from the multiwell plate.

Abstract: The present invention provides polypeptides that bind cellular receptors for vascular endothelial growth factor polypeptides; polynucleotides encoding such polypeptides; compositions comprising the polypeptides and polynucleotides; and methods and uses involving the foregoing. Some polypeptides of the invention exhibit unique receptor binding profiles compared to known, naturally occurring vascular endothelial growth factors.

Abstract: An isolated DNA encoding the enzyme I-SceI is provided. The DNA sequence can be incorporated in cloning and expression vectors, transformed cell lines and transgenic animals. The vectors are useful in gene mapping and site-directed insertion of genes.

Abstract: The present invention provides methods and compositions for treating hypercholesterolemia using therapeutic apoE proteins. A therapeutic apoE protein is a naturally-occurring apoE protein (e.g., apoE1, apoE2, apoE2*, apoE2**, apoE3, and apoE4) that has one or more amino acid substitutions in the carboxy-terminal region which, when administered to a mammal having hypercholesterolemia, reduces the plasma cholesterol levels without inducing hypertriglyceridemia. The invention also provides a method for reducing plasma cholesterol using low doses of naturally-occurring apoE proteins.

Abstract: The invention provides a method of monitoring platelet function in a mammal by passing blood removed from the body of the mammal through a passageway to contact an obstruction or irregularity in the passageway to generate a platelet mass in the passageway, and monitoring the flow or composition of the blood in the passageway to detect the platelet mass. The flow and composition change in response to the formation of a platelet mass in the passageway. Devices, articles, and kits for performing the methods are also disclosed.

Abstract: A method of identification and quantitative analysis of aldehydes and/or ketones in a sample by mass spectrometry using stable isotope labeled oxime internal standards or stable isotope labeled hydrazone internal standards is provided. Stable isotope labeled oxime internal standards are synthesized by reaction of an authentic sample of aldehydes and/or ketones with a stable isotope labeled alkoxylamine reagent while stable isotope labeled hydrazone internal standards are synthesized by reaction of an authentic sample of aldehydes and/or ketones with a stable isotope labeled alkylhydrazine reagent. A non labeled version of the stable isotope labeled reagent is used to convert aldehydes and/or ketones in the sample to the non labeled version of the stable isotope labeled oxime or hydrazone internal standards.

Abstract: The invention relates to the detection of oxidation of carbon-containing fibers or fiber bundles embedded in a nonconductive or semiconducting ceramic matrix in composites wherein use is made of the eddy current method.

Abstract: The present invention relates to dynamically controlling the expansion of a fluid bed reactor system. By mounting a density detector to a floating body that floats on top of the carrying medium in the fluid bed, one can detect the density at a certain position that is level with the sensor head of the detector. Upon comparing the density detected with a pre-determined density, the flow velocity of the carrying medium is adjusted accordingly.

Abstract: A test strip and method for detecting an analyte present in a sample.

Abstract: The invention relates to compositions and methods for detecting biomolecular interactions. The detection can occur without the use of labels and can be done in a high-throughput manner. The invention further relates to self-referencing colorimetric resonant optical biosensors and optical devices.

Abstract: The present invention relates to hydrophilic, high quantum yield acridinium compounds. It has been discovered that the placement of electron-donating groups in the acridinium ring system increases the amount of light that is emitted by the corresponding acridinium compound when its chemiluminescence is triggered by alkaline peroxide. More specifically, it has been found that the placement of one or two hydrophilic, alkoxy groups at the C-2 and/or C-7 position of the acridinium ring system of acridinium compounds increases their quantum yield and enhances the aqueous solubility of these compounds. The present hydrophilic, high quantum yield, acridinium compounds are useful chemiluminescent labels for improving the sensitivity of immunoassays.

Abstract: A method is disclosed to effectively achieve a low deposition temperature of CMO memory materials by depositing the CMO memory material at relatively low temperatures that give an amorphous film, then to later melt and re-crystallize the CMO memory material with a laser (laser annealing).

Abstract: The invention relates to a method for fabricating a reference layer for MRAM memory cells and an MRAM memory cell equipped with a reference layer of this type. A reference layer of this type comprises two magnetically coupled layers having a different Curie temperature. When cooling from a temperature above the Curie temperature TC1 of the first layer in an external magnetic field, the magnetization of the second layer is oriented by a second-order phase transition along the field direction of the external magnetic field. Upon further cooling below the Curie temperature TC2 of the second layer, the latter is oriented antiparallel with respect to the first layer as a result of the antiferromagnetic coupling between the two layers.

Abstract: A semiconductor processing system is provided. The semiconductor processing system includes a first sensor configured to isolate and measure a film thickness signal portion for a wafer having a film disposed over a substrate. A second sensor is configured to detect a film thickness dependent signal in situ during processing, i.e. under real process conditions and in real time. A controller configured to receive a signal from the first sensor and a signal from the second sensor. The controller is capable of determining a calibration coefficient from data represented by the signal from the first sensor. The controller is capable of applying the calibration coefficient to the data associated with the second sensor, wherein the calibration coefficient substantially eliminates inaccuracies introduced to the film thickness dependent signal from the substrate. A method for calibrating an eddy current sensor is also provided.

Abstract: The present invention provides an light-emitting element in which an organic compound layer containing a carbonate, for example Cs2CO3 and Li2CO3, as a dopant is in substantially electrical contact with a cathode by providing an organic compound layer having a dopant easy in handling so as to bring the organic compound layer into contact with the cathode. The light-emitting element includes a pair of electrodes sandwiching the organic compound layer, which is a co-evaporation layer of an organic compound and the carbonate.

Abstract: The invention relates to methods for preparing a removable system on a mother substrate. The method deposits a high surface to volume sacrificial layer on a mother substrate and stabilizes the sacrificial layer by a) removing volatile chemical species in and on the sacrificial layer and/or b) modifying the surface of the layer. The method coats over the sacrificial layer with a capping medium. A system is the fabricated on the capping medium. The method provides through holes to access the sacrificial layer. The method may also apply a top layer onto the system to form a covered system. The invention also includes the step of removing the sacrificial layer to release the system from the mother substrate. Methods of the invention also include selectively removing a portion of the system and capping layers to form void regions defining an array of islands composed of device, structure, or system and capping layer regions, and optionally filling the island-defining void region with a sacrificial material.

Abstract: A method of fabricating a nanowire CHEMFET sensor mechanism includes preparing a silicon substrate; depositing a polycrystalline ZnO seed layer on the silicon substrate; patterning and etching the polycrystalline ZnO seed layer; depositing an insulating layer over the polycrystalline ZnO seed layer and the silicon substrate; patterning and etching the insulating layer to form contact holes to a source region and a drain region; metallizing the contact holes to form contacts for the source region and the drain region; depositing a passivation dielectric layer over the insulating layer and the contacts; patterning the passivation layer and etching to expose the polycrystalline ZnO seed layer between the source region and the drain region; and growing ZnO nanostructures on the exposed ZnO seed layer to form a ZnO nanostructure CHEMFET sensor device.

Abstract: An integrated circuit package system includes providing a substrate. An integrated circuit is attached to the substrate. A plurality of support bars is formed on the substrate. A plurality of adhesive structures is formed. A heat sink is attached to the plurality of adhesive structures. The integrated circuit is encapsulated. The support bars are removed.

Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.

Abstract: Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.

Abstract: A method for fabricating metal oxide semiconductor with lightly doped drain. In the method, the gate electrode, the LDD of the n-type MOS TFT, and the source/drain electrode of the p-type MOS TFT are defined simultaneously in one photolithography step. The contact holes and the source/drain electrode of the n-type MOS TFT are also defined simultaneously in one photolithography step. The invention employs only six photolithography steps to manufacture the metal oxide semiconductor, such as TFT, with lightly doped drain, thereby avoiding alignment errors, further improving yield and increasing throughput.

Abstract: A method of forming a semiconductor structure including a plurality of finFFET devices in which crossing masks are employed in providing a rectangular patterns to define relatively thin Fins along with a chemical oxide removal (COR) process is provided. The present method further includes a step of merging adjacent Fins by the use of a selective silicon-containing material. The present invention also relates to the resultant semiconductor structure that is formed utilizing the method of the present invention.

Abstract: A nitride layer of the gate mask for the semiconductor device is deposited at a temperature higher than 750 deg. C so as to release hydrogen from the nitride layer. Alternatively, a nitride layer of the gate mask for the semiconductor device is deposited in a gas atmosphere with use of an ammonia gas and a silane gas such that a flow rate of the ammonia gas is set at least twenty times or greater than that of the silane gas. Accordingly, the problem with respect to the threshold voltages Vt of the semiconductor devices varying greatly from device to device when the polysilicon layer or the amorphous silicon layer is formed in the vicinity of the nitride layer and is doped with Group III impurities, will be solved.

Abstract: A semiconductor device is formed as part of an integrated circuit. The semiconductor device, which is formed in an active semiconductor layer, is surrounded by a guardian that provides a diffusion barrier against contaminants and also provides assistance in avoiding dishing above the semiconductor device during chemical mechanical polishing. The dielectric that is above the semiconductor device and inside the guardian is etched to form an opening that receives one of an optical fiber, an electromagnetic signal source, or an electromagnetic signal load. The remaining dielectric is in layers that are of substantially uniform thickness. The guardian is built up in layers that are part of a normal integrated circuit process. These include contact layers, via layers, and interconnect layers.

Abstract: In a method for fabricating a semiconductor device in which a semiconductor memory element having an ONO film and a CMOS part are formed on a single semiconductor substrate, a CMOS gate-oxidation step is performed several times. Thereafter, a bit line diffusion layer and a bit line oxide film are formed in the semiconductor memory element.

Abstract: Systems in accordance with the present invention can include a tip contactable with a media, the media including a substrate and a plurality of cells disposed over the substrate, one or more of the cells being electrically isolated from the other of the cells by a material having insulating properties. One or more of the plurality of cells can include a phase change material. The media is either grounded or electrically connected with a voltage source such that when the tip is placed in contact with the media and a voltage is applied to the tip, a current is drawn through the cell over which the tip is arranged. The current is drawn through the isolated cell at least a portion of the phase change material within the cell beneath the tip is heated to a sufficient temperature such that the material become amorphous in structure. The current is then removed from the phase change material, which is quickly cooled to form an amorphous domain having a resistance representing a “1” (or a “0”).

Abstract: A method of fabricating a nonvolatile memory cell includes providing a substrate with a trench, with a sidewall where a tunnel oxide layer and a floating gate are successively formed, forming a control gate in the trench, performing a high density plasma deposition process to form an HDP oxide layer on the top surface of control gate.

Abstract: First and second impurity doped regions are formed in a semiconductor substrate. A first gate electrode is formed on the first impurity doped region with a first gate insulation film interposed therebetween. A second gate electrode is formed on the second impurity doped region with a second gate insulation film interposed therebetween. A first sidewall insulation film is formed on either side of the first gate electrode. A second sidewall insulation film has a thickness different from that of the first sidewall insulation film and are formed on either side of the second gate electrode. A third sidewall insulation film is formed on the first sidewall insulation film on the side of the first gate electrode. A fourth sidewall insulation films have a thickness different from that of the third sidewall, insulation film and are formed on the second sidewall insulation film on the side of the second gate electrode.

Abstract: A semiconductor substrate is patterned to form a depression and prominence. A floating gate is formed so as to cover at least both sidewalls of the prominence of the depression and prominence, and is then etched to form a trench for a device isolation self-aligned with the floating gate. Related structures are also described.

Abstract: Integrated circuit field effect transistors are manufactured by forming a pre-active pattern on a surface of a substrate, while refraining from doping the pre-active pattern with phosphorus. The pre-active pattern includes a series of interchannel layers and channel layers stacked alternately upon each other. Source/drain regions are formed on the substrate, at opposite ends of the pre-active pattern. The interchannel layers are then selectively removed, to form tunnels passing through the pre-active pattern, thereby defining an active channel pattern including the tunnels and channels including the channel layers. The channels are doped with phosphorus after selectively removing the interchannel layers. A gate electrode is then formed in the tunnels and surrounding the channels.

Abstract: The present invention pertains to a high-voltage MOS device. The high-voltage MOS device includes a substrate, a first well, a first field oxide layer enclosing a drain region, a second field oxide enclosing a source region, and a third field oxide layer encompassing the first and second field layers with a device isolation region in between. A channel region is situated between the first and second field oxide layers. A gate oxide layer is provided on the channel region. A gate is stacked on the gate oxide layer. A device isolation diffusion layer is provided in the device isolation region.

Abstract: A structure and method of fabrication of a semiconductor device having a stress relief layer under a stress layer in one region of a substrate. In a first example, a stress relief layer is formed over a first region of the substrate (e.g., PFET region) and not over a second region (e.g., NFET region). A stress layer is over the stress relief layer in the first region and over the devices and substrate/silicide in the second region. The NFET transistor performance is enhanced due to the overall tensile stress in the NFET channel while the degradation in the PFET transistor performance is reduced/eliminated due to the inclusion of the stress relief layer. In a second example embodiment, the stress relief layer is formed over the second region, but not the first region and the stress of the stress layer is reversed.

Abstract: A semiconductor component comprises a first semiconductor region (110, 310), a second semiconductor region (120, 320) above the first semiconductor region, a third semiconductor region (130, 330) above the second semiconductor region, a fourth semiconductor region (140, 340) above the third semiconductor region, a fifth semiconductor region (150, 350) above the second semiconductor region and at least partially contiguous with the fourth semiconductor region, a sixth semiconductor region (160, 360) above and electrically shorted to the fifth semiconductor region, and an electrically insulating layer (180, 380) above the fourth semiconductor region and the fifth semiconductor region. A junction (145, 345) between the fourth semiconductor region and the fifth semiconductor region forms a zener diode junction, which is located only underneath the electrically insulating layer. In one embodiment, a seventh semiconductor region (170) circumscribes the third, fourth, fifth, and sixth semiconductor regions.

Abstract: The RF impedance of a metal trace at gigahertz frequencies is reduced by forming the metal trace to have a base region and a number of fingers that extend away from the base region. When formed to have a number of loops, the metal trace forms an inductor with an increased Q.

Abstract: A method is provided for fabricating an integrated circuit. According to the method, hollow isolating trenches are produced within a substrate, and active components are produced in and on active areas of the substrate that are between the trenches. The trenches are produced in an initial phase carried out before production of the active components and a final phase carried out after production of the active components. In the initial phase, trenches are formed in the substrate, and the trenches are filled with a fill material. In the final phase, the active components are encapsulated, accesses are created through the encapsulation material to each filled trench, the fill material is removed through each access, and the opening of each trench is plugged through the corresponding access. Also provided is an integrated that includes hollow isolating trenches within a substrate.

Abstract: A method for rounding the bottom corners of a trench is described. In the method, an etching process is performed using a fluorocarbon compound with at least two carbon atoms, He and O2 as an etching gas to round the bottom corners of the trench.

Abstract: A method for forming quantum dots includes forming a superlattice structure that includes at least one nanostrip protruding from the superlattice structure, providing a quantum dot substrate, transferring the at least one nanostrip to the quantum dot substrate, and removing at least a portion of the at least one nanostrip from the substrate. The superlattice structure is formed by providing a superlattice substrate, forming alternating layers of first and second materials on the substrate to form a stack, cleaving the stack to expose the alternating layers, and etching the exposed alternating layers with an etchant that etches the second material at a greater rate than the first to form the at least one nanostrip.

Abstract: A system and method are provided to fabricate thin-films having different physical property parameters or having physical property parameters that continuously change across functionally broadband monolithic device arrays. The fabrication method deposits the thin-film including layers on a substrate of a monolithic chip. The method defines a desired gradient profile of each layer forming the thin-film, each gradient profile including a desired thinnest profile and a desired thickest profile. The method further aligns an aperture of a mask over the substrate to form the thin-film and calculates a shutter speed for the specified gradient profile of each layer across the desired area of the substrate, and deposits each layer on the substrate, through the aperture, as the aperture of the shutter moves at the calculated shutter speed from the desired thinnest profile of each layer to the desired thickest profile of each layer.

Abstract: The semiconductor thin film crystallization method comprises the step of forming a semiconductor thin film 14 over a substrate 10; the step of forming band-shaped portion 16 for blocking crystal growth of the semiconductor thin film in the semiconductor film or over the semiconductor film; and the step of causing an energy beam 18 of a continuous wave to scan in a direction intersecting the longitudinal direction of the portion for blocking crystal growth. The energy beam is caused to scan, intersecting the portion for blocking the crystal growth, whereby the crystal growth can be interrupted when the application region of the energy beam intersects the portions for blocking the crystal growth. Even when a solid semiconductor thin film which is not patterned in islands is crystallized, the semiconductor thin film of good crystals can be formed with high yields while the film is prevented from peeling.

Abstract: A feature in a layer is provided. A photoresist layer is formed over the layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls, where the photoresist features have a first critical dimension. A fluorine-containing conformal layer is deposited over the sidewalls of the photoresist features to reduce the critical dimensions of the photoresist features. Fluorine is removed from the conformal layer, while the remaining conformal layer is left in place. Features are etched into the layer, wherein the layer features have a second critical dimension, which is less than the first critical dimension.