Patents Issued in January 29, 2008
  • Patent number: 7325199
    Abstract: A method of manipulating a time based stream of information through use of a user interface to generate a presentation is provided in which a processing system is employed. The methods use references to a selected time based stream of information as editing tools. The user interface has functionality to display only a single time line for aligning reference elements to visual time based stream of information. The references may include a variety of edit features that enhance the presentation. Some mechanisms for moving the reference elements on the user interface are drag and drop and/or cut and paste procedures. Other aspects of the present invention relating to the processing system providing convenient user interface and editing tools for use in authoring a presentation of a time based stream of information are also described.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: January 29, 2008
    Assignee: Apple Inc.
    Inventor: Glenn Reid
  • Patent number: 7325200
    Abstract: A user interface system comprises a server having a scene description converting device for converting scene description containing input user interaction into converted scene description while leaving parts containing the user interaction and a scene description decoding device for decoding converted scene description into decoded scene description, a remote terminal having a scene description decoding device for decoding scene description and converted scene description sent from the server and a display device for displaying decoded scenes and a user input device for receiving user input according to this display, and a display terminal for displaying decoded scenes sent from the server. Thus, decoding can be enabled at terminals having inferior decoding capabilities and display capabilities.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: January 29, 2008
    Assignee: Sony Corporation
    Inventors: Shinji Negishi, Hideki Koyanagi, Yoichi Yagasaki
  • Patent number: 7325201
    Abstract: A data-driven, hierarchical information search and navigation system and method enable search and navigation of sets of materials by certain common attributes that characterize the materials. A rules engine provides for manipulation of the content displayed to the user based on the query entered by the user. The rules engine includes one or more rules with a trigger and an action. The action of a rule is performed only if the trigger is satisfied. A trigger may be specified in terms of expressions of attribute-value pairs and is evaluated against a given query or navigation state. The actions can include various techniques for content manipulation, such as supplementing content, rendering content in a particular way, and sorting content in a particular way. An action may be specified in terms of navigation states. The rules engine may include a script for processing the rules.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: January 29, 2008
    Assignee: Endeca Technologies, Inc.
    Inventors: Adam J. Ferrari, David J. Gourley, Keith A. Johnson, Frederick C. Knabe, Vinay B. Mohta, Daniel Tunkelang, John S. Walter, Andrew Lau
  • Patent number: 7325202
    Abstract: A computer system having a user specified web browsing system for selectively retrieving content from a variety of web sites is disclosed. The web browser of the present invention is configured to track multiple web sites at any given time to determine content updates in these web sites. In one embodiment of the present invention, the web browser automatically periodically checks user specified web sites, detects changes to content at these web sites, filters out unimportant changes and delivers a summary of the changes to the user.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: January 29, 2008
    Assignee: Sun Microsystems, Inc.
    Inventor: Kenneth Shirriff
  • Patent number: 7325203
    Abstract: A method and apparatus for customizing a graphical user interface on a multifunction peripheral is provided. User interface specification data is transmitted from a device to the multifunction peripheral. User interface specification data defines a desired display and operation behavior for the user interface. Result data is received at the device from the multifunction peripheral. Result data defines whether the user interface was updated to reflect the user interface specification data. Other aspects provide for copying the graphical user interface from a source multifunction peripheral to a destination multifunction peripheral, scheduling a point in time to update one or more graphical user interfaces to reflect the user interface specification data, and establishing a number of uses to apply the user interface specification data to the one or more user interfaces.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: January 29, 2008
    Assignee: Ricoh Company, Ltd.
    Inventor: Seiichi Katano
  • Patent number: 7325204
    Abstract: An apparatus, method, computer system, and computer program product that provide a slideout window. The slideout window presents content related to original content displayed in a host window when the user clicks on the original content. The related content can be displayed such that the related content is visually associated with the content in the host window to which it is related. In one embodiment, a click on a link within the host window to view the slideout window does not close the host window or other windows. The host window can remain open so that the user can simultaneously view the original content to which the related content in the slideout window is related. A main browser window simultaneously displaying another web page can remain open with the web page unchanged when the slideout window is presented. The slideout window can provide a link to additional related content.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: January 29, 2008
    Assignee: Yahoo! Inc.
    Inventor: Rachel Johnston Rogers
  • Patent number: 7325205
    Abstract: The invention relates to an apparatus and method for processing bank notes, in particular for singling, counting, sorting and testing the authenticity of bank notes or papers of value, which can be operated in a plurality of operating modes and wherein a display device is provided for selecting and displaying the operating modes. Such an apparatus and method are to be improved in such a way that the operator prompting can be learned easily and fast, without any sacrifice of flexibility. This is obtained by designing the display device to display icons having variable functions associated therewith that arc selectable by an input device.
    Type: Grant
    Filed: December 6, 2000
    Date of Patent: January 29, 2008
    Assignee: Giesecke & Devrient GmbH
    Inventors: Volker Düvel, Hans Bomm, Raimund Herberg
  • Patent number: 7325206
    Abstract: An electronic design is generated for an integrated circuit that is to be fabricated in accordance with the electronic design by a process that will impart topographically induced feature dimension variations to the integrated circuit. The generating includes adjusting the electronic design based on predictions of topographical and topographical-related feature dimension variations by a pattern-dependent model. An RC extraction tool is used in conjunction with the generating and adjusting of the electronic design. The process includes a fabrication process that will impart topographical variation to the integrated circuit and a lithography or etch process. Placement attributes for elements of the integrated circuit are determined.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: January 29, 2008
    Assignee: Cadence Design Systems, Inc.
    Inventors: David White, Taber H. Smith
  • Patent number: 7325207
    Abstract: The method and apparatus for analysis of integrated circuits using static timing analysis. For a circuit being analyzed, the value of the state net for the case of an undriven sensitization is resolved to a Hi/Lo logic on the output net and the sensitization is added to the appropriate pull-up/pull-down function on the output net. Furthermore, in the sensitization generation, the “present” state logic function at the output net is determined by the “previous” state variable of the sequential state net and the “present” state variables of the rest of the inputs to the sequential circuit. The “next” state logic function at the output net is determined by the “present” state variable of the sequential state net and the “next” state variables of the rest of the inputs to the sequential circuit. This variable is resolved as a function of “previous” state net variable and “present” state input net variables.
    Type: Grant
    Filed: December 9, 2004
    Date of Patent: January 29, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Bhaskar Subramanian, Manish Singh
  • Patent number: 7325208
    Abstract: Embodiments of the present invention provide a method, apparatus and system for inductance modeling. According to some exemplary embodiments, a method for inductance modeling may include determining a plurality of two-dimensional mutual inductance values corresponding to a designated victim within a geometrical event and a plurality of designated attackers, respectively. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: January 29, 2008
    Assignee: Intel Corporation
    Inventors: Sourav Chakravarty, Yaakov Ben-Noon, Eli Chiprout, Mohiuddin Mazumder, Dmitry Messerman
  • Patent number: 7325209
    Abstract: This invention is a high-level language to specify electronic system design patterns for functional verification. This invention includes automatic translation of the high-level language specification into assertion code from these patterns and temporal properties for design verification. This eliminates the need to code extra RTL to handle features such as pipelines and bus priorities. Such common features are specified only in high-level patterns and temporal properties to be verified. This is advantageous because less verification code to be written, automated synthesis of assertions enforces monitor-style of writing assertions rather than generator-style, and the high-level code can be seamlessly migrated to another verification tool by producing another code generator for the new assertion language.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: January 29, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Raj Shekher Mitra, Praveen Tiwari, Manish Kumar Saluja
  • Patent number: 7325210
    Abstract: A hybrid linear wire model for tuning the transistor widths of circuits linked by RC interconnects is described. The method uses two embedded simulators during the tuning process on netlists that contain resistors (Rs). A Timing oriented simulator is used only for timing purposes on the original netlist that includes all the Rs. A Gradient oriented simulator is then run only on the modified netlist with all Rs shorted and within the iterative loop of the tuner to compute gradients. The present hybrid method achieves a significant improvement in computational speed. The Timing oriented simulator is fast and accurate for only timing netlists with Rs, but cannot compute gradients efficiently. The Gradient oriented simulator computes gradients efficiently but cannot do so in the presence of Rs.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: January 29, 2008
    Assignee: International Business Machines Corporation
    Inventors: Vasant Rao, Cindy Washburn, Jun Zhou, Jeffrey P. Soreff, Patrick M. Williams, David J. Hathaway
  • Patent number: 7325211
    Abstract: A method for determining clock skew to avoid hold time violations is provided. The method includes obtaining a total delay to a source by adding a first delay associated with each of the delay elements in a clock tree path leading to a source. The method also includes obtaining a total delay to a destination by adding a second delay associated with each delay element in a clock tree path leading to a destination. Thereafter, a source sum delay of the delay elements in the clock tree path leading from the source to a common point is obtained. Similarly, a destination sum delay is obtained for the delay elements in the clock tree path from the destination to the common point. Subsequently, the actual delay to the source is obtained by subtracting the source sum delay from the total delay. Similarly, actual delay to the destination is obtained by subtracting the destination sum delay from the total delay.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: January 29, 2008
    Assignee: Sun Microsystems, Inc.
    Inventor: Dina Bistry
  • Patent number: 7325212
    Abstract: Noise related to a part of electronic circuits that are to be designed is computed. If the computed noise exceeds a limiting value, parameters of the electronic circuits are modified by using a predetermined method (simple noise check) so that the noise is less than or equal to the limiting value. Signal transmission timing is analyzed for all the electronic circuits, and noise related to all the electronic circuits whose signal transmission timing is analyzed is computed. If the noise exceeds the limiting value, the simple noise check is executed.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: January 29, 2008
    Assignee: Fujitsu Limited
    Inventor: Yoichiro Ishikawa
  • Patent number: 7325213
    Abstract: A structure for a system of chip packages includes a master substrate and at least one subset substrate of the master substrate. The subset substrate includes a portion of the master substrate that has an identical pin out pattern as the portion of the master substrate. The subset substrate has identical internal net lists as the portion of the master substrate. The subset substrate is adapted to accommodate a smaller chip than the master substrate. The master substrate is the largest substrate in the system. The invention also prepares a system of chip packages. The invention selects a master substrate and then selects a subset substrate of the master substrate.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: January 29, 2008
    Assignee: International Business Machines Corporation
    Inventors: Harsaran S. Bhatia, Marie S. Cole, Michael S. Cranmer, Jason Lee Frankel, Eric Kline, Kenneth A. Papae, Paul R. Walling
  • Patent number: 7325214
    Abstract: A method for realizing circuit layouts. Complex integrated circuit includes cells of basic functions, and layout designs for these cells can be recorded as a library. The claimed invention replaces common power strips with grid power contacts/vias in the layout of each cell. While realizing the layout of an integrated circuit, a routing procedure is used to connect power of all cells arranged in the integrated circuit. Because power strips are avoided in each cell, the claimed invention can reduce layout height of each cell, and therefore increase integration of integrated circuits.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: January 29, 2008
    Assignee: United Microelectronics Corp.
    Inventor: Tsuoe-Hsiang Liao
  • Patent number: 7325215
    Abstract: A method for developing a circuit design is disclosed. The method generally include the steps of (A) generating a violation display based on violation information provided from a place-and-route tool and (B) generating a layout display based on layout information provided from the place-and-route tool. The violation display may include (i) a plurality of performance violations for the circuit design and (ii) a plurality of user inputs each associated with one of the performance violations. The layout display may include a layout view of the circuit design. The layout view may highlight at least one of (i) a plurality of cells and (ii) a plurality of networks each along a path related to a particular one of the performance violations identified by a user through the user inputs.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: January 29, 2008
    Assignee: LSI Logic Corporation
    Inventors: Matthias Dinter, Juergen Dirks, Herbert Johannes Preuthen
  • Patent number: 7325216
    Abstract: A method of routing an integrated circuit package includes receiving as input a placement and routing of at least a portion of an integrated circuit package design, selecting a set of at least three trace segments from the placement and routing that includes at least one inner trace segment routed between two outer trace segments, calculating an inner line function for the inner trace segment that is equally spaced from one of an adjacent line function, an adjacent outer line function, and an adjacent outer trace segment on each side of the inner line function, calculating a pair of end points for the inner line function, and generating as output a new routing that reroutes the inner trace segment collinearly with the inner line function and terminates the inner trace segment by the pair of end points.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: January 29, 2008
    Assignee: LSI Logic Corporation
    Inventor: Chengyu Guo
  • Patent number: 7325217
    Abstract: A computer implemented method for designing a semiconductor integrated circuit includes extracting a global wire susceptible to an influence of crosstalk from among a plurality of global wires passing through a switchbox including a plurality of global routing grids based on a crosstalk standard; setting up a crosspoint restriction to restrict a crosspoint of the global wire susceptible to the influence of the crosstalk intersects with a boundary of the switchbox, based on a wiring restriction data; and carrying out detail wiring of the switchbox based on the crosspoint restriction.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: January 29, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomoyuki Yoda
  • Patent number: 7325218
    Abstract: A problem is efficiently solved by giving a proper adjacent spacing condition only to nets having such a problem that a wiring delay and crosstalks are caused. A wiring processing unit executes a wiring process by giving a first adjacent spacing condition that does not become a wiring violation on the basis of a net list of a semiconductor circuit. A noise analyzing unit extracts error nets in which noise errors have occurred by a noise analysis of a wiring formed by the wiring processing unit. A wiring condition changing unit gives a second adjacent spacing condition for eliminating the noise errors to the error nets extracted by the noise analyzing unit, gives the first adjacent spacing condition to the nets other than the error nets, and allows the wiring process to be executed again on the basis of the net list.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: January 29, 2008
    Assignee: Fujitsu Limited
    Inventor: Hideaki Katagiri
  • Patent number: 7325219
    Abstract: Techniques for automating probing location selection during printed circuit board (PCB) and corresponding PCB tester fixture design are presented. The invention includes a system and algorithm for selecting a probe layout comprising a set of probing locations for a printed circuit board design having a plurality of nets, at least some of which have a number of alternative possible probing locations. The system and algorithm iteratively generates a potential probe layout comprising one or more probing locations per net, and based on the potential probe layout, determines one or more regions of maximum deflection. A probing location from the potential probe layout that is located in a region of maximum deflection and is associated with a net having one or more alternative probing locations is removed from the potential probe layout and replaced in the with one of the one or more alternate probing locations associated with the net.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: January 29, 2008
    Assignee: Agilent Technologies, Inc.
    Inventors: Chris R. Jacobsen, Kenneth P. Parker
  • Patent number: 7325220
    Abstract: Techniques are provided for automatically recommending a suitable programmable IC for a circuit design in response to receiving information about the circuit design. The information can be provided in any desired format. For example, specifications defining the circuit design can be provided in a spreadsheet. As another example, a user can select circuit components for the circuit design from a design library. The information describing the circuit design is compared with information about the features of available programmable ICs. A determination is then made as to which of the available programmable ICs is suitable for the circuit design.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: January 29, 2008
    Assignee: Altera Corporation
    Inventor: Philip Andrew Simpson
  • Patent number: 7325221
    Abstract: A core block with a highly configurable interface such that the interface of the core can be optimally configured for the system the core is integrated into. In one embodiment the method consists of defining a configurable interface with different configuration options, capturing the specific core configuration through manual entry or through the use of a Graphical User Interface, and providing for software that combines the source description of the core with the configuration data to generate the core with an optimally configured logic and circuit interface.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: January 29, 2008
    Assignee: Sonics, Incorporated
    Inventors: Drew Eric Wingard, Michael J. Meyer, Geert P. Rosseel, Lisa Robinson, Jay Tomlinson
  • Patent number: 7325222
    Abstract: A method for verifying reticle enhancement technique latent image sensitivity to mask manufacturing errors. The method includes the steps of revising a polygon based on mask CD distributions to provide a virtual mask, imaging the virtual mask to obtain response function statistical parameters, and comparing the statistical parameters to process tolerance requirements. Preferably, the method includes the steps of simulating an aerial and/or latent image of the virtual mask, calculating response functions based on the mask image simulation, collecting measurements and calculating statistical parameters based on the response functions, and comparing the statistical parameters with design rule requirements (i.e., for DI yield percentage for required mask manufacturing specification). The virtual mask is obtained by using mask CD distribution to induce statistical variations to layouts which have passed through the conventional OPC procedure.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: January 29, 2008
    Assignee: LSI Logic Corporation
    Inventors: Nadya G. Strelkova, Ebo H. Croffie, John V. Jensen
  • Patent number: 7325223
    Abstract: Faster synthesis of photolithography mask modifications is described. In one embodiment, the invention includes synthesizing a first binary photolithography mask, developing perturbations to an estimated electric field generated by the first mask in use, and synthesizing a second binary photolithography mask by applying the perturbations to the first mask.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: January 29, 2008
    Assignee: Intel Corporation
    Inventors: Bin Hu, Vivek Singh, Victor P. Bashurin, Yuri D. Bogunenko
  • Patent number: 7325224
    Abstract: The electrical performance of sub-devices is detected and the corresponding measurement data is used to control a lithography process so as to compensate for any type of process variations during a manufacturing sequence.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: January 29, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Rolf Seltmann, Heiko Wagner, Rolf Stephan
  • Patent number: 7325225
    Abstract: It is important to assess and reduce errors that arise in mask correction techniques such as optical proximity correction. A preliminary mask is obtained using an OPC model. An etched wafer is created from the preliminary mask using lithography, and first and second critical dimensions (CD) are measured on the wafer and. An edge placement error (EPE) is determined that corresponds to a difference between a measured value and a desired value of the second CD. These steps are repeated for a plurality of different values of the first CD, and of for each of the values of, the measured value of the second CD is correlated with its corresponding value on the mask as predicted by the OPC model. ? difference ?CD is obtained between the difference of the mask CDs calculated by interpolation of wafer CD measurements and by OPC model predictions and is transformed into an OPC model error.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: January 29, 2008
    Inventors: Yasushi Tanaka, Masahiro Inohara, Matthew Angyal
  • Patent number: 7325226
    Abstract: Methods, systems, and computer program products to serialize user interface objects having custom object types and serialization formats. A serialization manager may coordinate standard serialization providers to identify standard serializers for standard object types or serialization formats, and as needed, may be extended by loading custom serialization providers to identify custom serializers for custom object types or serialization formats, which may not be covered by the standard serialization providers. From available serialization providers, the serialization manager identifies a serializer for a particular serialization format and object type. The object, custom or standard, is serialized using the identified serializer to a custom or standard format, including source code representations, XML representations, etc.
    Type: Grant
    Filed: June 19, 2003
    Date of Patent: January 29, 2008
    Assignee: Microsoft Corporation
    Inventors: Brian Keith Pepin, Shawn Patrick Burke
  • Patent number: 7325227
    Abstract: A preferred embodiment provides a system, method, and computer program product for software code testing. When a code change causes a regression, the system tests each modification to determine and isolate the cause of the regression.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: January 29, 2008
    Inventors: Barnaby Henderson, Paul Elliot
  • Patent number: 7325228
    Abstract: A method of converting an original code sequence to a modified code sequence where the original code sequence includes a procedure call that is prior to a load instruction to one of a first plurality of registers is provided. The method includes inserting the load instruction into the modified code sequence and inserting the procedure call into the modified code sequence subsequent to the load instruction. The method further includes inserting an advanced load instruction to one of a second plurality of registers into the modified code sequence prior to the procedure call and inserting a checking instruction associated with the advanced load instruction into the modified code sequence subsequent to the procedure call.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: January 29, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Dale C. Morris, Jonathan Ross, Achmed Rumi Zahir
  • Patent number: 7325229
    Abstract: A method of visualizing or graphically printing an automatism application programmed on a programming station with the aid of a graphic automatism languages on a computer terminal. The method includes storing a source program associated with an application program formulated in one of the graphic automatism languages on the terminal, the source program being translated into a single, hierarchical object oriented language (XML); and storing at least one style sheet associated with a graphic language on the computer in order to generate a graphic vector file containing drawing instructions enabling the automatism application to be displayed graphically on the terminal.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: January 29, 2008
    Assignee: Schneider Automation
    Inventor: Pascal Nicolle
  • Patent number: 7325230
    Abstract: A system for compiling source programs into machine language programs, comprising: a data type information processing module configured to analyze a definition statement of a fixed-point data type in a source program, acquire data type information of the fixed-point data type; a type-information storage; a variable information processing module configured to analyze a variable declaration statement of the fixed-point data type, acquire variable information; a variable storage; and a code generating module configured to read arithmetic expression data, acquire the type number, acquire the data type information, convert the arithmetic expression data.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: January 29, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Katsuya Uchida
  • Patent number: 7325231
    Abstract: A non-volatile memory is installed in an electronic device. A method for updating a firmware code stored in a non-volatile memory includes: providing an updating control unit having a command set; providing the updating control unit with a trigger signal to enable at least one command of the command set; and utilizing the updating control unit to read/write the non-volatile memory according to the enabled command to update the firmware code. Wherein each command of the command set is a memory read/write command. The method further includes updating at least one command of the command set in real time. The present invention further provides an electronic device corresponding to the method.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: January 29, 2008
    Assignee: Mediatek Incorporation
    Inventors: Li-Chun Tu, Ping-Sheng Chen, Yi-Chuan Chen, Sung-Yang Wu
  • Patent number: 7325232
    Abstract: A compiler for multiple processor and distributed memory architectures is described. The compiler uses a high-level language to represent a task-level network of behaviors that describes an embedded system. The compiler maps a plurality of tasks and data onto a multiple processor, distributed memory hardware architecture. The mapping includes describing a task-level network of behaviors, each of the task-level network of behaviors being related through control and data flow. The mapping further includes predicting a schedule of tasks for the task-level network of behaviors and allocating the plurality of tasks and data to at least one of the multiple processors and to at least one of distributed memory, respectively, in response to the predicted schedule of tasks.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: January 29, 2008
    Assignee: Improv Systems, Inc.
    Inventor: Clifford Liem
  • Patent number: 7325233
    Abstract: Methods and apparatus, including computer program products, for using process attachable virtual machines to provide isolation between user sessions in a scalable manner, enabling a server to robustly process requests corresponding to a large number of user sessions. The methods and apparatus include initializing a process attachable virtual machine for a user session, receiving a request corresponding to the user session, and binding the process attachable virtual machine to an operating system process to process the request.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: January 29, 2008
    Assignee: SAP AG
    Inventors: Norbert Kuck, Harald Kuck, Edgar Lott, Hans-Christoph Rohland, Oliver Schmidt
  • Patent number: 7325234
    Abstract: A system and a method for monitoring computer application and resource utilization are presented. In one embodiment, a list of different users associated with different entities or customers of a shared computer is maintained. A second list of different applications invoked by one or more of the different users is also maintained. A third list including different programs employed by the different applications invoked by the different users, including a weighting factor for each program is also maintained. These records are then used to identify operation usage and/or cost characteristics of the different applications by particular users associated with different entities of the shared computer, in response to an event.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: January 29, 2008
    Assignee: Siemens Medical Solutions Health Services Corporation
    Inventor: David Wesley Smith
  • Patent number: 7325235
    Abstract: Disclosed herein is a data processing apparatus capable of controlling a peripheral device by using a driver program. The data processing apparatus comprises: an input device adapted to input a switch designation of the driver program; an acquisition device adapted to acquire data including specification information settable in a driver program of an original device before being switched and data including specification information settable in a driver program of a destination device to be switched to, based on the switch designation inputted by the input device; and a generation device adapted to generate setting information interpretable by an application program based on the specification information acquired by the acquisition device, method and program product for the data processing apparatus.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: January 29, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mitsunori Iida, Hisashi Kato
  • Patent number: 7325236
    Abstract: A device, an apparatus using the device, and a method designed for performing operations such as automatic installation of driver software facilitate expansion of the existing functions of the apparatus. A microprocessing unit, a random access memory, an operation part, a read only memory or the like are mutually connected via a system bus and mounted in main equipment which is made up of a personal computer. A media controller is connected to the system bus of the main equipment. An electronic device is connected to the media controller as a medium for executing external memory, expanding the existing function or the like, the electronic device being provided with an Ethernet providing connection to external computer networks via a media side controller and a nonvolatile memory in which driver software data driving the Ethernet under respective environments is stored.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: January 29, 2008
    Assignee: Sony Corporation
    Inventor: Yoshiyasu Kubota
  • Patent number: 7325237
    Abstract: A computer system and software are provided for customizing on-line computer services. An application is able to interact with a sub-system between which an interceptor system can be interposed. The interceptor system includes a proxy interacting with the application, a customization module interacting with the proxy and a dispatcher interacting with the customization module and interacting with the sub-system. A customization repository contains the customization module and interacts with a service and a client sharing the application and the sub-system. A control interacts with the customization repository and the service for causing customization of the service and the client by disposing the proxy to interact with the application and the dispatcher to interact with the sub-system.
    Type: Grant
    Filed: December 29, 2001
    Date of Patent: January 29, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Svend Frolund, James Christopher Pruyne
  • Patent number: 7325238
    Abstract: A method, interface, and medium are provided for causing a computer to respond to input based on the source of the input. The computer responds to identical input according to a device that generated the input. The method includes determining information about a receiving component that received the data and using that information to determine the source of input. The source of data input is coupled with the input to initiate a response by the computer. The response can be tailored to how the data was received.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: January 29, 2008
    Assignee: Microsoft Corporation
    Inventors: Ryan James D'Aurelio, John Eric Elsbree, Jay Senior
  • Patent number: 7325239
    Abstract: A method and system for managing a plurality of tables for a plurality of heterogeneous network processors in a network is disclosed. The network also includes at least one host processor that utilizes at least one table management application. The method and system include providing a plurality of generic application program interfaces (APIs). The generic APIs communicate with the control application(s) and the heterogeneous network processors. The generic APIs communicate with the table management application(s) in a network processor independent manner, but manage the tables for the heterogeneous network processors in a network processor specific manner. Thus, the generic APIs allow the control application(s) to be network processor independent and to manage the tables for the heterogeneous network processors in the network processor specific manner.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: January 29, 2008
    Assignee: International Business Machines Corporation
    Inventors: Seeta Hariharan, Brooks Johnston, Marc C. Lavergne, Sridhar Rao, Bahram Sanaei
  • Patent number: 7325240
    Abstract: It is checked, by referring to a deployment descriptor and type information of a component, whether the calling convention to be used by a caller component is the same as the calling convention to be used by a callee component, and if different, a class and an object of a proxy for performing a calling convention transformation process is generated.
    Type: Grant
    Filed: April 10, 2003
    Date of Patent: January 29, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyuki Yamamoto, Jun Yoshida
  • Patent number: 7325241
    Abstract: An optical disk drive with an anti-tilt tray. The optical disk drive has a top protrusion, a fulcrum and a tray disposed on the main body of the optical disk drive along a track constrained by the top protrusion and the fulcrum. The tray is movable between a first position and a second position. Each track of the tray has a gradually thickened area. When the tray is in the second position, the top protrusion and the fulcrum contact the gradually thickened area, such that the gap between the track and the top protrusion is reduced, preventing the tray from vertical tilting.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: January 29, 2008
    Assignee: ASUSTeK Computer Inc.
    Inventor: Chen-Jung Chen
  • Patent number: 7325242
    Abstract: It is an object of the present invention to provide a disk apparatus having a function of externally the forcible unloading manipulation of an optical disk, and for enabling the forcible unloading manipulation only on the basis of clear recognition that a user intentionally performed the unloading of the optical disk, the disk apparatus enforcing such recognition. In the disk apparatus for loading and driving an optical disk, and for recording or reproduction of data on the optical disk, the disk apparatus comprises first release means and second release means for a mechanism for unloading a loaded optical disk to be manipulated externally, wherein manipulation of the second release means forcibly unloads the loaded optical disk by manipulation of the first release means.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: January 29, 2008
    Assignee: Teac Corporation
    Inventor: Kazuo Yokota
  • Patent number: 7325243
    Abstract: The present invention discloses an electromagnetic driving device for an object lens of an optical pickup. The electromagnetic driving device comprises an object lens, a lens bearing seat, a focusing coil, a tracking coil, an auxiliary magnetic device, a base, a plurality of elastomers, and a top cover. The object lens, focusing coil, and tracking coil are fixed to the lens-bearing seat. The auxiliary magnetic device comprises a plurality of magnets fixed to the base. Each of the elastomers is attached to the lens-bearing seat and has an end fixed to the base. By utilizing electromagnetic forces generated by the coils and the auxiliary magnetic device, the object lens is moved to correct tracking deviations and focusing aberrations. The present invention enhances a utilization of the coils, which in turn improves a response time, and sensitivity of the electromagnetic driving device so that the optical pickup can be used in a high-speed optical recording device.
    Type: Grant
    Filed: May 11, 2004
    Date of Patent: January 29, 2008
    Assignee: TopRay Technologies, Inc.
    Inventors: Kirin Chang, Dop Chen
  • Patent number: 7325244
    Abstract: A video component is disclosed for displaying a program guide on a monitor. The video component comprises an interface for receiving Electronic Program Guide (EPG) data, and a component controller for generating the program guide in response to the EPG data. The program guide comprises a plurality of program identifiers for identifying a plurality of programs, wherein at least one of the programs is not recorded locally. The program guide further comprises at least one recording indicator associated with one of the programs indicating that the program has been recorded locally. The video controller for displaying the program guide on the monitor.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: January 29, 2008
    Assignee: Keen Personal Media, Inc.
    Inventors: William B. Boyle, William P. Price
  • Patent number: 7325245
    Abstract: A system enables dynamic linking between a variety of video formats including television broadcasts, web pages, and video displays which are stored on magnetic or optical media. Each frame of the video information is identified together with a plurality of locations within that frame. The locations selected by the user for example using a pointing device is then used to access associated information either within the system itself or on an external system. Thus, in some embodiments of the present invention, any item on a given frame may be linked initially or thereafter to other information within or without the particular system containing that information.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: January 29, 2008
    Assignee: Intel Corporation
    Inventor: Edward O. Clapper
  • Patent number: 7325246
    Abstract: Architecture for providing access to an IEEE 802.1x network. A trust relationship is created between a switch of the network and an access point of the network such that the access point is authorized to communicate over the network. The trust relationship is then extended from the access point to a wireless client requesting connection to the network such that access to the network by said wireless client is authorized.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: January 29, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: David E. Halasz, Merwyn B. Andrade, Pauline Shuen
  • Patent number: 7325247
    Abstract: An information management method restoring electronic data using backup information upon the loss of electronic data stored on a recording medium. Information stored in a predetermined area of the recording medium having medium-specific information is encrypted using medium-specific information or a key generated therefrom and is derived outside the predetermined area.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: January 29, 2008
    Assignee: Fujitsu Limited
    Inventors: Seigo Kotani, Takayuki Hasebe, Hideyuki Hirano
  • Patent number: 7325248
    Abstract: A computer device is provided with a local security mechanism, a personal firewall, for protecting the computer device from attacks from a foreign network, in addition to or instead of a firewall in the internal network which protects the computer when connected to a home network. The personal firewall is provided with different sets of security rules for the home network and foreign networks. The personal firewall is arranged to detect its current location, i.e. determine to which network it is connected to at each particular moment. The personal firewall activates one of the given sets of security rules according to the detected current location of the computer device, i.e. the personal firewall automatically uses the security rules predefined for the network to which the computer device is connected at each particular moment. Upon detecting a change in the location, the personal firewall immediately adapts to use security rules predefined for the new location.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: January 29, 2008
    Assignee: Stonesoft Corporation
    Inventor: Tuomo Syvänne