Patents Issued in January 29, 2008
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Patent number: 7325097Abstract: A method and apparatus for use in a computer system including a plurality of host computers including a root host computer and at least one child host computer. The root host computer exports at least a portion of the volume of storage to the at least one child host computer so they can share access to the volume of storage. In one embodiment, the volume of storage is stored on at least one non-volatile storage device. In another aspect, the volume of storage is made available to the root from a storage system. In a further aspect, at least a second portion of the volume of storage is exported from a child host computer to at least one grandchild host computer.Type: GrantFiled: October 1, 2003Date of Patent: January 29, 2008Assignee: EMC CorporationInventor: Jeffrey J. Darcy
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Patent number: 7325098Abstract: An extended data queue is added to the cache circuitry of a processor to handle extended data when the processor operates on a different architecture than the system it resides on. The extended data for each word coming into the processor is stored in the queue. If the extended data has some valid information, the word is replaced to ensure the information is not lost. If there is no valid information in the extended data, then the bits of the extended data are simply set to zero.Type: GrantFiled: September 3, 2004Date of Patent: January 29, 2008Assignee: Unisys CorporationInventor: Eric David Aho
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Patent number: 7325099Abstract: Method and apparatus to enable slower memory, such as dynamic random access memory (DRAM)-based memory, to support low-latency access using vertical caching. Related function metadata used for packet-processing functions, including metering and flow statistics, is stored in an external DRAM-based store. In one embodiment, the DRAM comprises double data-rate (DDR) DRAM. A network processor architecture is disclosed including a DDR assist with data cache coupled to a DRAM controller. The architecture further includes multiple compute engines used to execute various packet-processing functions. One such function is a DDR assist function that is used to pre-fetch a set of function metadata for a current packet and store the function metadata in the data cache. Subsequently, one or more packet-processing functions may operate on the function metadata by accessing it from the cache. After the functions are completed, the function metadata are written back to the DRAM-based store.Type: GrantFiled: October 27, 2004Date of Patent: January 29, 2008Assignee: Intel CorporationInventors: Sanjeev Jain, Mark B. Rosenbluth, Matthew Adiletta, Gilbert Wolrich
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Patent number: 7325100Abstract: An apparatus for entering and exiting low power mode comprising a processor having a cache; a power management mechanism connected to said processor for controlling a plurality of power management states, at least one of said power management states being a low latency low power state; a memory subsystem including a self sustaining mechanism connected to said processor for retaining data during said low power state; a pre-fetching routine in said memory subsystem for loading instructions into a cache prior to entering said low power state; a disabling mechanism in said processor for disabling any interrupts that may disturb said pre-fetched instructions; an enabling routine in said memory subsystem for initiating the self sustaining operation of said memory subsystem; a detecting routine connected to said processor for sensing a trigger to exit from said low power state; and a restoring routine in said power management mechanism for restoring the clock of said apparatus; thereby said processor disabling saidType: GrantFiled: October 31, 2005Date of Patent: January 29, 2008Assignee: STMicroelectronics Pvt. Ltd.Inventors: Gaurav Dhiman, Gaurav Kapoor
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Patent number: 7325101Abstract: Cache lines stored in an on-chip cache memory are associated with one or more state bits that indicate whether data stored in the cache lines was sourced from an off-chip cache memory or a main memory. By keeping track of the source of cache lines in the on-chip cache memory and by designing the replacement algorithm of the on-chip cache memory such that only one line in a given set maps into an off-cache memory cache line, the frequency of off-chip cache memory accesses may be greatly reduced, thereby improving performance and efficiency.Type: GrantFiled: May 31, 2005Date of Patent: January 29, 2008Assignee: Sun Microsystems, Inc.Inventors: Sorin Iacobovici, Paul N. Loewenstein
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Patent number: 7325102Abstract: A mechanism for filtering snoop requests to a cache memory includes, in one embodiment, a storage including a plurality of entries configured to store corresponding snoop filter indications. The mechanism also includes a cache controller configured receive a transaction request including an address and to generate an index for accessing the storage by performing a hash function on the address. The cache controller selectively generates a snoop operation to the cache memory for the transaction request dependent upon a snoop filter indication stored in the storage that corresponds to the address.Type: GrantFiled: April 9, 2004Date of Patent: January 29, 2008Assignee: Sun Microsystems, Inc.Inventor: Robert E. Cypher
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Patent number: 7325103Abstract: A method of serializing administrative operations on virtual volumes includes operating a storage system to maintain a plurality of virtual volumes that share a pool of block storage, where each of the virtual volumes containing data stored on one or more physical storage devices. Administrative access to each of the virtual volumes is controlled individually by imposing serialization on administrative operations directed to each virtual volume.Type: GrantFiled: April 19, 2005Date of Patent: January 29, 2008Assignee: Network Appliance, Inc.Inventor: Edward Ramon Zayas
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Patent number: 7325104Abstract: A storage device includes a plurality of memories storing data; and a controller controlling the memories, the controller performing in parallel in a number of the memories, the number being specified by a supplied specifying signal, one of a data writing process for writing data supplied from a connection destination device to which the storage device is connectable and a data reading process for reading data requested by the connection destination device.Type: GrantFiled: January 11, 2006Date of Patent: January 29, 2008Assignee: Sony CorporationInventors: Kenichi Satori, Keiichi Tsutsui, Kenichi Nakanishi, Hideaki Bando, Hideaki Okubo, Yoshitaka Aoki, Tamaki Konno
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Patent number: 7325105Abstract: A recording/playback apparatus is characterized in that management information for managing data recorded on a recording medium is provided in a format allowing tracks to be bundled into groups and managed in group units in addition to management of the data in track units. By referring to this management information, tracks from a source can be grouped automatically during a variety of recording and playback operations including mainly a search for the beginning of each group, and various kinds of editing work can be done in group units. The recording/playback apparatus is capable of carrying edit processing such as concatenation, division, batch deletion and a move operation on a specified group recorded on a disc used for recording groups each consisting of a plurality of programs.Type: GrantFiled: March 17, 2005Date of Patent: January 29, 2008Assignee: Sony CorporationInventor: Yoshihiko Hitotsui
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Patent number: 7325106Abstract: A low overhead method for identifying memory leaks is provided. The low overhead method includes a) detecting completion of a garbage collection cycle; and b) identifying a boundary between used objects in memory and free memory space. The steps of a) and b) are repeated and then it is determined if there is an existing memory leak based upon evaluation of boundary identifiers. A computer readable media and a system for identifying memory leaks for an object-oriented application are also provided.Type: GrantFiled: July 16, 2004Date of Patent: January 29, 2008Assignee: Sun Microsystems, Inc.Inventors: Mikhail A. Dmitriev, Mario I. Wolczko
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Patent number: 7325107Abstract: A method for evacuating a source memory page. The method includes ascertaining a first set of processes, the first set of processes representing processes currently accessing the source memory page. The method also includes manipulating parameters associated with the source memory page to enable at least one copy-on-write procedure to be performed on the source memory page irrespective whether the first set of processes has only one process or the first set of processes has multiple processes.Type: GrantFiled: February 18, 2005Date of Patent: January 29, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventor: Clifford J. Mather
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Patent number: 7325108Abstract: A system for moving an object from a short lived memory area in a program address space on a physical memory into a tenured memory area in response to a determination that the object has not been freed from the short lived memory area. If the object in the tenured memory area is determined to be stale, then the object is moved to a native memory area in the program address space. If the object in the native memory area is referenced by a processing unit, then the object is moved into the tenured memory area. If the object in the native memory area is not referenced, then it will be determined if page-out to a page file on hard disk is required. If the object is referenced in the page file, then the object is moved to the program address space.Type: GrantFiled: March 15, 2005Date of Patent: January 29, 2008Assignee: International Business Machines CorporationInventor: Anthony Ryan Tuel
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Patent number: 7325109Abstract: In one embodiment, the present invention provides a method for mirroring data representing a file system. The data is stored on a primary storage server and is mirrored on a secondary storage server. In the method the file system is mirrored without comparing blocks used to that represent the file system at the primary storage server, and the secondary storage server.Type: GrantFiled: October 24, 2003Date of Patent: January 29, 2008Assignee: Network Appliance, Inc.Inventors: Nitin Muppalaneni, Abhijeet P. Gole, Michael L. Federwisch, Mark Smith
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Patent number: 7325110Abstract: In a storage switch to control a snapshot operation in the file unit, the delay in the writing operation of a host due to a data saving operation is prevented. In a snapshot acquiring method, the memory usage in a switch is reduced to create a snapshot. The storage switch includes a function to create a snapshot of a file. To prevent occurrence of delay due to the data saving operation, a mirror of source data as a snapshot target is kept in a source volume in any situation or according to a predetermined condition with synchronization established between the mirror and the source data. In the creation of the snapshot, the mirror data is used. By creating the mirror data in sequential positions in the source volume, the positional correspondence between the source side and the snapshot side is simplified.Type: GrantFiled: August 27, 2004Date of Patent: January 29, 2008Assignee: Hitachi, Ltd.Inventors: Kei Kubo, Koji Sugiyama
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Patent number: 7325111Abstract: A mirroring application running on a primary server in a multiple destination mirroring environment is provided. The mirroring application configures a scanner with snapshots that are registered. The scanner calculates a logical age for each snapshot. The scanner scans a flexible volume once for data blocks that are newer than a predetermined snapshot. The scanner tags each such block with a logical age that is equivalent to the oldest snapshot that refers to that block. The scanner loads the tagged blocks in a queue. A sender module associated with each destination in the mirroring environment inspects blocks in the queue and retrieves only those blocks younger than a destination reference snapshot. The sender sends those blocks to the destination and filters out older blocks, thus bringing the destination mirror up to date with the current active file system.Type: GrantFiled: November 1, 2005Date of Patent: January 29, 2008Assignee: Network Appliance, Inc.Inventor: Tianyu Jiang
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Patent number: 7325112Abstract: When a snapshot of data is taken, it is after a write request comes from the host equipment that old data on the source-side magnetic disk to the snapshot-side magnetic disk; therefore, it takes a long time before new data is actually written in the source-side magnetic disk. To overcome this problem, by analyzing data update information, and from a result of analysis, by deciding an area that has high possibility of receiving a request to write data, and having data of that area previously copied to the snapshot-side magnetic disk, it is possible to take a snapshot very quickly.Type: GrantFiled: June 16, 2006Date of Patent: January 29, 2008Assignee: Hitachi, Ltd.Inventors: Yumiko Haruma, Koji Sugiyama, Kei Kubo, Yoshihito Yugami, Shinji Morita
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Patent number: 7325113Abstract: Memory protection apparatus to protect memory area to realize high interruption response and prohibit from access to the memory area that is previously designated. The memory area data registers 132 (1) to (m), respectively, retain data which designate the accessible memory area in the processing corresponding to interruption of the group number corresponding to it. Selection circuit 133 selects any of the memory area data registers 132 (1) to (m) according to the group number retained by the group number register 131, and outputs data that designates selected memory area retained by the memory area data registers 132. Address bus watching part 106 watches generation of illegal memory access of the processor according to the data designating the memory area output by the selection circuit 133.Type: GrantFiled: March 23, 2005Date of Patent: January 29, 2008Assignee: NEC Electronics CorporationInventor: Hideki Matsuyama
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Patent number: 7325114Abstract: A semiconductor non-volatile memory device, particularly a flash memory array, having a chip configuration with a plurality of pins including a write protect pin, a serial in pin and an optional parallel data bus with input-output pins (I/O7-0), plus other pins, all electrically communicating with the memory array and particularly a sector protection register of variable size and location. The sector protection register defines which sectors or group of sub-sectors to protect and is controlled by the use of commands via the serial in pin or the optional input-output pins. The sector protection may be selectably controlled by either use of a signal to the write protect pin or use of commands via the serial in pin or the optional input-output pins to the command and control logic. A logic circuit instantly determines whether the write protect pin or the commands are controlling the sector protection.Type: GrantFiled: March 8, 2006Date of Patent: January 29, 2008Assignee: Atmel CorporationInventor: Richard V. DeCaro
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Patent number: 7325115Abstract: An operating system copies data from memory pages into a paging file on disk, in order to free up space in the memory. A mechanism is disclosed that causes the data to be encrypted as it is copied into the paging file, thereby protecting the paged data from unauthorized (or otherwise undesired) observation. The data that is stored in the paging file is encrypted with a session key, that is generated shortly after the machine on which the paging file exists is started. The session key, which is used both for encryption and decryption of the paging file data, is stored in volatile memory, so that the key is not persisted across boots of the machine. Since the key is not persisted across boots, old paging file data that was stored prior to the most recent boot cannot be recovered in clear text, thereby protecting the data from observation.Type: GrantFiled: November 25, 2003Date of Patent: January 29, 2008Assignee: Microsoft CorporationInventors: Benjamin A. Leis, David B. Cross, Duncan G. Bryce, Jianrong Gu, Rajeev Y. Nagar, Scott A. Field
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Patent number: 7325117Abstract: A controller existing on a level above a media drive issues a first read command specifying a plurality of data blocks to the media drive, and upon detecting a time-out for the first read command, generates a second read command specifying a portion of the data blocks among the plurality of data blocks, and issues the second read command to the media drive. Upon receiving the portion of data blocks without detecting a time-out for the second read command, the controller reads the plurality of data blocks specified by the first read command by issuing the second read command to the media drive one or more times.Type: GrantFiled: October 17, 2005Date of Patent: January 29, 2008Assignee: Hitachi, Ltd.Inventors: Koji Iwamitsu, Yoshihiro Uchiyama
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Patent number: 7325118Abstract: The disclosure is a method and apparatus for operating dynamic memory management with an object-oriented program, by which objects with frequent creation and short life spans are allocated to a unit memory block in sequence. After released from the unit memory block, the objects are added on a free re-use list so as to be reused when there is an invocation of allocation for the same object size. It is advantageous to enhancing system performance.Type: GrantFiled: September 30, 2003Date of Patent: January 29, 2008Assignee: Samsung Electronics, Co., Ltd.Inventor: Woo-Hyong Lee
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Patent number: 7325119Abstract: In a PVR, when a prescribed type of data is present in external equipment connected to the PVR via an external connection portion, the prescribed type of data is read from the external equipment, and the read data is stored in an HDD. The prescribed type of data stored in the HDD is written into the external equipment connected to the PVR via the external connection portion, based on an operation by a user. After the prescribed type of data is read from the external equipment, the PVR may erase the prescribed type of data with respect to the external equipment.Type: GrantFiled: December 15, 2003Date of Patent: January 29, 2008Assignee: Funai Electric Co., Ltd.Inventor: Tadahiro Naitoh
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Patent number: 7325120Abstract: Space is allocated on data storage devices in proportion to weights associated with the storage devices. The weights can be dynamically adjusted at any time in order to accommodate changes in the system and to better utilize the storage devices. The technique used to perform the allocating is independent of the weights used by the allocating. Further, the allocation technique can accommodate general purpose data streams having varying lengths and/or varying access patterns, as well as special purpose data streams, such as video streams.Type: GrantFiled: December 6, 2004Date of Patent: January 29, 2008Assignee: International Business Machines CorporationInventors: Wayne A. Sawdon, Roger L. Haskin, Frank B. Schmuck, James C. Wyllie
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Patent number: 7325121Abstract: One or more methods and/or systems of utilizing a memory external to an integrated circuit chip are presented. In one embodiment, the system comprises an integrated circuit containing a logic circuitry, a one time programmable memory, a control processor, and a data interface. In one embodiment, a method of storing data into a memory comprises programming one or more bits of a one time programmable memory, generating an identifier from the integrated circuit chip, and using the identifier to store data within the memory.Type: GrantFiled: July 27, 2004Date of Patent: January 29, 2008Assignee: Broadcom CorporationInventor: Mark Buer
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Patent number: 7325122Abstract: A method, computer program product and system for facilitating inter-digital signal processing (DSP) data communications. A direct memory access (DMA) controller may be configured to facilitate transfers of data between a first and a second DSP processor core coupled to the DMA controller. The DMA controller may read a data structure, referred to as a “buffer descriptor block,” to perform the data transfer. The buffer descriptor block may store both a source address and a destination address indicating where the data is to be retrieved and stored. The buffer descriptor block may further store a value, e.g., number of bytes, indicating a size of the data to be transferred. The DMA controller may then transfer the data located at the source address in the first DSP processor core, with a size, e.g., number of bytes, indicated from the buffer descriptor block, to the destination address in the second DSP processor core.Type: GrantFiled: February 20, 2004Date of Patent: January 29, 2008Assignee: International Business Machines CorporationInventors: Youseff Abdelilah, Bartholomew Blaner, Gordon Taylor Davis, Jeffrey Haskell Derby, Joseph Franklin Garvey, Malcolm Scott Ware, Hua Ye
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Patent number: 7325123Abstract: An integrated circuit having computational elements. As least one of the computational elements has a fixed architecture. An interconnection network is coupled to a first group of the computational elements to configure the first group for a first operation. An interconnection network is coupled to a second group of computational elements to configures the second group for a second operation.Type: GrantFiled: March 7, 2003Date of Patent: January 29, 2008Assignee: QST Holdings, LLCInventors: Paul L. Master, Eugene Hogenauer, Walter James Scheuermann
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Patent number: 7325124Abstract: A pipeline system and method includes a plurality of operational stages. The stages include a pointer register stage which stores pointer information and updates, and a rename and dependence checking stage located downstream of the pointer register stage, which renames registers and determines if dependencies exist. A functional unit provides pointer information updates to the pointer register stage such that pointer information is processed and updated to the pointer register stage before or in parallel with the register dependency checking.Type: GrantFiled: April 21, 2004Date of Patent: January 29, 2008Assignee: International Business Machines CorporationInventors: Erik Altman, Michael Karl Gschwind, Jude A. Rivers, Sumedh Wasudeo Sathaye, John-David Wellman, Victor Zyuban
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Patent number: 7325125Abstract: A method and computer system for accessing initialization data stored in a boot memory space. After the power supply starts up, the south bridge starts up and sends an initiating signal to the north bridge for starting up the north bridge. Once the north bridge has started up, it sends the south bridge a transaction which requests that the south bridge reads the initialization data from the memory space and sends the initialization data to the south bridge. Then, the CPU starts up and operates normally after the CPU receives an initiating signal and the initialization data sent by the north bridge.Type: GrantFiled: July 29, 2003Date of Patent: January 29, 2008Assignee: Via Technologies, Inc.Inventors: Bi-Yun Yeh, Shu-Tzu Wang, Heng-Chen Ho
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Patent number: 7325126Abstract: Distributed module authentication allows security checks to be initiated by multiple software modules. Module authentication processes can be inserted into two or more modules in an operating system and/or various other applications. These module authentication processes can verify the integrity of binaries associated with one or more modules in computer memory. Security checks can be performed on modules stored on disk, in active system memory, or in any other location. Various security checks can be coordinated with each other to ensure variety and frequency of module authentication, as well as to randomize the module authentication process that performs a particular security check. In addition, security processor code can be interleaved within normal application code, so the security code is difficult for attackers to remove or disable without damaging the useful functionality of an application.Type: GrantFiled: March 5, 2004Date of Patent: January 29, 2008Assignee: Microsoft CorporationInventors: Lazar Ivanov Ivanov, Caglar Gunyakti, Kristjan E. Hattelid
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Patent number: 7325127Abstract: A security server system and method permitting participants acting as the source or destinations for a message or a conversation with multiple messages to securely communicate the messages. The messages have a message header and a message content. A message router connects the participants via a network and delivers the message between the participants based on the message header. A key server creates, stores, and releases conversation keys that the participants use to protect the message content of the message.Type: GrantFiled: November 26, 2002Date of Patent: January 29, 2008Assignee: Secure Data In Motion, Inc.Inventors: Terry M. Olkin, Jahanshah Moreh
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Patent number: 7325128Abstract: A security architecture has been developed in which a single sign-on is provided for multiple information resources. Rather than specifying a single authentication scheme for all information resources, the security architecture associates trust-level requirements with information resources. Authentication schemes (e.g., those based on passwords, certificates, biometric techniques, smart cards, etc.) are employed depending on the trust-level requirement(s) of an information resource (or information resources) to be accessed. Once credentials have been obtained for an entity and the entity has been authenticated to a given trust level, access is granted, without the need for further credentials and authentication, to information resources for which the authenticated trust level is sufficient.Type: GrantFiled: September 19, 2006Date of Patent: January 29, 2008Assignee: Sun Microsystems, Inc.Inventors: David L. Wood, Paul Weschler, Derk Norton, Chris Ferris, Yvonne Wilson, William R. Soley
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Patent number: 7325129Abstract: A method for altering encryption status in a relational database in a continuous process, wherein at least one table of said database comprises at least one base area and at least one maintenance area, comprising the steps of: copying all records from said base area to said maintenance area; directing action of commands intended for said base area to said maintenance area; altering encryption status of said base area; copying all data records from said maintenance area to said base area; and redirecting action of commands to said base area.Type: GrantFiled: November 16, 2000Date of Patent: January 29, 2008Assignee: Protegrity CorporationInventors: Ulf Mattsson, Tamojit Das
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Patent number: 7325130Abstract: A method for guaranteeing freshness of results for queries against a non-secure data store extends a write operation to include steps of: receiving a write instruction for application data to be written into a hierarchical tree structure; incrementing a timer responsive to receiving the write instruction; setting a timestamp to the value of the timer; computing a message authentication code based on the received application data and the timestamp; appending control information to the application data and its corresponding check item; the control information including the timestamp, a link to a check entry, and the message authentication code; writing the application data with the appended control information to the data store as a primary item; and updating the control information for each check item associated with the primary item along a path from the primary item to a root by following links.Type: GrantFiled: March 21, 2003Date of Patent: January 29, 2008Assignee: International Business Machines CorporationInventor: Martin Trapp
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Patent number: 7325131Abstract: A robust watermark embedded into a Direct Stream Digital (DSD) audio signal including a flat frequency response in a specific frequency range which does not extend below 20 kHz or above 100 kHz. The watermark is therefore hidden in the noise spectrum of the DSD signal, such that the watermark is inaudible to a listener. Since the noise spectrum contains important information that helps provide the DSD signals with sharp transients and an accurate impulse response, the watermark cannot be removed from the DSD signal without causing significant degradation to the signal's audio quality.Type: GrantFiled: September 5, 2002Date of Patent: January 29, 2008Assignee: Koninklijke Philips Electronics N.V.Inventor: Derk Reefman
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Patent number: 7325132Abstract: An authentication system providing a safety authentication process of electronic values with the use of mobile terminals which do not have a tamper-resistant function. The electronic value including encrypted value authentication information (F(VPW)), wherein an authentication information (VPW) corresponding to an electronic value specified by a user is acquired by the hash calculation, is stored in user's mobile terminal.Type: GrantFiled: August 25, 2003Date of Patent: January 29, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hisashi Takayama, Junko Furuyama
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Patent number: 7325133Abstract: An authentication and mass subscriber management technique is provided by employing a key table derived as a subset of a larger key pool, a network edge device, and authentication tokens attached on both the network edge device and on a subscriber's computing device. The network edge device and subscriber's computing device are provided with secure, tamper-resistant network keys for encrypting all transactions across the wired/wireless segment between supplicant (subscriber) and authenticator (network edge device). In an embodiment of the invention, a secure, secret user key is shared between a number of subscribers based upon commonalities between serial numbers of those subscribers' tokens. In another embodiment of the invention, a unique session key is generated for each subscriber even though multiple subscribers connected to the same network connection point might have identical pre-stored secret keys.Type: GrantFiled: October 15, 2004Date of Patent: January 29, 2008Assignee: Koolspan, Inc.Inventor: Anthony C. Fascenda
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Patent number: 7325134Abstract: The invention provides a secure Wi-Fi communications method and system. In an embodiment of the invention, unique physical keys, or tokens, are installed at an access point and each client device of the network. Each key comprises a unique serial number and a common network send cryptographic key and a common network receive cryptographic key used only during the authentication phase by all components on the LAN. Each client key further includes a secret cryptographic key unique to each client device. During authentication, two random numbers are generated per communications session and are known by both sides of the wireless channel. Only the random numbers are sent across the wireless channel and in each case these numbers are encrypted. A transposed cryptographic key is derived from the unique secret cryptographic key using the random numbers generated during authentication. Thus, both sides of the wireless channel know the transposed cryptographic key without it ever being transmitted between the two.Type: GrantFiled: October 7, 2003Date of Patent: January 29, 2008Assignee: Koolspan, Inc.Inventor: Anthony C. Fascenda
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Patent number: 7325135Abstract: A vehicle accesses a configuration database to determine whether a reconfiguration function is authorized. The reconfiguration function may involve, for example, installing the component in the vehicle, removing the component from the vehicle, replacing the component with another component in the vehicle, replacing another component in the vehicle with the component, modifying the component, upgrading the component and rendering the component operable. Upon determining that the reconfiguration function is authorized, the vehicle allows the reconfiguration function to be performed. The reconfiguration function may be authorized based on a type of the vehicle, a type of the component or a combination of configuration elements in a current configuration of the vehicle.Type: GrantFiled: June 28, 2002Date of Patent: January 29, 2008Assignee: Temic Automotive of North America, Inc.Inventors: Walton L. Fehr, Ezzat A. Dabbish, Samuel M. Levenson, Larry C. Puhl, Jurgen Reinold
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Patent number: 7325136Abstract: A user anonymously acquires a first sequence of encryption key material. An encryption server, having a second sequence complementary to the first sequence, receives and forwards encrypted messages and monitors utilization of encryption key material by the user. As the key material is used, the server adjusts user accounts to exhaust the first sequence. Thus, the first sequence provides for secure, anonymous communication and, correspondingly, can serve as a payment media for conducting electronic transactions.Type: GrantFiled: May 5, 2006Date of Patent: January 29, 2008Inventor: Robert L. Alldredge
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Patent number: 7325137Abstract: A system which allows each server in a network to verify the signature of a party issuing a service instruction in a system for providing a cooperative service by allowing servers to send and receive instruction data indicating instructions to each server and to execute the instruction written in the instruction data. An instruction input device receiving an instruction from a service requestor attaches an electronic signature (initiator signature (74)) of the requestor or the instruction input device to an instruction which indicates process content of each server, to create a signed individual instruction (72). The instruction input device further attaches an initiator signature (76) to data in which the signed individual instructions (72) for all servers involved in the service are merged, to create a collective instruction (70). The collective instruction (70) is transmitted to a flow controller controlling the servers.Type: GrantFiled: September 3, 2003Date of Patent: January 29, 2008Assignee: Fuji Xerox Co., Ltd.Inventors: Takanori Masui, Tatsuhiko Yokohama, Masanori Satake
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Patent number: 7325139Abstract: The present invention relates to an information processing apparatus and method and to a program for reliably preventing unauthorized use of content even in the case of a low-throughput content storage device. A CPU selects content to be stored on a content storage device. In step S202, the CPU verifies a first digital signature added to the content. A storage unit stores a usage right. In step S203, the CPU searches the storage unit for the usage right. In step S207, the CPU verifies a second digital signature added to the usage right. The CPU generates alteration detecting data on the basis of information included in the usage right. In step S208, when the content and the usage right are unaltered, the CPU outputs the usage right, the alteration detecting data, and the content to the content storage device. The present invention is applicable to clients in a DRM system.Type: GrantFiled: April 10, 2003Date of Patent: January 29, 2008Assignee: Sony CorporationInventors: Ryuji Ishiguro, Keiko Tada, Motomasa Futagami
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Patent number: 7325140Abstract: A computer network management system for remotely managing a network device. The system includes a secure management access controller which is in direct communication with the network device. The secure management access controller provides access for remotely and securely managing a network. The secure management access controller further separates management communications from user communications to ensure the security of the management communications. The system further includes network and power monitoring and notification systems. The system further provides authentication and authorization capabilities for security purposes.Type: GrantFiled: October 20, 2004Date of Patent: January 29, 2008Assignee: Engedi Technologies, Inc.Inventor: Jeffrey Alan Carley
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Patent number: 7325141Abstract: If a user loses his password or pass phrase required for a computer or communication system, he must have some way of obtaining a new one. Typically, new passwords are provided to users manually, by another human, an approach that is expensive and insecure. The invention provides an automated solution which allows recovery of secure access. The invention does this by complementary encryption of the user's pass phrase and responses to personal questions, the reference responses being encrypted with the pass phrase and the pass phrase being encrypted with the reference responses. When a user loses his pass phrase, he can provide answers to the personal questions and the system will recover both the reference responses and the pass phrase, so the account can be re-initialized by entering a new pass phrase. The invention also allows “approximate matching”, so biometric data can be used for identification.Type: GrantFiled: April 5, 2001Date of Patent: January 29, 2008Assignee: Cloakware CorporationInventors: Stanley T. Chow, Harold J. Johnson, Yuan Gu
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Patent number: 7325142Abstract: The access network manager terminal 5 makes a communication quality agreement with the core network manager terminal 3, the core network manager terminal 3 conducts resource assignment of the core network 100 based on the communication agreement, notifies the access network manager terminal 5 of password information of the assigned resource and notifies the edge router 1a of password authentication information. The user terminal 4a communicates a password sent from the access network manager terminal 5 in response to a resource use permission request as being contained in a header of a packet and the edge router 1a authenticates the password of the packet based on the password authentication information.Type: GrantFiled: December 3, 2002Date of Patent: January 29, 2008Assignee: NEC CorporationInventor: Kazuhiko Isoyama
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Patent number: 7325143Abstract: A system is disclosed to provide service authorization. The system provides authorized access to services using various identity tokens that represent authorized users, services, servers or other devices, as well as specific instances of users authorized for a service and specific instances of users authorized for a service on a particular server or other device.Type: GrantFiled: October 15, 2002Date of Patent: January 29, 2008Assignee: Linux FoundationInventor: Gregory H. Wettstein
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Patent number: 7325144Abstract: Switching between a requiring mode and a non-requiring mode of password code checking is enabled by an IC card with a CPU for accessing an EEPROM. The general data in the EEPROM are stored upon attachment of error check codes. The memory area of EEPROM is partitioned into unit areas of 2-byte length and writing is performed according to unit areas. The MSB of a specific unit area Ux is used as a checking requirement flag with “1” being defined as checking “required” and “0” being defined as checking “not required”. In rewriting the checking requirement flag, an erasure process sets all bits in the unit area Ux to “1” and thereafter the desired flag is set in the MSB.Type: GrantFiled: July 26, 2001Date of Patent: January 29, 2008Assignee: Dai Nippon Printing Co., Ltd.Inventors: Kazuyoshi Irisawa, Tetsuo Shinriki, Naoto Shibata
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Patent number: 7325145Abstract: A verification system randomly retrieves data from a removable data storage medium. The retrieved data is compared to corresponding verification data, which is known to be valid. The system determines that a legitimate removable data storage medium is present if the retrieved data matches the corresponding verification data. The removable data storage medium can be partitioned into multiple blocks of data. A cryptographic digest is calculated for each data block. The digests are compared to determine whether the retrieved data matches the verification data. The removable data storage medium may be a compact disc (CD) or a digital versatile disc (DVD).Type: GrantFiled: February 18, 2000Date of Patent: January 29, 2008Assignee: Microsoft CorporationInventor: Paul England
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Patent number: 7325146Abstract: Embodiments of the present invention provide for generation of SMI from ACPI ASL control method code to execute complex tasks including, but not limited to, transferring or searching through large amounts of data dynamically. Instead of executing certain tasks using limited ASL functionality, an SMI is generated in an ASL code execution path to enable usage of a CPU instruction set accessible to the SMM handler. In particular, an ACPI operation region is defined for an I/O address location capable of triggering an SMI. An ACPI control method accesses the SMI generation I/O address location to generate an SMI during ASL code execution when a predefined complex task is encountered, thus enabling the SMI handler code to advantageously execute the complex task.Type: GrantFiled: December 31, 2001Date of Patent: January 29, 2008Assignee: Intel CorporationInventors: Rajeev K. Nalawadi, Fred H. Bolay
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Patent number: 7325147Abstract: An input power source voltage detecting unit 1 detects the input AC power source voltage on an electronic device, and a country discriminating unit 2 discriminates the country with the electronic device present therein according to the detected voltage. An operation environment presetting unit 5 presets the electronic device to operation environments of the country discriminated by the country discriminating unit 2.Type: GrantFiled: October 30, 2003Date of Patent: January 29, 2008Assignee: NEC Infrontia CorporationInventors: Harumi Satoh, Yoshikazu Kobayashi
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Patent number: 7325148Abstract: In a parallel processing system by an OS for single processors which operates an OS and an existing application for single processors on a multiprocessor to realize parallel processing by the multiprocessor with respect to the application, a processor on a first processor side receives a request for activating or stopping a processor from a unit of work on any of the processors and controls a power supply management device of the OS for single processors to conduct activation or stop of the requested processor, while the processor requested to be activated or stop executes processing necessary for the activation or stop based on a notification from the first processor side.Type: GrantFiled: May 26, 2004Date of Patent: January 29, 2008Assignee: NEC CorporationInventors: Hiroaki Inoue, Yoshiyuki Ito, Junji Sakai, Masato Edahiro