Abstract: The idea of the present invention is to provide a challenge-response mechanism to acquire work scope split range information from the application's Work Scope Split component of the over-utilized resource. By using the work scope split range information, the provisioning system is able to add a new resource, install a new application for that new resource, configure the new and the over-utilized resource's application, and reconfigure the load-balancer in accordance with the work scope split range information. The present invention adds scalability to complex and stateful application programs and allows dynamic provisioning of resources for these application programs.

Abstract: In a content supply system 100, in order to use a streaming server 102 to perform a live distribution, a user PC 106 used makes a reservation for a time zone, etc. to a server reservation control center 101. When the user PC 106 sends desired reservation information to the server reservation control center 101 via the Internet 103, if the reservation is accepted, a reservation ID only used for authentication of the reservation is created and sent from the server reservation control center 101 to the user PC 106 via the Internet 103. When a distribution request is sent from the user PC 106 to the streaming server 102, authentication processing using this reservation ID is performed.

Abstract: Systems and methods are described for streaming multimedia data from a client to a server using HyperText Transfer Protocol (HTTP). A session is initiated with a header that identifies a content length header that is a maximum allowed by the server, regardless of the actual length of the data to be streamed. If a firewall or proxy server limits access to the server, the content length of the data is specified to be about an amount of data that can be streamed to the server in one minute. If more data remains to be streamed when an amount of data approximating the content length has been streamed, a continuing streaming session is requested and subsequent data is streamed to the server in the continuing streaming session. The process repeats until all data has been streamed.

Abstract: A migration framework provides for the migration of services in a cluster. A migratable target contains a list of servers in the cluster capable of hosting a migratable service. A migration manager can migrate the service between servers in the migratable target, and can activate an instance of the service on the selected host server. The migration manager ensures that only one active instance of the service exists in the cluster. A service stub can serve a user request on servers in the migration target, such as by order of preference, until the user request is served on the server hosting the active instance. A lease manager can assign a lease period to determine how long a server hosts an active instance. This description is not intended to be a complete description of, or limit the scope of, the invention. Other features, aspects, and objects of the invention can be obtained from a review of the specification, the figures, and the claims.

Abstract: A method and system are provided for balancing a server's traffic load in an internet protocol (IP) based half-duplex network that uses an address resolution protocol (ARP) for address resolution. The server includes multiple network interface cards (NICS) that are used for communicating with multiple clients. The server may be accessible either directly to a client or indirectly to a client via a router or gateway. The clients, router, or gateway may store a single IP address identifying the server. The method comprises sending outbound traffic via some of the NICs and receiving inbound traffic via another of the NICs. To achieve this, the server is configured so that certain NICs are used only for outbound traffic and another NIC is used only for inbound traffic. This prevents a single NIC from both sending and receiving traffic, and minimizes the impact of inbound traffic on the server's overall throughput.

Abstract: In one embodiment, the present invention is a method and an apparatus for failure-resilient forwarding of data over a computer network. In one embodiment, a marker is introduced into the data stream, e.g., at the sending node, and allows, in turn, forwarding nodes and/or receivers to efficiently track data stream reception. The marker functions as a checkpoint for the data transport process, and is identified and indexed at each forwarding node and receiver. Each receiver saves the marker prior to delivering data to an application, thereby designating a point in the data stream at which all preceding data is confirmed to have been delivered to the application. Thus, if a forwarding node fails, the receiver may request stream data from an alternate forwarding node by specifying to the alternate forwarding node to provide data starting from the marker.

Abstract: With a continuous source of data relating to transactions, the data may be segmented and processed in a data flow arrangement, optionally in parallel, and the data may be processed without storing the data in an intermediate database. Data from multiple sources may be processed in parallel. The segmentation also may define points at which aggregate outputs may be provided, and where checkpoints may be established.

Abstract: A method of recording a transaction over a network generally includes staring a recorder, sending a request for information from a computer to an information source over the network to begin the transaction, interacting with the information source over the network to complete the transaction, and stopping the recorder. The recorded transaction is played back and feedback is provided on the recorded transaction. The recorded transaction is configured for use by a data acquisition agent operable to execute the recorded transaction with the information source and collect performance measurements for the transaction.

Abstract: The radio control section 205 notifies a transmission rate that can be currently set up out of the radio channel transmission rates to the transmission rate decision section 207. The buffer monitoring section 208 monitors an amount of media data stored in the media reception buffer 209 and when the amount of media data stored exceeds a threshold, the buffer monitoring section 208 notifies it to the transmission rate decision section 207. When information on the radio channel transmission rate from the radio control section 205 shows that the radio channel transmission rate is well within the capacity and when monitoring information from the buffer monitoring section 208 shows that the amount of data stored in the media reception buffer 209 does not exceed a threshold, the transmission rate decision section 207 outputs a request for increasing the transmission rate of the media data to the control signal transmission/reception section 206.

Abstract: Methods and systems for tunneling data associated with a packet based multimedia communication standard are provided. The method includes intercepting a library call associated with the multimedia communication standard in a modified TCP/IP stack and registering identification data associated with the library call. A modified Transmission Control Protocol/Internet Protocol (TCP/IP) header is appended over a pre-existing header of a data packet related to the identification data. The method also provides for transmitting the data packet having the TCP/IP header through a firewall. The TCP/IP header includes a TCP SEQ number and a TCP ACK number to provide a stateful connection.

Abstract: A system and method for providing a consistent view of data stored therein, which can change dynamically in an uncoordinated way, includes a client program and a snapshot server program. The snapshot server program permits one or more client programs to request snapshots of data from the snapshot server program such that the data included in or referenced by a snapshot originates from one or more host server programs and the data is accessible to the snapshot server program, but is managed independently of the snapshot server program.

Abstract: The present invention provides a method and apparatus for increasing the performance of world-wide-web traffic over the Internet. A distributed network of specialized nodes of two types is dispersed around the Internet. A web client's requests are directed to a node of the first type chosen to be close to the client, and the client communicates with this node using a standard protocol such as HTTP. This first node receives the request, and communicates the request to a node of the second type chosen to be close to the request's ultimate destination (e.g., a web server capable of generating a response to the request.) The first node communicates the request to the second node using a different, specialized, protocol that has been designed for improved performance and specifically to reduce traffic volume and to reduce latency.

Abstract: A method for text entry in an electronic device is disclosed. As a user enters text, such as a URL, into a handheld device the entered text is matched to previously visited URLs and these matched URLs are displayed in a list. The entered text may also be matched to any stored list of URLs or text. Typically, the matching searches for any instances of the entered text no matter the location of the entered text in the matched string. If one of the listed URLs is the URL desired by the user, then the user may select that URL and navigate a web browser to the URL without entering any more text. One of the items in the list may be the entered text with an automatically added prefix and suffix. These features significantly reduce the difficulty of entering URLs, especially on a device with limited input capabilities.

Abstract: There is provided an information processing apparatus which is capable of accurately setting the present time by acquiring time information without using a dedicated time acquisition program and at low costs. The information processing apparatus manages counter information indicating output states of image forming apparatuses connected thereto via a network. The information processing apparatus transmits an e-mail addressed to itself and receives the same e-mail, and then sets the present time based on the time of the transmission of the e-mail, and the time of reception of the e-mail by a server connected to the network.

Abstract: The snapshot capability moving into the SAN fabric and being provided as a snapshot service. A well-known address is utilized to receive snapshot commands. Each switch in the fabric connected to a host contains a front end or service interface to receive the snapshot command. Each switch of the fabric connected to a storage device used in the snapshot process contains a write interceptor module which cooperates with hardware in the switch to capture any write operations which would occur to the snapshot data area. The write interceptor then holds these particular write operations until the original blocks are transferred to a snapshot or separate area so that the original read data is maintained. Should a read operation occur to the snapshot device and the original data from requested location has been relocated, a snapshot server captures these commands and redirects the read operation to occur from the snapshot area.

Abstract: In accordance with one embodiment of the present invention, a method of applying an action initiated for a portion of a plurality of devices to all of the plurality of devices is provided. The method comprises establishing a status block for a plurality of devices that are implemented on a system, and initiating an action for a portion of the plurality of devices. The method further comprises writing information to the status block identifying that the action was initiated, and based at least in part on the information written to the status block, applying the action to all of the plurality of devices.

Abstract: Memory access bandwidth within a digital camera is allocated among several requestors by assigning each requester a “tokens per snapshot” (TPS) value. Each requestor has a DMA engine and a DMA entry queue. If the requester wishes to access the memory, then a DMA entry is pushed onto the DMA entry queue of the requester. An arbiter uses the TPS values to select DMA entries off the various queues for incorporation into a “snapshot”. The arbiter then selects DMA entries from the snapshot in an order for servicing such that memory access overhead in accessing the memory is reduced. Only after all DMA entries of the snapshot have been serviced is another snapshot of entries selected. Maximum latency in servicing a queue is controlled by assigning each queue a time out value (TOV). If a queue times out, then that queue is moved up in the order of servicing.

Abstract: A system and method for transmitting data packets from a memory hub to a memory controller is disclosed. The system includes an upstream reception port coupled to an upstream link. The upstream reception port receives the data packets from downstream memory hubs. The system further includes a bypass bus coupled to the upstream reception port. The bypass bus transports the data packets from the upstream reception port. The system further includes a temporary storage coupled to the upstream reception port and configured to receive the data packets from the upstream reception port. The system further includes a bypass multiplexer for selectively coupling an upstream transmission port to either one of a core logic circuit, the temporary storage, or the bypass bus.

Abstract: A dedicated processing module includes an input for data to be processed and an output for processed data. A block input and a block output are also included. A processing component for the module performs a digital processing operation on the data present at the data input and applies the processed data at the data output. The processor may further generate a block request. A control device within the module reproduces, at the block output, a block request applied to the block input or generated by the processing component. The control device thus may operate to block the application of processed data at the data output upon receipt of a block request at the block input. Two or more dedicated processing modules may be connected in series with each other to form a processing flow chain with the data output of one module connected to the data input of a subsequent module. Additionally, the block output of the subsequent module is connected to the block input of the preceding module.

Abstract: A system and method in a fibre channel environment supporting serial ATA devices. In one embodiment, the system and method includes a network having a plurality of servers and a plurality of fiber-channel devices connected to each other through the network. In another embodiment, a command arbitrator answers at least one non-media access command received from a transmitting server. Furthermore, a buffer may store a first consecutive write command for a first time interval and a second consecutive write command for a second time interval if the first time interval has not expired in one embodiment. In addition, a reset command may be generated if at least a first and a nth retry request for a failed command is unsuccessful, in one embodiment.

Abstract: Circuits and methods convert parallel data into a serial data stream. A serializer according to the present invention generally includes a high speed section and a low speed section. The high speed section generally comprises a tree-based serializer configured to serialize an N-bit parallel data stream, where N is a power of two. The low speed section generally includes a data bank configured to load one or more samples of an M-bit parallel input stream, and a multiplexer configured to produce the N-bit parallel data stream from the data bank. The present invention advantageously provides high speed and relatively low power serialization of M-bit parallel data streams where M is not a power of two. In particular, the present invention advantageously provides high speed and relatively low power serialization of 10-bit parallel data streams.

Abstract: A method and system are provided for performing anticipatory changes to a resource governed by a locking mechanism. Entities (such as transactions in a database system) that want to modify a resource request permission to modify the resource. However, prior to receiving permission, they make anticipatory changes to a private version of the resource. The entities are prevented from making the anticipatory changes permanent until they receive permission to make the changes. Because they can make the changes, and proceed to other operations, before receiving permission, any delay in receiving permission has less adverse effect on their performance.

Abstract: In an environment in which plural external storage devices having different function control interfaces are intermixed, when a function of a storage device is controlled from a computer, a common interface for controlling the function of the storage device is provided. A device that provides the common interface manages an interrelationship between a storage area recognized by a host computer and a storage area provided by the storage device and associates a storage area which becomes a target of a function control instruction with the storage device that provides the storage area. A type of the storage device that provides the storage area which becomes the target of the function control instruction is identified and function control is ordered through a function control interface unique to the device.

Abstract: A system for implementing a memory subsystem command interface, the system including a cascaded interconnect system including one or more memory modules, a memory controller and a memory bus. The memory controller generates a data frame that includes a plurality of commands. The memory controller and the memory module are interconnected by a packetized multi-transfer interface via the memory bus and the frame is transmitted to the memory modules via the memory bus.

Abstract: A memory circuit power management system and method are provided. In use, an interface circuit is in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for autonomously performing a power management operation in association with at least a portion of the memory circuits.

Abstract: A “partial PRECHARGE command” is used to precharge a fraction of the banks in a multi-bank DRAM. In a first implementation the command precharges one half of the banks. In a second implementation the command precharges one quarter of the banks. The power drawn by the upper or lower bank precharge on the eight bank DRAM is the same as the power drawn by an “all bank” precharge on a four bank DRAM, without requiring the precharge period to be extended.

Abstract: A disk drive is disclosed comprising a disk, a head actuated over the disk, a host interface for receiving disk access commands from a host, a command queue for queuing the disk access commands, and a stream detection engine for evaluating the disk access commands to detect a plurality of streams accessed by the host. The stream detection engine maintains a stream data structure for each detected stream, wherein the stream data structure comprises a frequency counter for tracking a number of disk access commands associated with the stream out of a predetermined number of consecutive disk access commands received from the host. A disk controller selects one of the streams for servicing in response to the frequency counters.

Abstract: Disclosed is a disk array system that can be expanded effectively in scale by increasing the number of input/output channels and disk adapters and improved in such performance as the number of input/output operations per second, data transfer rate. The disk array system is provided with input/output channels to be coupled to a host computer, cache memories coupled to each of input/output channels respectively and used to store input/output data temporarily, disk drives, disk adapters coupled to the disk drives, and network switches used to couple the input/output channels to the disk adapters.

Abstract: A semiconductor memory card stores a plurality of audio objects (AOBs) that compose a plurality of tracks and playlist information showing a reproduction order for the tracks. The semiconductor memory card also stores, as resume information (PLMG_RSM_PL), (1) a Playlist_Number showing which playlist information was used the last time playback was performed for the semiconductor memory card, (2) a Track_Number showing the last track to be played back, and (3) a Playback_Time showing a position at which where playback was stopped as a time expressed in relation to the start of the track.

Abstract: A controller comprises a host interface section and a processing circuit. The host interface section receives a command sequence outputted from a host apparatus to a first nonvolatile semiconductor memory. The processing circuit processes the command sequence outputted from the host apparatus to the first nonvolatile semiconductor memory, and controls writing, reading and erase of data to a second nonvolatile semiconductor memory, according to the command sequence.

Abstract: A data-processing system and method include a processor core associated with a cache controller. A plurality of cached memory components is associated with the processor core and the cache controller. A cached processor is provided, which supports a plurality of varying sizes of instruction and data cache, wherein the cached processor comprises a processor core separated from the cache controller and the plurality of cached memory components, thereby permitted the cached processor to support varying sizes of cache memory in a flexible memory arrangement thereof.

Abstract: An improved method and system for client-side caching that transparently caches suitable network files for offline use. A cache mechanism in a network redirector transparently intercepts requests to access server files, and if the requested file is locally cached, satisfies the request from the cache when possible. Otherwise the cache mechanism creates a local cache file and satisfies the request from the server, and also fills in a sparse cached file as reads for data in ranges that are missing in the cached file are requested and received from the server. A background process also fills in local files that are sparse, using the existing handle of already open server files, or opening, reading from and closing other server files. Security is also provided by maintaining security information received from the server for files that are in the cache, and using that security information to determine access to the file when offline.

Abstract: A memory having multiple locations for data storage is updated by performing the following method. The memory locations are grouped into commonly accessible groups of one or more data locations. First, a control array is provided. The control array is associated with a predetermined type of memory update operation, and has a local indicator for each commonly accessible group of memory locations respectively. Next, the instruction stream to the memory is monitored to determine the current memory operation type, and the set of groups of memory locations upon which the current operation is to be performed. If the current memory operation is an operation of the predetermined type, the control array is updated. If the current operation is an operation other than the predetermined type, the state of the respective local indicator of each group of the set is determined. The current operation is then performed upon each group in the set in accordance with the state of its respective local indicator.

Abstract: In one embodiment, the present invention is directed to a system processing memory transaction requests. The system includes a controller for storing and retrieving cache lines and a buffer communicatively coupled to the controller and at least one bus. The controller formats cache lines into a plurality of portions, implements an error correction code (ECC) scheme to correct a single-byte error in an ECC code word for pairs of the plurality of portions, stores respective pairs of plurality of portions such that each single-byte of the respective pairs of the plurality of portions is stored in a single one of a plurality of memory components. When the controller processes a memory transaction request that modifies tag data without modifying cache line data, the buffer calculates new ECC data utilizing previous ECC data, previous tag data, and the new tag data without requiring communication of cache line data.

Abstract: Under the present invention, when a request for a web page is received from a client on a server, the web page is built and analyzed for cacheablity. If the web page is cacheable, an entity tag is generated. The entity tag generally identifies the various sources of dynamic content in the web page, and includes cacheability flags and time values associated with the dependencies. The entity tag is sent to the client with the web page where it is stored in local cache memory. If a subsequent request for the same web page is issued from the client, the request is accompanied with the entity tag (e.g., in a header). The entity tag is decoded and analyzed by the server to determine whether the cached web page is still valid.

Abstract: A method of controlling a content addressable memory (CAM) device. A data structure is generated that specifies (i) a prioritized set of rules and (ii) storage locations within the CAM device for one or more match clauses of each of the rules. A new rule having a specified priority is recorded in the data structure. Candidate storage locations within the CAM device are identified within the CAM device for the match clauses of each of the rules having a lower priority than the new rule. The candidate storage locations are compared with the storage locations specified by the data structure. Each match clause for which the candidate storage location does not match the specified storage location is stored in the CAM device.

Abstract: In a multiprocessor environment, by executing cache-inhibited reads or writes to registers, a scan communication is used to rapidly access registers inside and outside a chip originating the command. Cumbersome locking of the memory location may be thus avoided. Setting of busy latches at the outset virtually eliminates the chance of collisions, and status bits are set to inform the requesting core processor that a command is done and free of error, if that is the case.

Abstract: A method and apparatus for supporting cache coherency in a multiprocessor computing environment having multiple processing units, each processing unit having a local cache memory associated therewith. A snoop filter device is associated with each processing unit and includes at least one snoop filter primitive implementing filtering method based on usage of stream registers sets and associated stream register comparison logic. From the plurality of stream registers sets, at least one stream register set is active, and at least one stream register set is labeled historic at any point in time. In addition, the snoop filter block is operatively coupled with cache wrap detection logic whereby the content of the active stream register set is switched into a historic stream register set upon the cache wrap condition detection, and the content of at least one active stream register set is reset.

Abstract: A computer architecture that includes a hierarchical memory system and one or more processors. The processors execute memory access instructions whose semantics are defined in terms of the hierarchical structure of the memory system. That is, rather than attempting to maintain the illusion that the memory system is shared by all processors such that changes made by one processor are immediately visible to other processors, the memory access instructions explicitly address access to a processor-specific memory, and data transfer between the processor-specific memory and the shared memory system. Various alternative embodiments of the memory system are compatible with these instructions. These alternative embodiments do not change the semantic meaning of a computer program which uses the memory access instructions, but allow different approaches to how and when data is actually passed from one processor to another.

Abstract: Uncontested priority is provided to out-of-order data transfers over in-order data transfers on a data bus shared by a plurality of memory requesters. By always granting priority to out-of-order transfers such as deferred read data transfers over in-order transfers such as write and/or cache-to-cache data transfers, it is assured that no newer command or transaction ever negatively affects the latency of an older command or transaction.

Abstract: Multi-Q FIFO memory devices are configured to support a backed-off standard (BOS) mode of operation. This mode of operation enables automatic re-reading of at least one data word previously read from a first queue in the FIFO memory chip during a first FIFO read operation, in response to a queue-switch back to the first queue during a second FIFO read operation. To support this mode of operation, a read counter associated with the first queue is backed-off at least one entry position in response to the queue-switch.

Abstract: The present invention discloses a memory sharing mechanism based on priority elevation. In accordance with the present invention, there is provided an apparatus and method for transporting packets of data in a communication device, wherein each packet is assigned one of several priorities and received based on memory state information. The method comprises the steps of storing the received packets in a memory and modifying the assigned priority of any of the packets causing congestion within the memory.

Abstract: Moving backup data within a storage hierarchy based on a calculated uniqueness of the backup data and on the estimated significance of at least a portion of the backup data. More unique and significant backup data would tend to have higher availability levels. Conversely, less unique and significant backup data would tend to have lower availability levels, or may even cause the backup data to be deleted.

Abstract: A system according to this invention converts a full-copy snapshot into a differential snapshot. The system is composed of a storage subsystem and a server subsystem. The storage subsystem comprises a disk drive and a disk controller. The server subsystem comprises an interface, a processor, and a memory. The disk controller provides storage areas of the disk drive as logical volumes, and stores a differential block bitmap. The processor obtains the differential block bitmap, and identifies a block from the differential block bitmap. The processor obtains, from a full-copy snapshot volume, differential data that is stored in the identified block. The processor stores the obtained differential data in a differential volume. The processor stores, in differential block arrangement information, the location of the differential data stored in the differential volume.

Abstract: A memory card, flash memory drive or other removable re-programmable non-volatile memory device is configured so that at least part of the memory is not available for storage of user data until data of a message stored in the memory is at least read out by the user through a host device to which the memory device is connected. The message may be an advertisement, instructions on using the memory device, or the like, to which the user is at least exposed as a condition of having the full capacity of the memory card available thereafter for use by him or her.

Abstract: A grouping mechanism is provided which can return distinct groups of entries of data that satisfy a users query in a non-blocking fashion. Each distinct group can normaly be returned to the user substantially concurrently with the following entries being received and processed. The grouping mechanism supports an overflow mechanism which can transfer parts of the data between a primary memory to a secondary memory to alleviate shortage of primary memory. This non-blocking mechanism is useful as a part of a dataflow model data processing system.

Abstract: This invention is a system and method for determining configuration or simulating performance of one or more data storage systems. This invention may be used in many useful ways including for configuring or modeling a data storage environment, problem isolation, and general design.

Abstract: Managing memory includes receiving a request for a memory allocation, determining whether the memory allocation is to be maintained when subsequently initializing memory and saving information about the memory allocation to maintain the memory allocation during subsequently initializing memory. Initializing may be performed as part of special reset mode processing. Special reset mode processing may be performed in response to receiving a reset command. The memory may be shared by a plurality of processing units and the reset command may be issued to reset a first processing unit causing reset of the memory and a second processing unit may use a first allocated memory portion that is maintained when initializing the memory as part of processing for the reset command. Saving may include adding an entry to an allocation list associated with the memory, the entry including a location associated with the memory allocation.

Abstract: A volume management system includes a management server which includes a memory and a processor, the memory stores an area level indicative of released or unreleased, a priority level indicative of a priority for establishing a redundancy, a use status indicative of used or unused, and a state indicative of presence or absence of redundancies, for each of logic areas of a storage device. When there is a logic area whose capacity is insufficient among the logic areas of the storage, the arrangement performs a number of operations to allocate capacities of other logic areas to a logic area whose capacity is insufficient.

Abstract: A system and method of allocating contiguous real memory in a data processing system. A memory controller within system memory receives a request from a data processing system component for a contiguous block of memory during operation of the data processing system. In response to receiving the request, the memory controller selects a candidate contiguous block of memory. Then, after temporarily restricting access to the candidate contiguous block of memory, the memory controller identifies a set of frames currently in use within the candidate contiguous block of memory, relocates the set of frames, and allocates the candidate block of memory for exclusive use by the requesting data processing component. The allocation of contiguous real memory occurs dynamically during the operation of the data processing system.