Abstract: Described are controllable termination impedances that may be adjusted collectively by a combination of digital and analog signals. Each adjustable impedance, responsive to the digital signals, establishes a gross termination resistance for one of a plurality of communication channels by enabling one or more of a plurality of parallel-coupled impedance legs. Each leg includes at least one transistor for controlling the impedance of the leg over a continuous range. An analog compensation voltage is level shifted and the resulting level-shifted signal is applied to the control terminals of the transistors of the selected impedance legs. The compensation voltage, and consequently the level-shifted signal, varies with supply-voltage and temperature fluctuations in a manner that causes the collective impedance of the selected legs for each channel to remain stable despite the fluctuations.

Abstract: A level shifter circuit. It comprises a first level shifter unit which comprises a first transistor, a second transistor, a first diode, a first capacitor, a second diode and a second capacitor. The first transistor comprises a first gate, a first source/drain and a second source/drain. The first source/drain is electrically connected to the first voltage. The second transistor comprises a second gate electrically connected to the second source/drain, a third source/drain and a fourth source/drain respectively electrically connected to the first voltage and the first gate. The first diode has a first end electrically connected to the second source/drain and a second end receiving an inverted clock pulse signal. The first and the second capacitors are respectively electrically connected to the first and the second diodes. The second diode has a first end electrically connected to the fourth source/drain and a second end receiving a clock pulse signal.

Abstract: A device and method for temperature compensation of an electronic device are disclosed. The device includes a temperature bias controller with a temperature sensor. A bias signal based upon a signal from the temperature sensor is provided to a first gate of a multiple fin gate field effect transistor (multigate FinFET) transistor of a functional block. A second gate of the multigate FinFET transistor receives a control signal to control its operation within the functional block. In this configuration the first gate of the multigate FinFET transistor can be used for temperature compensation while the second gate is used for functional operation of the transistor. Specific embodiments of the present disclosure will be better understood with respect to the figures.

Abstract: A high voltage generation circuit includes a pump clock generation unit configured to generate a pump clock signal in response to a pumping enable signal, a charge pump configured to generate a high voltage on an output in response to the pump clock signal, and a switching unit to selectively couple the output of the charge pump to an output node in response to the pumping enable signal.

Abstract: A charge pump circuit may include a plurality of charge pump cells. Each charge pump cell may further include an output node for supplying charge, a pumping node for receiving a clock signal and a pumping capacitor, which may be connected between the output node and the pumping node, for storing the charge and may repeat a charge or discharge operation and/or a pre-charge operation in response to a plurality of clock signals. In the pre-charge operation, a unidirectional charge supply may be performed from a lower voltage output node to a higher voltage output node.

Abstract: A power source circuit adapted to output a first set potential which is set according to a first selection signal, or a second set potential which is set according to a second selection signal and higher than the first set potential, has an output terminal adapted to output the first set potential or the second set potential; a first boosting circuit adapted to boost a voltage supplied from a power source and to output the boosted voltage to the output terminal; a second boosting circuit adapted to boost the voltage supplied from the power source and to output the boosted voltage to the output terminal; a voltage dividing circuit adapted to output a monitor potential by dividing the output potential outputted from the output terminal according to the first selection signal, or to output a monitor potential by dividing the output potential and reducing a voltage dividing ratio of the monitor potential with respect to the output potential according to the second selection signal; a comparison amplifier adapted

Abstract: A charge pump circuit is provided with a capacitor for generating a boosted voltage from a power supply voltage in response to a clock signal; and an output node from which the boosted voltage is externally outputted. The capacitor includes a first well formed within a substrate, a second well formed within the first well, first and second diffusion regions formed within the second well to receive the clock signal, a channel region provided between the first and second diffusion regions in which channel region a channel is formed in response to the clock signal; and an electrode positioned over the channel region across a dielectric and connected with the output node. The output node is also connected with the first well to apply said boosted voltage to the first well.

Abstract: A current mirror circuit that allows for over voltage stress testing includes: a first transistor; a second transistor having a gate coupled to a gate of the first transistor; a switch coupled between the gate of the first transistor and the drain of the first transistor; a bias source coupled to a control node of the switch such that the switch is ON during normal current mirror operation, and the switch is OFF during over voltage stress testing; and a clamp coupled between the control node of the switch and a source node.

Abstract: A semiconductor memory device includes a first pump clock generator configured to generate a first pump clock signal based on a power supply voltage. The device also includes a first charge pump configured to generate a first pump output voltage in response to the first pump clock signal. The device also includes a second pump clock generator configured to generate a second pump clock signal based on the first pump output voltage. The device also includes a second charge pump configured to generate a second pump output voltage in response to the second pump clock signal. The device also includes a switching unit configured to selectively connect the first charge pump to the second charge pump.

Abstract: A regulator circuit includes: a detection circuit, for outputting a feedback voltage in accordance with an output voltage; a reference voltage input section; a feedback voltage input section; an operational amplification circuit, for comparing a reference voltage and the feedback voltage and outputting a voltage as a comparison result; an output circuit, for supplying an output voltage in accordance with the output of the operational amplification circuit; a connection/disconnection circuit, for connecting or disconnecting the output terminal of the detection circuit and the feedback voltage input section; and a voltage setup circuit, for setting for the feedback voltage input section a predetermined voltage. In the standby state, the connection/disconnection circuit disconnects the output terminal of the detection circuit from the feedback voltage input section, and the voltage setup circuit sets a predetermined voltage for the feedback input section.

Abstract: A frequency shift keying demodulator robust for frequency offset is provided. The demodulator is used to enable the signal to be received correctly when the frequency offset occurs. A microprocessor of demodulator controls a frequency mixer and a phase difference generator according to the duty cycle of the preamble when receiving the preamble of the demodulated signal. Therefore, the duty cycle of the preamble of the demodulated signal can be close to 50%, and the data from a transmitter is received correctly.

Abstract: An amplitude demodulator comprising a capacitive element for filtering a first D.C. component of a received signal, an element for detecting edges in the signal provided by the capacitive element, and at least one switching element for forcing, at least after detection of an edge, the returning of the signal provided by the capacitive element to a second D.C. component.

Abstract: An amplifier circuit that uses multiple power supplies includes a class D amplifier circuit, input bias generator and feedback network. By creating a voltage using the input bias generator at the non inverting terminal of the integrator, the inverting terminal of the integrator will follow the same voltage as the non inverting terminal. The offset voltage between the input signal DC bias and the input DC bias of the integrator will create an offset current flowing through the feedback resistors, thus resulting in the desired output DC bias.

Abstract: A unilateral feedback power amplifier utilizes new feedback techniques and devices to make the amplified high-frequency signal unilateral, let the output power, power gain and impedance matching simultaneously accomplish the optimal values, and enhance the stability of the system. In this feedback amplifier, a generalized multi-port feedback circuit is in shunt with the input terminal and the output terminal of the power transistor. This generalized multi-port feedback circuit receives an amplified high-frequency signal and eliminates the reverse admittance of the amplified high-frequency signal to let the admittance value of the output amplified high-frequency signal approach zero so as to be unilateral. Moreover, the generalized multi-port feedback power amplifier differs from the conventional power amplifier of cascaded architecture in that the ground terminal of the power transistor is directly connected to the system ground.

Abstract: A differential current amplifier circuit comprises a first low input impedance circuit that generates a first output current based on a first input current to the differential current amplifier circuit. A second low input impedance circuit generates a second output current based on a second input current to the differential current amplifier circuit. A first current subtraction circuit generates a first output voltage based on a difference between the first and the second output currents. A second current subtraction circuit generates a second output voltage based on a difference between the second and the first output currents.

Abstract: An amplifier circuit includes a low noise first stage and a wide dynamic range second stage. A feedback network coupled between the output of the second stage and the input of the first stage provides DC level shifting of the common mode input voltage. The common mode input voltage is shifted to a value that allows the output of the first stage to be compatible with the input of the second stage.

Abstract: An apparatus comprising a Darlington transistor pair comprising a first transistor and a second transistor. The first transistor may have a gate configured to receive an input signal. The second transistor may have a gate coupled to a source of the first transistor. The Darlington transistor pair may be configured to generate an output signal at a drain of the first transistor and a drain of the second transistor in response to the input signal. The first transistor may be implemented as an enhancement mode device and the second transistor may be implemented as a depletion mode device.

Abstract: A bias control circuit for an RF amplifier having an output device for providing an output signal to a load and a driver device for driving the output device includes a current mirror circuit for providing a driver device bias current to the driver device and an output device bias current to the output device. When the amplifier operates in a high power mode, the current mirror circuit supplies the driver device bias current at a level to turn on the driver device at a high current level and an output device bias current to turn on the output device. When the amplifier operates in a low power mode, the current mirror circuit supplies a driver device bias current to turn on the driver device at a reduced current level and an output device bias current to turn off the output device.

Abstract: A method for generating a temperature-compensated control signal is provided. The method includes receiving a constant control signal. A temperature-compensated control signal is generated based on the constant control signal. The temperature-compensated control signal is provided to a variable gain amplifier. The temperature-compensated control signal is operable to cause the variable gain amplifier to function independently of temperature.

Abstract: A high-frequency power amplifier with a temperature compensation function for power amplifying a high-frequency signal, includes: a power amplifying transistor having an emitter grounded; a high power output bias circuit that supplies a high power output current corresponding to a high power output of the high-frequency power amplifier to the power amplifying transistor; and a low power output bias circuit that supplies a low power output current corresponding to a low power output of the high-frequency power amplifier to the power amplifying transistor.

Abstract: There are provided an RF power amplifier transistor (2), a bias supply circuit (51) which supplies a bias current to the base of the RF power amplifier transistor and a bias control circuit (52) connected between the base of the RF power amplifier transistor and bias supply circuit, and the bias control circuit is connected to the power supply (32) of the RF power amplifier transistor, thus realizing high efficiency of the RF power amplifier when the power level is low and improving the temperature characteristic of the power amplifier when the power level is low.

Abstract: RF amplifier bias system for TDMA application. A bias circuit (200) is coupled to an RF power amplifier (201) circuit. The bias circuit includes a charge pump/sink circuit (215) a voltage reference circuit (204) and voltage scaling circuit (208, 210, 214). The bias system provides fast response time when transitioning between various bias voltage applied to an FET RF transistor (244).

Abstract: A broadband low noise amplifier and amplification method is provided. The broadband low noise amplifier includes an input terminal into which a radio frequency (RF) signal received by an antenna is input, an output terminal from which an amplified RF signal is output, at least one gain control part connected in parallel with loads of the output terminal to adjust the gain of the amplified RF signal, and at least one load tuning part that resonates with loads of the output terminal to adjust the resonance frequency of the load impedance. The method includes amplifying the input RF signal and outputting the amplified RF signal to an output terminal, where a gain of the amplified RF signal is adjusted by switching operations of at least one switching device connected in parallel with a load of the output terminal.

Abstract: A phase locked loop circuit includes an oscillator, a dividing circuit coupled to the oscillator having a controllable dividing factor, and a rangefinder circuit coupled to the dividing circuit. The rangefinder circuit is configured to control the dividing factor in response to an operating characteristic of the phase-locked loop circuit.

Abstract: Apparatus and method for generating first, second and third carrier frequencies of 3432 MHz, 3960 MHz and 4488 MHz respectively, for use in a wireless transmission system deploy only first and second PLLs which are configured to generate 6336 MHz and 2640 MHz signals respectively with only in-phase components. Frequency dividers are employed for frequency-dividing the 6336 MHz signal severally by 2, 4, and 12 to obtain frequency-divided intermediate outputs with both in-phase and quadrature components. The intermediate output components and other intermediate signal components are selectively combined in a mixer (e.g., a single side-band mixer), for deriving the first, second and third carrier frequencies of 3432 MHz, 3960 MHz and 4488 MHz with both in-phase and quadrature components. The invention has application in UWB, WPAN, WLAN, or other wireless systems and has the simplicity and advantages of using only two PLLs instead of the prior art arrangements of three PLLs.

Abstract: The present invention relates to a method and system in which multi-coherent resonances of a microwave in which the alkali-metal atoms in the ground state are driven simultaneously by a microwave hyperfine frequency ?H and a Zeeman frequency ?Z. The driving influences on the atom can include magnetic fields or by optically pumping light modulated by a Zeeman frequency ?Z or a microwave hyperfine frequency ?H or by combinations of their harmonics or subharmonics. Multi-coherent resonances permit simultaneous measurement or control of the ambient magnetic field and measurement or control of a hyperfine resonance frequency of alkali-metal atoms. In one embodiment, the hyperfine frequency for a controlled magnetic field can serve as an atomic clock frequency.

Abstract: In a method and a circuit arrangement for operating an ultrasound oscillation system, wherein an excitation voltage is applied to an ultrasound oscillation system comprising an ultrasound oscillator and components for forming an oscillation circuit for generating an excitation current and wherein the frequency of the excitation voltage is adjustable for operating the ultrasound oscillation system at a predetermined operating point, upon switching on the ultrasound oscillation system, the frequency, beginning with a startup frequency, is changed until the operating point is reached, and, upon switching off the ultrasound oscillation system, the frequency of the excitation circuit is recorded in a storage device and the recorded value is used for determining the startup frequency when the ultrasound oscillation system is again switched on.

Abstract: Phase-locked loop fast lock circuit and method are described. The apparatus including a voltage controlled oscillator, a control loop filter having a capacitor and at least one resistor, and first and second control elements coupled with the control loop filter. The first control element may include a charge pump coupled to a node between the resistor and the capacitor of the control loop filter, and a frequency detector coupled to the charge pump.

Abstract: A novel apparatus and method of extending the frequency tuning range and improving the modulation resolution of an RF digitally controlled oscillator (DCO). In addition to the coarse PVT MIM varactor bank, the DCO uses a single unified bank of varactors that is further subdivided divided into an MSB bank, LSB bank and sigma-delta (SD-LSB) bank. Any ratio mismatches between MSBs and LSBs are digitally calibrated out using a DCO step-size pre-distortion scheme wherein the LSB steps are adjusted to account for the ratio mismatch between the MSB/LSB step sizes. A harmonic characterization technique is used to estimate the mismatches in the minimal size CMOS tuning varactors of a digitally controlled RF oscillator (DCO), wherein the nominal ratio mismatch between the MSB and LSB devices is estimated using hybrid stochastic gradient DCO gain estimation algorithms. The nominal ratio mismatch and the mismatches in the MSB and LSB banks are used to determine the average MSB/LSB mismatch.

Abstract: An integrated temperature-compensated RC oscillator circuit includes an inverter having an input and an output. An RC network is coupled between the inverter and a pair of comparators. A first comparator has an inverting input coupled to a first reference voltage, a non-inverting input coupled to the RC network, and an output. A second comparator has an inverting input coupled to the RC network, a non-inverting input coupled to a second reference voltage, and an output. A set-reset flip-flop has a set input coupled to the output of the first comparator, a reset input coupled to the output of the second comparator, and an output coupled to the input of the inverter. Differential amplifiers in the comparators each have a diode-connected p-channel MOS transistor controlling a mirrored p-channel MOS transistor whose channel width is less than that of the diode-connected p-channel current mirror transistor.

Abstract: Deterioration in frequency stability with time in a conventional piezoelectric oscillator using an accumulation type MOS capacitance element is improved. A P-channel transistor type or an N-channel transistor type is used as a MOS capacitance element in a variable capacitance circuit used in a piezoelectric oscillator. A bias voltage is applied between P-type or N-type extraction electrodes formed in source and drain regions and an N-type extraction electrode provided in an N-well region or a P-type extraction electrode provided in a P-well region. Instability in the MOS capacitance element with time is thus eliminated.

Abstract: A method and system for initiating the oscillation of a crystal that controls a crystal oscillator by applying an initiating pulse to said crystal. The initiating pulse having a pulse width less than one half the periodicity of said crystal.

Abstract: A DC to DC transmission system includes at least three conductors between a source and a sink, a first switch which alternately connects each conductor to the source, a second switch which alternately connects each conductor to the sink. The switches are synchronized such that one conductor is alternately coupled between the same polarity side of the source and sink and another conductor is alternately coupled between the other polarity side of the source and sink. The alternating connection between the conductors and source and sink may be undertaken at a wide range of frequencies.

Abstract: A waveguide substrate has improved signal conversion characteristic to a cavity waveguide at a post wall waveguide less suffering a manufacturing error occurring at a portion leading the signal to the cavity waveguide. The waveguide substrate has a converting part provided at a position shutting off an end of the waveguide, waveguide shutting-off conducting posts penetrating a dielectric plate to electrically conduct between conductor layers on the both surfaces of the dielectric plate, and two slit-like regions, in which no conductor layer is formed, arranged in parallel in the upper stream and the lower stream with respect to a direction of propagation of a high-frequency signal from the waveguide toward the waveguide shutting-off conducting posts.

Abstract: An object is to provide an electromechanical filter which can define a vibration mode so that a vibrator can be excited only in a desired vibration mode, that is, a filter which can suppress any vibration mode other than a desired vibration mode. The electromechanical filter includes a first member for inputting a signal, a second member disposed at a predetermined distance from the first member so as to surround the first member and to be excited due to an electrostatic force caused by the signal input from the first member, and a third member disposed at a predetermined distance from the second member so as to surround the second member and to detect vibration of the second member. The second member is designed to receive an attractive force from the first member and the third member so as to be bound and regulated as to a vibration direction.

Abstract: A bulk acoustic wave (BAW) filter (40) is fabricated from thin film bulk acoustic wave resonators and a method eliminates unwanted side passbands. This BAW filter comprises a substrate (14) a resonator section (11) and an acoustic mirror section (12). Further it comprises a detuning component (31) positioned in the resonator section (11) to provide precise passband characteristics and an additional detuning component (41) in the acoustic mirror section (12) to suppress unwanted side-passband characteristics.

Abstract: An integrated filter including a film bulk acoustic resonator (FBAR) and a surface acoustic wave (SAW) resonator and a method of fabricating the integrated filter. The integrated filter includes: a substrate; a first electrode positioned in a predetermined first area on an upper surface of the substrate; a first piezoelectric layer positioned on the first electrode; a second electrode positioned on the first piezoelectric layer; a second piezoelectric layer positioned in a predetermined second area on the upper surface of the substrate; and at least one inter-digital transducer (IDT) electrode positioned on the second piezoelectric layer. The IDT electrode includes: a first IDT electrode formed in a comb structure on the second piezoelectric layer; and a second IDT electrode formed in a comb structure on the second piezoelectric layer so as to mesh with the first IDT electrode. The first and second piezoelectric layers are formed of an identical material.

Abstract: A programmable surface acoustic wave filter and methods thereof including a piezoelectric substrate, a ground electrode formed in a comb structure on the piezoelectric substrate, a plurality of output electrodes formed in comb structures on the piezoelectric substrate and alternately disposed together with the ground electrode, and a switching unit performing a switching operation so as to selectively transmit output signals output from the plurality of output electrodes to an output node. As a result, a filtering characteristic of the programmable surface acoustic wave filter can be programmed in a desired format.

Abstract: A longitudinally-coupled-resonator surface acoustic wave filter device has a sufficient pass-band width, in which a large attenuation in a stop band near the low-frequency side of a pass band and sharp filter characteristics, and low insertion loss in the pass band are achieved. The filter device is a five-IDT longitudinally-coupled-resonator acoustic wave filter device including a first IDT, second and third IDTs arranged on either side of the first IDT in a direction of propagation of surface waves, and fourth and fifth outermost IDTs in the direction of propagation of surface waves, wherein when the first IDT has the number of electrode fingers N1 and an electrode finger pitch P1, the second and third IDTs have the number of electrode fingers N2 and an electrode finger pitch P2, and the fourth and fifth IDTs have the number of electrode fingers N3 and an electrode finger pitch P3, a relationship of N1<N2, N1<N3, P1<P2, and P1<P3 is satisfied.

Abstract: Dielectrics fixed on holders respectively provided at semi-coaxial cavity resonator stages are movably inserted through an outer conductor. The holders projecting out of the outer conductor are coupled to a coupling member, and the coupling member is directed to slide or turn, so that distances between the dielectrics and the inner conductors of the resonators are varied, and accordingly frequencies of the resonators are varied at the same time. Accordingly, there is provided a tunable filter that avoids an increase in insertion loss, is high-power resistant, does not cause intermodulation, and allows a center frequency of the filter to be varied steplessly and quickly.

Abstract: The present invention provides an RF module capable of converting electromagnetic waves in the TE mode to balanced electromagnetic waves in the TEM mode without adjustment and outputting the balanced electromagnetic waves while easily realizing miniaturization. The RF module includes: a waveguide (3) in which a half-wavelength TE mode resonator (2) is formed; an E plane coupling window (4) formed in a wall portion (3a) orthogonal to an H plane out of wall portions (3a) to (3e) constructing the TE mode resonator (2) in the waveguide (3); an output line (5a) provided at the edge on the side of the wall portion (3d) parallel with the H plane on the E plane coupling window (4), and magnetically coupled to electromagnetic waves in the TE mode resonator (2); and another output line (5b) provided at the edge on the side of the wall portion (3e) parallel with the H plane in the E plane coupling window (4), and magnetically coupled to the electromagnetic waves.

Abstract: An interface that provides minimum changes in contact pressure over a thermal range is disclosed. The interface is a mated joint of given material, typically metallic, joined by a mechanical fastener or fasteners. The fastener(s) create contact pressure at the joint surface wherein the contact pressure variation over a temperature range is minimized by the use of a thermal compensator having a predetermined length. The thermal compensator's length is chosen by setting the thermally induced expansion delta to offset an equal delta created by the fastener and interface configuration. The difference in expansion of the mated joint and fastener is canceled by the equal, but negative, difference between compensator and fastener. This cancellation of expansion minimizes the change in contact pressure at the joint interface. Maintaining a constant pressure provides PIM reliability during temperature changes.

Abstract: A transition circuit includes: a waveguide having a notched portion formed by cutting away a portion of the tube wall of the waveguide from the end portion of the waveguide; a dielectric substrate in which a portion extending outside the waveguide through the notched portion of the waveguide is formed; a plurality of polygonal conductor patterns formed regularly disposed on the dielectric substrate; a ground conductor formed on the dielectric substrate; through holes electrically connecting this ground conductor and each of the conductor patterns; an open stub formed on the dielectric substrate; and the conductor of a microwave transmission line, which is formed on the portion of the dielectric substrate, extending outside the waveguide, and which is electrically connected to the open stub.

Abstract: An electrical wiring device including a plurality of independent switches and a circuit interrupter. In an aspect, two adjacent switches are provided. The user accessible portions of the switches operate in a direction parallel to the major longitudinal axis of the electrical wiring device. A protected receptacle may also be provided. The circuit protection component includes a line terminal connectable to a source of voltage, a load terminal connectable to a load, a circuit interrupter that is configured to connect or disconnect the line terminal from the load terminal, a fault detection circuit that is configured to detect at least one predetermined condition, and a trip mechanism in operable communication with the circuit interrupter to disconnect the line terminal from the load terminal upon detection of the predetermined condition.

Abstract: Located within a GFCI is a movable contact bearing arm which cooperates with at least one fixed contact. When the movable arm is moved up to allow the at least one contact on the arm to close with at least one fixed contact, the GFCI is in a conducting state and current flows from a source of electricity through the closed contacts to a load and to the contacts of a receptacle. When the movable arm is moved down to open the contacts, the GFCI is in a non-conducting state and current cannot flow from the source of electricity to either the load or the receptacle contacts. In this invention, the up and down movement of the movable contact bearing arm is harnessed to move a blocking member located within the housing of the GFCI to a first position to block at least one opening of the receptacle as the movable arm is moved down or to a second position to allow the prongs of a plug to enter the openings of the receptacle as the movable arm is moved up.

Abstract: To reduce the internal resistance of small electromagnetic relays of a one-circuit three-contact gap type in order to make it possible to allow large electric currents and at the same time to improve the connection between the fixed contacts and the moveable contacts. Fixed contacts on the fixed terminals are positioned at each apex of an approximate triangle on the upper surface of the insulation base. Moveable contacts are installed on the lower surface of the moveable plate, and are respectively placed in a position which corresponds to each of the fixed contacts. The moveable plate is fastened to the moveable spring whose both ends are held onto the sides of the insulation base, and moves at a specified distance from the fixed contacts due to the pressure of the moveable spring. The construction results in the movable contacts contacting their corresponding fixed contacts at the three positions with uniform contact strength.

Abstract: A rotary selector as display console for contact-free on and off switching as well as for switching of the automatic control of a number of different cycles of electronically operated domestic applicances, such as washing machines, dryers, dishwashers or comparable units. The rotary selector (1) has mutually communicating catch devices and a plate arranged at a distance thereto with a rotary field sensor acording to Hall technology, whereby spring-loaded ball lockings enable defined and switchable rotation of an operating element (2) with magnetic device in ranges up to 360°, and whereby angle-dependent variables for control of a wide range of cycles are generated in a known manner in the rotary field sensor.

Abstract: A Magnetic Resonance Imaging (MRI) system is disclosed. The MRI system includes a cryogenic magnet assembly with a cryogenic vessel housing a superconducting magnet. Disposed radially inboard of the cryogenic magnet assembly are a gradient coil module and a plurality of room temperature steel rings proximate to the gradient coil module. A field of view is defined by at least the superconducting magnet, the gradient coil module, and the plurality of room temperature steel rings. In response to the superconducting magnet being energized, the room temperature steel rings create high order harmonics that serve to expand the magnetic field homogeneity FOV, and low order harmonics that tend to degrade the magnetic field homogeneity within the FOV. The low order harmonics are compensated for by the cryogenic magnet assembly.

Abstract: An article of footwear for receiving a foot of a wearer. The footwear includes an upper and a sole structure secured to the upper. The footwear also includes a heel strap having a U-shaped configuration with a pair of end areas and a central area. The end areas are secured to at least one of the upper and the sole structure, and the central area is unsecured to the upper and the sole structure. At least one of the upper and the sole structure define a foot-supporting surface with a raised periphery in at least a heel region of the footwear, and the central area of the heel strap is a contoured area that lays adjacent the raised periphery in the heel region. The strap may be separated from the foot-supporting surface and placed around a heel of the foot.

Abstract: Transformers are provided. A transformer comprises a ferromagnetic core unit; a bobbin coupled with the ferromagnetic core unit; at least a winding unit as a primary winding and at least a plate as a secondary winding. Also, some of the winding units can act as a secondary winding. At least a winding unit and at least a plate are alternatively stacked in a staggered manner. A conductive wire is wound around the winding unit.