Patents Issued in December 30, 2008
  • Patent number: 7472268
    Abstract: A system is provided for cycling encryption keys to prevent the guessing of encrypted presence information in a shared information space. The system of the invention prevents malicious publication of presence information and ensures that only valid presence information is published to the shared information space. A malicious subscriber is prevented from knowing that he/she has been detected while a search is underway to determine his/her identity. During such a search, authorized subscribers are shifted to a new source of presence information while the malicious subscriber remains at the previous source.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: December 30, 2008
    Assignee: Mitel Networks Corporation
    Inventor: Thomas A. Gray
  • Patent number: 7472269
    Abstract: A system and method for strong authentication achieved in a single round trip is disclosed, which reduces the amount of time needed for a mobile node to be authenticated by the network. In an embodiment of the present invention, the, authentication time is approximately three times faster than for 3GPP.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: December 30, 2008
    Assignee: Nokia Siemens Networks Oy
    Inventors: Charles E. Perkins, Hossam Afifi
  • Patent number: 7472270
    Abstract: A host securely transmits content to a peripheral thereof. The peripheral has a symmetric key (PK) and a copy of (PK) encrypted according to a public key (PU) of an entity ((PU(PK))). In the method, the host receives (PU(PK)) from the peripheral, and sends (PU(PK)) to the entity. The entity has a private key (PR) corresponding to (PU), applies (PR) to (PU(PK)) to obtain (PK), and sends (PK) back to the host. The host receives (PK) from the entity, encrypts at least a portion of the content according to (PK), and transmits the encrypted content to the peripheral. The peripheral may then decrypt the encrypted content based on (PK). A bind key (BK) encrypted by (PK) ((PK(BK))) may accompany (PU(PK)), where the content is to be encrypted according to (BK). Thus, (PK) is not revealed to the host.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: December 30, 2008
    Assignee: Microsoft Corporation
    Inventors: Brian Evans, Ajitesh Kishore, M. Jay Parks
  • Patent number: 7472271
    Abstract: The suitability of a service provider for performing a task having a sensitivity level is gauged by using a trust level associated with the provider, in conjunction with the sensitivity level, to gauge whether or not to allocate the task to the service provider.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: December 30, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Gavin Brebner, Mihaela Gittler, Dominique Vicard
  • Patent number: 7472272
    Abstract: A technique for establishing a perimeter of accountability for usage of digital assets such as data files. The accountability model not only tracks authorized users' access to files, but monitors passage of such files to uncontrollable removable storage media or through network connections and the like which may indicate possible abuse of access. In accordance with a preferred embodiment, an autonomous independent agent process running at a point of use, such as in the background of a client operating system kernel, interrupts requests for access to resources. The agent process senses low level system events, filters, aggregates them, and makes reports to a journaling server. The journaling server analyzes sequences of low level events to detect when aggregate events of interest occur, such as “FileEdit”, network file transfers and the like. Reports can be generated to provide an understanding of how digital assets have been accessed, used or communicated by individuals in an enterprise.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: December 30, 2008
    Assignee: Verdasys, Inc.
    Inventors: Nicholas Stamos, Seth N. Birnbaum, Tomas Revesz, Jr., Donato Buccella, Keith A. MacDonald, Dwayne A. Carson, William E. Fletcher
  • Patent number: 7472273
    Abstract: Method of authenticating a client comprising the steps of sending a subscriber identity to an authentication server; obtaining at least one challenge and at least one first secret to the authentication server based on a client's secret specific to the client; forming first credentials; forming a first authentication key using the at least one first secret; encrypting the first credentials using the first authentication key; sending the at least one challenge and the encrypted first credentials to the client; forming an own version of the first authentication key at the client; decrypting the encrypted first credentials using the own version of the first authentication key. In the method, the encrypted credentials are sent together with the at least one challenge to the client so that the client can proceed authentication only if it can derive the first secret from the at least one challenge.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: December 30, 2008
    Assignee: Nokia Corporation
    Inventor: Henry Haverinen
  • Patent number: 7472274
    Abstract: A method and a system for authenticating an electronic tag by a host communicating with this tag via a reader, including: calculating, on the tag side, a first digital signature using at least one first function shared by the tag and the reader, taking into account at least one first secret key known by the electronic tag and the reader only; transmitting the first signature to the reader; calculating, on the reader side, a second digital signal using at least one second function, different from the first function and shared by the reader and the host, taking the first signature into account; transmitting the second signature to the host; and checking, on the host side, the coherence between the second signature and a validation value calculated based on said second function and on a second secret key known by the host and by a single element selected from among the tag and the reader.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: December 30, 2008
    Assignee: STMicrolectronics S.A.
    Inventors: Christophe Moreaux, Claude Anguille
  • Patent number: 7472275
    Abstract: A universal lightweight, easily carried memory identification card records information and controls access to this information. The memory card includes a file system of electronic files on the card, which are automatically detected and recognized by selected authorized readers. The file system is organized so that stored electronic files appear in separate and distinct encrypted compartments in the card, so that only authorized preselected readers have access to particular compartments. Biometric identifying information is imprinted in the card, so that no data can be transferred unless there is a biometric match between a reader and a person assigned to the card and who possesses the card.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: December 30, 2008
    Inventor: Michael Arnouse
  • Patent number: 7472276
    Abstract: A method of verifying a pair of correspondents in electronic transaction, the correspondents each including first and second signature schemes and wherein the first signature scheme is computationally more difficult in signing than verifying and the second signature scheme is computationally more difficult in verifying than signing. The method comprises the step of the first correspondent signing information according to the first signature scheme and transmitting the first signature to the second correspondent, the second correspondent verifying the first signature received from the first correspondent, wherein the verification is performed according to the first signature scheme.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: December 30, 2008
    Assignee: Certicom Corp.
    Inventor: Scott A Vanstone
  • Patent number: 7472277
    Abstract: A method, system, and program for user controlled anonymity when evaluating into a role are provided. An anonymous authentication controller enables a user to control anonymity of the user's identity for role based network accesses to resources, without requiring reliance on any single third party to maintain user anonymity. First, a role authentication certificate is received from a role authenticator, wherein the role authentication certificate certifies that the holder of the role authentication certificate is a member of a particular role without allowing the role authenticator issuing the role authentication certificate the ability to track an identity of a user holding the role authentication certificate.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Michael Austin Halcrow, Dustin C. Kirkland, Emily Jane Ratliff
  • Patent number: 7472278
    Abstract: A method of authenticating an object in which a computer system receives indicating data from a sensing device. The indicating data is generated in response to sensing of coded data and is indicative of an identity of the object and a plurality of signature fragments, the signature being a digital signature of at least part of the identity. The computer system uses the indicating data to determine the identity and the plurality of signature fragments. The plurality of signature fragments are then used to determined a determined signature, which is in turn used to generate a generated identity. The identity is then compared to the generated identity to authenticate the object.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: December 30, 2008
    Assignee: Silverbrook Research Pty Ltd
    Inventors: Paul Lapstun, Kia Silverbrook
  • Patent number: 7472279
    Abstract: A technique for executing customized code on off-loaded or retrieved documents in a document processing environment. The present invention provides a code component in the form of an agent that can be automatically executed relative to a document before a document is off-loaded, after it has been off-loaded or after it has been retrieved. Preferably, the code component is in the form of a plug-in. Embodiments of the present invention enable advantageous pre-processing and post-processing of documents in the document processing environment. Invocation of at least one agent and execution of customized code at a well-defined time, i.e., synchronous with the underlying document processing step or event.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Matthias Stefan Bierbrauer, Daniel Haenle
  • Patent number: 7472280
    Abstract: A method of managing digital rights comprises the following steps. First, a physical electronic key containing a first activation code is provided to a requesting user. Second, locked digital content is provided to the requesting user. The digital content is encoded with a second activation code associated with the first activation code. Third, the locked digital content is received in a playing device that reads the first activation code and determines whether the first activation code is associated with the second activation code. Fourth, the playing device is enabled to unlock and play the digital content if the first activation code is associated with the second activation code. A digital right management system for implementing the foregoing method is also disclosed.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: December 30, 2008
    Assignee: Proxense, LLC
    Inventor: John J. Giobbi
  • Patent number: 7472281
    Abstract: In a method for the automatic log-in of a subscriber station in a motor vehicle into an external information system, a non-automatic log-in is first performed by transmitting to the external information system a subscriber identification, a pertaining password and a station identification. The automatic log-in for the subscriber identification is activated by transmitting a corresponding request from the subscriber station to the external information system, establishing a secret code for the subscriber identification in the external information system, and transmitting the secret code in a hidden manner to the subscriber station. The secret code is stored in a hidden manner in the subscriber station. An automatic log-in of the subscriber station into the external information system is implemented by transmitting to the external information system the subscriber identification without the password, the station identification and transmitting the code in a hidden manner.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: December 30, 2008
    Assignee: Bayerische Motoren Werke Aktiengesellschaft
    Inventors: Iise Mitterreiter, Thomas Diessel, Thorsten Lange, Josef Meis, Horst-Dieter Sauren, Michael Fischer
  • Patent number: 7472282
    Abstract: ID information and organic information based on authentication demand which a service providing system received from a user terminal are inputted and stored into a use information storing unit. The ID information and organic information stored in an organic information input storing unit and an ID information input storing unit and the ID information and organic information which were inputted in the past in the use information storing unit are compared and collated by a comparing unit and a collating unit. A control unit discriminates an authentication demand by an illegal access person on the basis of results of the comparison and collation, notifies the service providing system of a discrimination result, and logs identity information of the illegal access person.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: December 30, 2008
    Assignee: Fujitsu, Ltd.
    Inventors: Yusaku Fujii, Takashi Shinzaki
  • Patent number: 7472283
    Abstract: The specification discloses a system and related method for tracking access to digital information that involves combining biometric information of a person seeking access with the digital information and a digital signature. Each person who accesses the digital information has their biometric and digital signatures combined in this manner. Thus, the digital information itself reflects who has accessed the information. Where the digital information is a video, the combining of the biometric and digital signatures is done on a frame-by-frame basis.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: December 30, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael F. Angelo, E. David Neufeld
  • Patent number: 7472284
    Abstract: A system for anti-virus processing an email having an executable attachment extracts structural elements of the email and examines the executable attachments for code, data or encoded data that could have created these elements. This is effective to detect at least some mass mailing viruses where the executable attachment creates later generations of the attachment and structural elements such as strings which appear in the later emails are present in the attachment.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: December 30, 2008
    Assignee: Messagelabs Limited
    Inventor: Alexander Shipp
  • Patent number: 7472285
    Abstract: A method and apparatus for memory encryption with reduced decryption latency. In one embodiment, the method includes reading an encrypted data block from memory. During reading of the encrypted data block, a keystream used to encrypt the data block is regenerated according to one or more stored criteria of the encrypted data block. Once the encrypted data block is read, the encrypted data block is decrypted using the regenerated keystream. Accordingly, in one embodiment, encryption of either random access memory (RAM) or disk memory is performed. A keystream is regenerated during data retrieval such that once the data is received, the data may be decrypted using a single clock operation. As a result, memory encryption is performed without exacerbating memory latency between the processor and memory.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: December 30, 2008
    Assignee: Intel Corporation
    Inventors: Gary L. Graunke, Carlos Rozas
  • Patent number: 7472286
    Abstract: Controlling access to functionality within an installed software product. The invention includes an authorization module that dynamically references authorization information when specific functionality is requested by a requesting entity such as a user or an application program to determine if the requested functionality is authorized to be executed. Further, the invention dynamically provides an opportunity to the requesting entity to purchase unauthorized functionality. In this manner, functionality within the software product may be enabled or disabled at any time (e.g., during installation, post-installation, and re-installation).
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: December 30, 2008
    Assignee: Microsoft Corporation
    Inventors: Ryan Burkhardt, Raj Jhanwar, Vijayachandran Jayaseelan, Jason Cohen
  • Patent number: 7472287
    Abstract: An apparatus, a computer-readable recording medium, and a method of controlling data recording and reproducing to and from a disk. Controlling the recording of data includes storing password information set in a recording mode and key information to a first area of the disk, encrypting location information of the first area, storing the encrypted location information to a second area of the disk, encrypting desired data and an address of the desired data using the key information, and recording the encrypted data at the encrypted address.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: December 30, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ki-Ju Lee
  • Patent number: 7472288
    Abstract: In one embodiment, a protected process is monitored by one or more watchdog processes. Upon detection that the protected process has been abnormally terminated, the watchdog processes may initiate actions to identify and/or terminate one or more malicious processes terminating the protected process. For example, the watchdog processes may inject a detector in processes running in the computer. The detector may listen for an activity that would terminate the protected process, and report such activity to the watchdog processes. The watchdog processes may be configured to terminate malicious processes identified as abnormally terminating the protected process. Thereafter, the watchdog processes may restart the protected process.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: December 30, 2008
    Assignee: Trend Micro Incorporated
    Inventors: Tsun-Sheng Chou, Sung-Ching Lin, Chin-Ju Lin
  • Patent number: 7472289
    Abstract: An audio noise mitigation approach. For one aspect, a first voltage associated with a first power management state is provided. A signal responsive to an indication associated with at least a first type of periodic exit event is received and responsive to the signal, a transition to a second voltage associated with a second state is initiated, a rate of the transition to the second voltage being slower than a similar voltage transition initiated in response to a non-periodic exit event.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: December 30, 2008
    Assignee: Intel Corporation
    Inventors: Jorge P. Rodriguez, Leslie E. Cline, Barnes Cooper
  • Patent number: 7472290
    Abstract: A controller in PSE (Power Sourcing Equipment) controls how to provision uninterruptible power through corresponding data ports (and cables) of the PSE to network devices. For example, the controller receives power profile information associated with the network devices indicating how to provision power to the network devices during a power failure such as when an uninterruptible power supply providing power to the power sourcing equipment runs on a battery rather than failed primary wall power. In response to detecting a power failure condition, the power sourcing equipment provisions power to the network devices based on the power profile information associated with the network devices. Consequently, the PSE can smartly provision power to more critical network devices while in a power failure mode rather than provision power to the network devices in the same way before and after occurrence of the power failure mode.
    Type: Grant
    Filed: March 4, 2005
    Date of Patent: December 30, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Wael William Diab, Matthew A. Laherty
  • Patent number: 7472291
    Abstract: A power-managing key apparatus uses a power key to integrate the function of ACPI management of computer hardware and hibernation on/off of operation system. A processor coupled to the power key detects pressing-time parameters of the power key and a current state of the computer. The processor sends a hardware signal to emulate ACPI power button function in order to power on/off computer and awake the computer from a power saving mode. The processor sends a software signal to an operation system of the computer to disable/enable a hibernation state. Therefore, the complicated power management performed by computer hardware and operation system can be simplified.
    Type: Grant
    Filed: April 15, 2005
    Date of Patent: December 30, 2008
    Assignee: Shuttle Inc.
    Inventors: Hung-Ming Chen, Bor-Tay Chen
  • Patent number: 7472292
    Abstract: A power throttling method and system for a memory controller in a computer system. One embodiment includes, responsive to a determination that a change in the state of a cover switch has occurred that will result in an increase in an operating temperature of at least one memory device during normal operation, driving a throttle control signal to the memory controller to a level indicative of an over-threshold state.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: December 30, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Bradley Dean Winick, Shaun Lee Harris, Russ W. Herrell
  • Patent number: 7472293
    Abstract: A programmable state machine is incorporated into the core of a network processor (NP) to monitor the utilization of different processing elements in the NP and to control the power state of each element as a function of past and predicted utilization. The state machine can be used to control a centralized power management control unit or to control a distributed power management unit where each processing element includes its own state machine. The function of the power management state machine can be implemented in any combination of software and/or hardwired logic, depending on the system design requirements. The monitoring and control are implemented through the use of a power management state change algorithm. The determination of the power state of a processing element accommodates interdependencies between the elements. It also makes adjustments in gain factors in response to actual performance and utilization of the network processor.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Charles E. Kuhlmann, Thomas A. Millard, Norman C. Strole
  • Patent number: 7472294
    Abstract: A device comprising an integrated circuit including at least one circuit block having an operating mode controlled in response to an enable signal or a clock signal. The circuit block receives a load current to power the circuit block, an amplitude of the load current being a function of the operating mode of the circuit block. The integrated circuit includes a weighting circuit to generate a weighting signal to indicate an expected amplitude of the load current of the integrated circuit. The weighting circuit monitors at least one of the enable signal and the clock signal and determines the expected amplitude of the load current as a function of the at least one of the enable signal and the clock signal.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: December 30, 2008
    Assignee: Marvell World Trade Ltd.
    Inventors: Runsheng He, Sehat Sutardja
  • Patent number: 7472295
    Abstract: A power supply supplies an output current to an integrated circuit having at least one circuit block. The at least one circuit block has an operating mode controllable in response to an enable signal or a clock signal. The integrated circuit receives a load current to power the circuit block as a function of the operating mode of the circuit block. The load current is a portion of the output current. A receiver receives a weighted signal. The weighted signal is a function of the enable signal and the clock signal to indicate an expected load current of the integrated circuit. A controller controls the output current of the power supply as a function of the expected load current of the integrated circuit such that the power supply pre-emptively changes the output current.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: December 30, 2008
    Assignee: Marvell World Trade Ltd.
    Inventors: Runsheng He, Sehat Sutardja
  • Patent number: 7472296
    Abstract: A contactless semiconductor device is provided where a low power consumption is achieved and wireless communication is carried out stably. A power supply level of a reader/writer and the operating state of internal blocks of an ID chip are monitored. In accordance with such conditions, a clock signal of an optimal frequency and a power supply potential of an optimal level are selected to be supplied. By setting the operating mode in accordance with the power supply level or the power saving mode in accordance with the operating state of each block, a low power consumption ID chip and stable wireless communication can be provided.
    Type: Grant
    Filed: February 10, 2005
    Date of Patent: December 30, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Jun Koyama
  • Patent number: 7472297
    Abstract: A method for automatically initializing the operational settings of a system from information stored within a non-volatile storage of an integrated circuit so that the operational requirements of the integrated circuit, which may be a microprocessor, are met by the system when the system is operating. During manufacturing test, environmental requirements of the integrated circuit are determined and stored within the non-volatile storage of the integrated circuit. During system initialization, environmental control values such as required operating voltage and frequency and cooling requirements are determined from the test values, which are read from the integrated circuit. The values are read by an interface of the system from an interface of the integrated circuit. System settings are controlled by the values to provide the required operating environment and the values may be captured within the system for subsequent operations and initialization sequences.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Louis Bennie Capps, Jr., Mark Elliott Hack, Steven Paul Hartman, Michael Jay Shapiro
  • Patent number: 7472298
    Abstract: An example of the invention classifies disks drives based on their purpose and associating power-saving policies in multiple classes. The system implements Power On Demand, where a reduced power mode is enabled for every individual component of a storage subsystem. In addition, an embodiment of this invention extends a few power modes used in the prior art and allows almost infinite number of power modes when instructing a disk drive (via its I/O interface such as a SCSI or fiber channel interface) to enter a certain power saving mode. Furthermore, an embodiment of invention teaches a system and methods to save power in a disk system comprising a plurality of disk controllers and a plurality of disk drives, arranged in a plurality of arrays, where each array includes several (e.g., 4-16) disk drives.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Peter Kimmel, Thomas Gardelegen, Nils Haustein, Daniel James Winarski
  • Patent number: 7472299
    Abstract: Methods and apparatus to reduce power consumption in arbiters of interconnection routers are described. In one embodiment, an arbiter may be turned off for a select number of clock cycles if no arbitration is to be performed on the corresponding buffer.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: December 30, 2008
    Assignee: Intel Corporation
    Inventor: Shubhendu S. Mukherjee
  • Patent number: 7472300
    Abstract: A method of controlling tape drives within a tape drive library where a backup server utilizes client backup schedules and pending client restore requests to efficiently control the powering on and off of tape drives within a tape drive library.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Nils Haustein, Ulf Troppens, Frank Krick, Daniel James Winarski
  • Patent number: 7472301
    Abstract: Circuitry for conserving power in a system employing multiple electronic components of which a first electronic component operates at a first frequency and is continuously powered on by a power source. The system further includes a second electronic component operating at a second frequency different than that of the first frequency of the first electric component, the second electronic component being maintained in a powered off state in which no energy whatsoever is consumed by the second electronic component until energized in response to a power enabling signal generated by the first electronic component based on demand of the particular function to be performed by the second electronic component. The first and second electronic components may be processors, wherein the frequency of the first processor is lower than that of the second processor.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: December 30, 2008
    Assignee: Codman Neuro Sciences Sárl
    Inventors: Alec Ginggen, Rocco Crivelli
  • Patent number: 7472302
    Abstract: An adaptive cache decay technique is disclosed that removes power from cache lines that have not been accessed for a variable time interval, referred to as the cache line decay interval, assuming that these cache lines are unlikely to be accessed in the future. The decay interval may be increased or decreased for each cache line to increase cache performance or save power, respectively. A default decay interval is initially established for the cache and the default decay interval may then be adjusted for a given cache line based on the performance of the cache line following a cache decay. The cache decay performance is evaluated by determining if a cache line was decayed too quickly. If a cache line is decayed and the same cache contents are again required, then the cache line was decayed too quickly and the cache line decay interval is increased. If a cache line is decayed and the cache line is then accessed to obtain a different cache content, the cache line decay interval can be decreased.
    Type: Grant
    Filed: October 7, 2005
    Date of Patent: December 30, 2008
    Assignees: Agere Systems Inc., The Trustees of Princeton University
    Inventors: Zhigang Hu, Stefanos Kaxiras, Margaret Martonosi
  • Patent number: 7472303
    Abstract: A system and method for information preservation on a portable electronic device. A signal indicating an energy capacity threshold remaining in the battery of a hand held device may be generated. Then, responsive to such a signal, information may be copied from a volatile memory into a non-volatile memory. The non-volatile memory may be configured to provide instructions for direct execution by a processor, or the non-volatile storage may be attached via an expansion interface. The non-volatile memory may be a removable card. The copy function is typically done in low power modes. Alternatively, the information is only copied provided sufficient battery capacity remains to perform the copy function.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: December 30, 2008
    Assignee: Palm, Inc.
    Inventor: Yoon Kean Wong
  • Patent number: 7472304
    Abstract: An extendible timing architecture for an integrated circuit is disclosed. The extendible timing architecture provides metal programmable components for use with different operational clock frequencies. In some embodiments the architecture utilizes master/slave DLLs with a double data rate memory circuit.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: December 30, 2008
    Assignee: Rapid Bridge, LLC
    Inventors: Behnam Malekkhosravi, Nadim Hashim Shaikli
  • Patent number: 7472305
    Abstract: Apparatus for limiting an output signal frequency of an on-chip clock generator is presented. Electronic circuitry compares the value of a ratio between the internal clock signal frequency and the reference clock input signal frequency with minimum and maximum calibration word signals, in order to determine if the reference clock input signal frequency is within a permitted range. If the reference clock input signal frequency is not within the permitted range, the apparatus sends a tamper alert to the chip or to a system, and the output clock signal frequency is not changed according to the reference clock input signal frequency, thereby protecting the chip from erroneous or tampered clock signal. The output clock signal is buffered from the reference clock input signal insuring that the output clock signal frequency is within the permitted range. The apparatus can operate without providing the reference input clock signal.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: December 30, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Ziv Hershman, Assaf Koren, Leonid Azriel
  • Patent number: 7472306
    Abstract: An apparatus and a system, as well as a method and article, may operate to independently adjust a plurality of processor clocks coupled to a corresponding plurality of networked processors responsive to one or more status indicators to provide scalable performance and power consumption. The status indicators may indicate the status of routers coupled to the processors. Additional apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: May 18, 2004
    Date of Patent: December 30, 2008
    Assignee: Intel Corporation
    Inventors: Ernest Tsui, Inching Chen
  • Patent number: 7472307
    Abstract: Exemplary storage network architectures, data architectures, and methods for creating and using snapdifference files in storage networks are described. One exemplary method may be implemented in a processor in a storage network. The method comprises detecting a failure in a source volume, and in response to the failure: terminating communication with one or more applications that generate I/O requests to the source volume; refreshing the source volume; copying a backup data set to the source volume, and while the backup data set is being copied: activating a new snapdifference file; restarting communication with one or more applications that generate I/O requests to the source volume; and recording I/O operations to the source volume in the snapdifference file.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: December 30, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Rodger Daniels, Lee Nelson, Andrew Dallmann
  • Patent number: 7472308
    Abstract: When a failure is detected in a server currently being used, a management server changes the network topology for the server currently being used and another server which substitutes the server. Then, the management server instructs the network SW with the changed network topology so as to cause the network SW to set the network topology logically. In addition, the management server instructs a disk array unit to control accesses from the other server to the disk in accordance with the server where the failure is detected.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: December 30, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Shinya Takuwa, Yoshifumi Takamoto, Kouji Masuda
  • Patent number: 7472309
    Abstract: A method and apparatus to write a file to a nonvolatile memory is provided. The method may include writing a file to a nonvolatile memory using at least two headers and at least two file fragments and using only information stored in one header of the at least two headers to determine if the writing of the file to the nonvolatile memory was interrupted by a loss of power. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: December 30, 2008
    Assignee: Intel Corporation
    Inventor: Kiran Kumar G. Bangalore
  • Patent number: 7472310
    Abstract: The present invention aims at providing a debugging mechanism capable of detecting erroneous read access to a bus slave caused by a synchronization control infringement between bus masters due to a failure of software. Each of a dirty detector and a coherency error detector is used as a detector for monitoring a bus control unit and, during a period that write access corresponding to optionally designated conditions is present on a write buffer, detecting read access corresponding to conditions equal to the aforementioned conditions. A bus master includes a debugging unit. The debugging unit receives a coherency error notification from the coherency error detector to generate a debugging event, breaks an operation of the bus master, and performs various debugging operations while using the debugging event as a trigger.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: December 30, 2008
    Assignee: Panasonic Corporation
    Inventor: Akira Ueda
  • Patent number: 7472311
    Abstract: One embodiment of the present invention provides a system that can test an interface between a TCP (Transmission Control Protocol) Offload Engine (TOE) and an OS (Operating System) that has a TCP software stack. Note that the TOE is a specialized integrated circuit which allows TCP-related computations to be offloaded from the processor that executes the OS. During operation, the system receives a request from the OS to perform a TCP-related computation on the TOE, wherein the TCP-related computation is associated with a portion of the TCP software stack. The system then performs the TCP-related computation by executing the portion of the TCP software stack on a processor, which can either be the same as the one that is executing the OS, or it can be a different processor. Note that performing the TCP-related computation on a processor, instead of the TOE, allows the interface between the TOE and the OS to be tested without requiring an actual TOE chip.
    Type: Grant
    Filed: October 14, 2005
    Date of Patent: December 30, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Hsiao-Keng J. Chu, Eric T. Cheng, Sunay Tripathi
  • Patent number: 7472312
    Abstract: Method, apparatus and program product are provided for rebuilding faulty metadata in a storage controller coupled to a host device. Faulty metadata may include metadata which no longer matches the associated customer data tracks stored on a DASD or other storage device. When an error in metadata is describing a first customer track is detected, a range of other customer tracks in which the error is also likely to have occurred is identified. The metadata tracks associated with the first customer track and the other customer tracks are selected to be invalidated. A command is received through a host interface, and the specified metadata tracks are invalidated while the controller remains on-line with the host and continues to process other host I/O operations. Subsequently, the invalidated metadata tracks are rebuilt. The disclosed method, apparatus and program product invalidate the faulty metadata with reduced impact on normal host/controller I/O operations.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Coporation
    Inventors: Thomas C. Jarvis, Ronald M. Kern
  • Patent number: 7472313
    Abstract: A primary server and a backup server that both run a RADIUS client in a cold start configuration share a single IP address that includes a limited number of message identifiers (MIDs). The primary server and the backup server each have a small number of fixed message identifiers. In addition, a large number of shared message identifiers are used by the primary server, and then used by the backup server a predetermined time after the primary server fails.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: December 30, 2008
    Assignee: Tellabs Petaluma, Inc.
    Inventors: Tsang Ming Jiang, Jhaanaki Krishnan, Weifang Yang
  • Patent number: 7472314
    Abstract: A system for, and method of, monitoring link delays and faults in an IP network. In one embodiment, the system includes: (1) a monitoring station identifier that computes a set of monitoring stations that covers links in at least a portion of the network and (2) a probe message identifier, coupled to the monitoring station identifier, that computes a set of probe messages to be transmitted by at least ones of the set of monitoring stations such that the delays and faults can be determined.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: December 30, 2008
    Assignee: Alcatel - Lucent USA Inc.
    Inventors: Yigal Bejerano, Rajeev Rastogi
  • Patent number: 7472315
    Abstract: An apparatus, system and method of integrating performance monitor data with thermal event information are provided. A thermal event, in this case, is when the temperature of a chip within which is embedded a processor exceeds a user-configurable value while the processor is processing instructions and/or using storage devices that are being monitored. In any event, when the thermal event occurs, the temperature of the chip along with the performance monitor data is stored for future uses, which include performance and diagnostic analyses.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Michael Stephen Floyd, Alexander Erik Mericas, Robert Dominick Mirabella
  • Patent number: 7472316
    Abstract: In a coding system wherein an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: December 30, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiro Kikuchi, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai
  • Patent number: 7472317
    Abstract: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: December 30, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiro Kikuchi, Toshiaki Watanabe, Kenshi Dachiku, Takeshi Chujoh, Takeshi Nagai