Patents Issued in March 31, 2009
-
Patent number: 7510957Abstract: A semiconductor device which includes a laterally extending stack of laterally adjacent conductive semiconductor regions formed over a support surface of a substrate, and a method for fabricating the device.Type: GrantFiled: December 4, 2006Date of Patent: March 31, 2009Assignee: International Rectifier CorporationInventors: Robert Beach, Paul Bridger
-
Patent number: 7510958Abstract: A method of manufacturing a semiconductor device includes an improved bump forming process. The bump forming process includes a bump forming step for forming a bump on the pad by feeding a gold wire from a capillary while moving the capillary; a sliding step of slightly moving the capillary in an almost horizontal direction after the formation of the bump to reduce the strength of the base portion of the gold wire connected to the bump; and a wire cutting step of cutting the gold wire at the base portion after the sliding step. In the sliding step, a moving speed of the capillary is made smaller than that in the bump forming step.Type: GrantFiled: December 5, 2006Date of Patent: March 31, 2009Assignee: Renesas Technology Corp.Inventors: Tetsuya Iwata, Namiki Moriga
-
Patent number: 7510959Abstract: A method of manufacturing a semiconductor device having damascene structures with air gaps is provided. In one embodiment, the method comprises the steps of depositing and patterning a disposable layer, depositing a first barrier layer on top of the patterned disposable layer, depositing a metal layer, planarizing the metal layer, depositing a second barrier layer, planarizing the second barrier layer until substantially no barrier layer material is present on top of the disposable layer, depositing a permeable layer, removing the disposable layer through the permeable layer to form air gaps.Type: GrantFiled: March 16, 2005Date of Patent: March 31, 2009Assignees: Interuniversitair Microelektronica Centrum (IMEC), Koninklikje Phillips ElectronicsInventors: Roel Daamen, Viet Nguyen Hoang
-
Patent number: 7510960Abstract: A method and apparatus for forming connections within a semiconductor device is disclosed. The semiconductor device incorporates a contact bridge between transistor contacts in close proximity. The contact bridge comprises a plurality of metal pillars each having a lower end in electrical contact with first and second transistor elements, respectively; one or more intermediate metal pillars disposed between and in electrical contact with an upper end of the metal pillars; and one or more separation regions of dielectric disposed below the intermediate metal pillar and between the lower ends of the first and second metal pillars.Type: GrantFiled: August 29, 2006Date of Patent: March 31, 2009Assignee: International Business Machines CorporationInventor: James J. Toomey
-
Patent number: 7510961Abstract: A method for manufacturing an interconnect structure situated on a semiconductor wafer having a substrate assembly thereon. The interconnect structure is formed in a recess such as a trench, a hole, a via, or a combination of a trench and a hole or via within a dielectric material situated on the substrate assembly of the semiconductor wafer. At least one barrier layer is deposited within the recess. A seed layer helping to promote nucleation, deposition, and growth of a material that will be used to fill up the recess is then deposited on the barrier layer. An electrically conductive layer is then formed upon the seed layer. An energy absorbing layer will then be formed upon the conductor layer, where the energy absorbing layer has a greater thermal absorption capacity than that of the electrically conductive layer. The energy absorbing layer is heated, with or without an applied heightened pressure, to cause the conductor layer to flow so as to fill voids that have formed within the dielectric structure.Type: GrantFiled: February 14, 1997Date of Patent: March 31, 2009Assignee: Micron Technology, Inc.Inventor: John H. Givens
-
Patent number: 7510962Abstract: This invention relates to a process for manufacturing an anisotropic conducting film comprising a layer of electrically insulating material and conducting through inserts, the process including the following steps: a) formation on a substrate of at least one layer of material with through holes, the layer being called the perforated layer, b) filling of the through holes to form conducting inserts. The process also includes production of a mask partially covering a first end of the conducting inserts and etching of the unmasked part of the ends of the conducting inserts so as to obtain conducting inserts with pointed ends. The invention is applicable to the formation of components (chips, integrated circuits) with a high interconnections density.Type: GrantFiled: July 15, 2004Date of Patent: March 31, 2009Assignee: Commissariat a l'Energie AtomiqueInventors: Jean Brun, Christiane Puget
-
Patent number: 7510963Abstract: A semiconductor device and manufacturing method thereof include a semiconductor substrate, an interlevel dielectric (ILD) layer formed on the semiconductor substrate, a first contact stud formed in the ILD layer, having a width of an entrance portion adjacent to the surface of the ILD layer larger than the width of a contacting portion adjacent to the semiconductor substrate, and a second contact stud spaced apart from the first contact stud and formed in the ILD layer. The semiconductor device further includes a landing pad formed on the ILD layer to contact the surface of the second contact stud, having a width larger than that of the second contact stud. The second contact stud has a width of a contacting portion that is the same as that of an entrance portion. Also, at least one spacer comprising an etch stopper material is formed on the sidewalls of the landing pad and the etch stopper is formed on the landing pad.Type: GrantFiled: November 16, 2004Date of Patent: March 31, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Won-suk Yang, Ki-nam Kim, Hong-sik Jeong
-
Patent number: 7510964Abstract: The invention is directed to a method for manufacturing semiconductor device. The method comprises steps of providing a substrate and then forming a dielectric material-containing device over the substrate. A plasma vapor deposition process is performed to form a dielectric layer over the substrate. A first baking process is performed.Type: GrantFiled: January 26, 2006Date of Patent: March 31, 2009Assignee: United Microelectronics Corp.Inventors: Chih-Jen Mao, Kuo-Wei Yang, Hui-Shen Shih, Chun-Han Chuang
-
Patent number: 7510965Abstract: A method for fabricating a dual damascene structure contains providing a substrate having a conductive layer, an etching stop layer, a dielectric layer, and a photoresist layer thereon, performing an etching process to remove a portion of the dielectric layer through a via pattern of the photoresist layer for forming a via structure in the dielectric layer, providing CO-containing gas to perform an ash process, filling GFP materials into the via structure, forming a photoresist layer with a trench pattern on the substrate, etching the dielectric layer through the trench pattern to form a trench structure in the dielectric layer, above the via structure, and removing the etching stop layer exposed in the via structure.Type: GrantFiled: November 30, 2006Date of Patent: March 31, 2009Assignee: United Microelectronics Corp.Inventor: Hong Ma
-
Patent number: 7510966Abstract: The invention includes an electrically conductive line, methods of forming electrically conductive lines, and methods of reducing titanium silicide agglomeration in the fabrication of titanium silicide over polysilicon transistor gate lines. In one implementation, a method of forming an electrically conductive line includes providing a silicon-comprising layer over a substrate. An electrically conductive layer is formed over the silicon-comprising layer. An MSixNy-comprising layer is formed over the electrically conductive layer, where “x” is from 0 to 3.0, “y” is from 0.5 to 10, and “M” is at least one of Ta, Hf, Mo, and W. An MSiz-comprising layer is formed over the MSixNy-comprising layer, where “z” is from 1 to 3.0. A TiSia-comprising layer is formed over the MSiz-comprising layer, where “a” is from 1 to 3.0.Type: GrantFiled: March 7, 2005Date of Patent: March 31, 2009Assignee: Micron Technology, Inc.Inventors: Qi Pan, Jiutao Li, Yongjun Jeff Hu, Allen McTeer
-
Patent number: 7510967Abstract: The present invention relates to a method for manufacturing a semiconductor device, comprising: forming a metal interconnect on a substrate; forming a refractory metal layer containing titanium (Ti) or tantalum (Ta) on a surface of the metal interconnect; forming an insulating interlayer so as to cover the refractory metal layer; selectively etching the insulating interlayer with an etchant gas containing an organic fluoride to form a hole, in which the refractory metal layer is exposed; treating an interior of the hole with an organic chemical solution to remove fluorinated compounds of Ti or Ta while leaving fluorocarbons on the surface of the refractory metal layer, the fluorinated compounds of Ti or Ta and the fluorocarbons being created during the etching step and present in the interior of the hole; and performing plasma-treatment for the interior of said hole to remove the fluorocarbon.Type: GrantFiled: May 25, 2007Date of Patent: March 31, 2009Assignee: NEC Electronics CorporationInventor: Kousei Ushijima
-
Patent number: 7510968Abstract: A cap for a semiconductor device package, including a body formed at a predetermined thickness with a cavity. The cap further includes a first seed layer formed on an inner circumference of a first via hole formed at a predetermined depth from the cavity formation surface of the body, a second seed layer formed on an inner circumference of a second via hole formed at a predetermined depth from the opposite surface to the cavity formation surface of the body, and plating materials filled in the first via hole and the second via hole.Type: GrantFiled: April 28, 2006Date of Patent: March 31, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Moon-chul Lee, Jong-oh Kwon, Kae-dong Back, Qian Wang, Jun-sik Hwang, Kyu-dong Jung
-
Patent number: 7510969Abstract: In an electrode line structure of a semiconductor device and a method for forming the same, the electrode line structure comprises a semiconductor substrate, and electrode lines, which are formed on the semiconductor substrate, and have an inclined end in the long axis direction. The electrode lines each include a first line unit, which substantially functions as an electrode line, a second line unit, which has an inclined end in the long axis direction and is separated from the first line unit by a predetermined distance, and an insulating plug, which is interposed between the first line unit and the second line unit and electrically insulates the first line unit from the second line unit.Type: GrantFiled: January 9, 2007Date of Patent: March 31, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Joo-won Lee, Kang-soo Chu, Jae-eun Park, Jong-ho Yang
-
Patent number: 7510970Abstract: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.Type: GrantFiled: February 21, 2006Date of Patent: March 31, 2009Assignee: Renesas Technology Corp.Inventors: Naofumi Ohashi, Junji Noguchi, Toshinori Imai, Hizuru Yamaguchi, Nobuo Owada, Kenji Hinode, Yoshio Homma, Seiichi Kondo
-
Patent number: 7510972Abstract: A method of processing a substrate which enables a surface damaged layer and polishing remnants on the surface of an insulating film to be removed, and enable the amount removed of the surface damaged layer and polishing remnants to be controlled easily. An insulating film on a substrate, which has been revealed by chemical mechanical polishing, is exposed to an atmosphere of a mixed gas containing ammonia and hydrogen fluoride under a predetermined pressure. The insulating film which has been exposed to the atmosphere of the mixed gas is heated to a predetermined temperature.Type: GrantFiled: February 14, 2006Date of Patent: March 31, 2009Assignee: Tokyo Electron LimitedInventors: Eiichi Nishimura, Kenya Iwasaki
-
Patent number: 7510973Abstract: A method for forming a fine pattern in a semiconductor device is provided. In one aspect, the method can construct a fine pattern in semiconductor devices. The fine pattern has a critical dimension that overcomes the resolution limit of an exposure equipment.Type: GrantFiled: June 29, 2007Date of Patent: March 31, 2009Assignee: Hynix Semiconductor Inc.Inventor: Keun Kyu Kong
-
Patent number: 7510974Abstract: A CMP process is provided. A first polishing process on a wafer is performed using a first hard polishing pad with a first slurry. Then, a buffering process on the wafer is performed using a soft polishing pad with a cleaning agent to buffer the pH value in the first polishing process and to remove at least portion of the first slurry and the cleaning agent by the contact with the first soft polishing pad simultaneously. Thereafter, a second polishing process on the wafer is performed using a second hard polishing pad with a second slurry such that the pH value after the buffering process is between the pH value in the first polishing process and the pH value in the second polishing process. The method can avoid the scratch issue of wafer surface by particles resulting from pH shock and cross contamination.Type: GrantFiled: May 5, 2006Date of Patent: March 31, 2009Assignee: United Microelectronics Corp.Inventors: Chih-Yueh Li, Kai-Chun Yang, Tzu-Yi Chuang, Chien-Hsuan Chen, Min-Hao Yeh
-
Patent number: 7510975Abstract: In the method for manufacturing a semiconductor device according to the invention including the step of forming trenches having the depth thereof in perpendicular to the major surface of a semiconductor substrate, the step of forming trenches includes the steps of performing trench etching using an insulator film, formed on the major surface of the semiconductor substrate and shaped with a predetermined pattern, for a mask to form the trenches; etching the inside of the trenches using a halogen containing gas to smoothen the inside of the trenches; and thermally treating in a non-oxidizing and non-nitriding atmosphere. The manufacturing method according to the invention facilitates well removing the etching residues remaining in the trenches and rounding the trench corners properly when the trenches are 2 ?m or narrower in width and even when the trenches are 1 ?m or narrower in width.Type: GrantFiled: September 23, 2005Date of Patent: March 31, 2009Assignee: Fuji Electric Holdings Co., Ltd.Inventors: Daisuke Kishimoto, Hitoshi Kuribayashi, Yuji Sano, Akihiko Ohi, Yoshihiko Nagayasu
-
Patent number: 7510976Abstract: A plasma etch process for successively different layers, including an anti-reflection coating (ARC), an amorphous carbon layer (ACL) and a dielectric layer, with successively different etch chemistries is performed in a single plasma reactor chamber. A first transition step is performed after etching the ARC by replacing the fluorine-containing process gas used in the ARC etch step with an inert species process gas. A flush step is performed after etching the ACL by replacing the hydrogen-containing process gas used in the ACL etch step with argon gas.Type: GrantFiled: May 16, 2006Date of Patent: March 31, 2009Assignee: Applied Materials, Inc.Inventors: Shing-Li Sung, Wonseok Lee, Judy Wang, Shawming Ma
-
Patent number: 7510977Abstract: A method for manufacturing a silicon carbide (SiC) semiconductor device is disclosed that uses dry etching with the use of high-density inductive coupled plasma (ICP). The method employs a first dry etching and a sequential second dry etching under conditions that differ from those used in the first dry etching. The dry etch process allows a trench to be deeply etched to a depth of more than 3 ?m in a SiC laminated semiconductor substrate and allows the bottom of the trench to be flat without forming a convexo-concave shape having an acute angle which has an influence on characteristics of a breakdown voltage due to electric field concentration being caused in the bottom.Type: GrantFiled: June 4, 2007Date of Patent: March 31, 2009Assignee: Fuji Electric Holdings Co., Ltd.Inventor: Yasuyuki Kawada
-
Patent number: 7510978Abstract: In the invention of this application, the resist pattern having a given pattern of opening concavity is formed on the component to be dry etched, the aqueous solution containing a water-soluble resin is filled in that opening concavity, and the filled aqueous solution containing a water-soluble resin is dried into a narrow shrunk resin at the middle of the opening concavity, whereby the mask of shrunk resin is formed. It is thus possible to form a micropattern much finer than determined by optical limits.Type: GrantFiled: February 13, 2007Date of Patent: March 31, 2009Assignee: TDK CorporationInventor: Akifumi Kamijima
-
Patent number: 7510979Abstract: Disclosed are a light absorbent agent polymer for organic anti-reflective coating which can prevent diffused light reflection of bottom film layer or substrate and reduce standing waves caused by a variation of thickness of the photoresist itself, thereby, increasing uniformity of the photoresist pattern, in a process for forming ultra-fine patterns of photoresist for photolithography by using 193 nm ArF among processes for manufacturing semiconductor devices, and its preparation method. Also, the present invention discloses an organic anti-reflective coating composition comprising a light absorbent agent polymer for the organic anti-reflective coating and a pattern formation process using the coating composition.Type: GrantFiled: June 28, 2007Date of Patent: March 31, 2009Assignee: Hynix Semiconductor Inc.Inventors: Jae-chang Jung, Keun Kyu Kong, Jin-soo Kim
-
Patent number: 7510980Abstract: A method for manufacturing a semiconductor device of the present invention includes: forming a first film, a second film and a third film in sequence on a silicon substrate; patterning a resist film formed on the third film by conducting an exposure and developing process for the resist film employing an exposure mask including a phase shifter; selectively dry-etching the third film through a mask of the resist film employing the second film as an etch stop to process the third film into a first pattern; further dry-etching the third film employing the second film as an etch stop to partially remove the third film, thereby processing the third film into a second pattern; patterning the second film employing the third film having the second pattern as a mask; and patterning the first film employing the patterned second film as a mask.Type: GrantFiled: November 21, 2006Date of Patent: March 31, 2009Assignee: NEC Electronics CorporationInventors: Toshihisa Koretsune, Masato Fujita
-
Patent number: 7510981Abstract: A semiconductor device includes an element isolation film, which exhibits less variations in the height dimension from the surface of the substrate and has a desired height dimension from the surface of the substrate. A process for manufacturing a semiconductor device includes: providing a predetermined pattern of a silicon nitride film and a protective film which covers the silicon nitride film, on a semiconductor substrate; selectively etching the semiconductor substrate using the protective film as a mask to form a trenched portion; removing the protective film to expose the silicon nitride film; depositing an element isolation film, so as to fill the trenched portion therewith and cover the silicon nitride film; removing the element isolation film formed on the silicon nitride film by polishing thereof until the silicon nitride film is exposed; and removing the silicon nitride film.Type: GrantFiled: October 4, 2006Date of Patent: March 31, 2009Assignee: NEC Electronics CorporationsInventors: Akira Mitsuiki, Tomoo Nakayama, Osamu Fujita
-
Patent number: 7510982Abstract: Porous dielectric layers are produced by embedding and removing nanoparticles in composite dielectric layers. The pores may be produced after the barrier material, the metal or other conductive material is deposited to form a metallization layer. In this manner, the conductive material is provided with a relatively smooth continuous surface on which to deposit.Type: GrantFiled: June 6, 2005Date of Patent: March 31, 2009Assignee: Novellus Systems, Inc.Inventors: Nerissa S. Draeger, Gary William Gray
-
Patent number: 7510983Abstract: Embodiments of an electronic apparatus and embodiments for methods of forming the electronic apparatus include a conductive layer having an iridium-based layer, where the conductive layer is disposed on a dielectric layer containing zirconium oxide. In various embodiments, each of the zirconium oxide layer and the iridium-based layer may be structured as one or more monolayers. In various embodiments, each of the iridium-based layer and the zirconium oxide layer may be formed using atomic layer deposition.Type: GrantFiled: June 14, 2005Date of Patent: March 31, 2009Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
-
Patent number: 7510984Abstract: A method of forming a silicon nitride film comprises: forming a silicon nitride film by applying first gas containing silicon and nitrogen and second gas containing nitrogen and hydrogen to catalyst heated in a reduced pressure atmosphere. A method of manufacturing a semiconductor device comprising the steps of: forming a silicon nitride film by the method as claimed in claim 1 on a substrate having the semiconductor layer, a gate insulation film selectively provided on a principal surface of the semiconductor layer, and a gate electrode provided on the gate insulation film; and removing the silicon nitride film on the semiconductor layer and the gate electrode and leaving a sidewall comprising the silicon nitride film on a side surface of the gate insulation film and the gate electrode by etching the silicon nitride film in a direction generally normal to the principal surface of the semiconductor layer.Type: GrantFiled: February 15, 2005Date of Patent: March 31, 2009Assignee: Ulvac, Inc.Inventors: Tsuyoshi Saito, Hiromi Itoh, Makiko Kitazoe
-
Patent number: 7510985Abstract: A method is described for the manufacture of structured flexible metallic patterns in which a metallic layer on a flexible substrate is structured using laser ablation. The flexible patterns manufactured in this fashion may be used as interposers (strap) for RFID tags or RFID antennas.Type: GrantFiled: October 26, 2005Date of Patent: March 31, 2009Assignee: LPKF Laser & Electronics AGInventors: Andreas Boenke, Dieter J. Meier
-
Patent number: 7510986Abstract: In a production process for a semiconductor device employing an SiC semiconductor substrate (1), the SiC semiconductor substrate (1) is mounted on a susceptor (23), and a C heating member (3) of carbon is placed on a surface of the SiC semiconductor substrate (1). An annealing process is performed to form an impurity region in the surface of the SiC semiconductor substrate (1) by causing the susceptor (23) and the C heating member (3) to generate heat at high temperatures.Type: GrantFiled: December 21, 2004Date of Patent: March 31, 2009Assignee: Rohm Co., Ltd.Inventor: Mineo Miura
-
Patent number: 7510987Abstract: A coated base fabric for airbags, which is fabricated by applying a resin elastomer to a base fabric formed of flattened cross-section yarns having a degree of filament cross-section flatness (that is, a ratio of the major axis length to the minor axis length of the filament cross-section) of from 1.5 to 8, and which is characterized in that the filaments are aligned in the base fabric in such a manner that the total average horizontal index (HI) represented by the following formula falls within a range of from 0.75 to 1.0, and the amount of the resin elastomer adhered to the fabric is from 0.1 to 60 g/m2. The base fabric for airbags has well-balanced properties of good mechanical properties, flame resistance, complete air-imperviousness, flexibility, compactness and containability.Type: GrantFiled: January 9, 2003Date of Patent: March 31, 2009Assignee: Toray Industries, Inc.Inventor: Taiichi Okada
-
Patent number: 7510988Abstract: In at least one embodiment, a particulate water-absorbing agent is provided which not only ensures the many conventional physical properties (absorption rate, centrifuge retention capacity, absorbency against pressure, particle size distribution etc.) but also prevents odor which is generated after the resin is swollen by absorption. The water absorbent agent of an embodiment of the present invention therefore does not cause odor in actual use. As a result of intensive study of the foregoing problem, an embodiment of the present invention offers a way of controlling a specific odor component, which is generated from impurities and/or by-product derived from the raw material, after the high temperature process. In this way, an embodiment of the present invention successfully provides a water absorbent agent not causing odor after the resin is swollen by absorption.Type: GrantFiled: September 22, 2005Date of Patent: March 31, 2009Assignee: Nippon Shokubai Co., Ltd.Inventors: Katsuyuki Wada, Hiroko Ueda, Kazuki Kimura, Kunihiko Ishizaki
-
Patent number: 7510989Abstract: The invention is directed to a silver-containing polarizing boroaluminosilicate glass composition that has been doped with a noble metal selected from the group consisting of Pt, Pd, Os, Ir, Rh and Ru, including mixtures thereof, to nucleate and precipitate silver ions to silver metal without the need for a reducing atmosphere step. The invention is further directed to a method for making the glass composition of the invention. Using the composition and method of the invention, one can prepare a glass having a selected null transmission range.Type: GrantFiled: October 20, 2006Date of Patent: March 31, 2009Assignee: Corning IncorporatedInventors: Nicholas Francis Borrelli, George Bigelow Hares, Sasha Marjanovic, David John McEnroe, Katherine Rose Rossington, Joseph Francis Schroeder, III
-
Patent number: 7510990Abstract: A sputtering target contains Si and C as its major components and includes a texture in which a Si phase continuously exists in a net shape in gaps among SiC crystal grains. An average diameter of the Si phase is controlled to 1000 nm or less. The sputtering target is sputtered in an oxygen-containing gas, thereby depositing an optical thin film containing Si and O as its major components, and a third element other than the major components, a total amount of the third element being within a range from 10 to 2000 ppm.Type: GrantFiled: March 7, 2006Date of Patent: March 31, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Yasuhiro Satoh, Tsukasa Nakai, Sumio Ashida, Shoko Suyama, Yoshiyasu Ito
-
Patent number: 7510991Abstract: The present invention is directed to a noise suppressor for electronic signals. The noise suppressor at least includes Aluminum Oxide (Al2O3) that is sintered under high temperature, resulting in ceramic Aluminum Oxide (Al2O3) for effectively absorbing or suppressing noise, and reshaping the waveform or filtering waveform glitch of the electronic signals.Type: GrantFiled: July 17, 2006Date of Patent: March 31, 2009Assignee: Y&L Technology Inc.Inventors: Cheng-Cheng Wu, Chien-Lung Chen, Cheng-Fu Wu
-
Patent number: 7510992Abstract: The use of two mercury and arsenic removal media: A) a sulfur-impregnated organoclay; and B) a coupling agent-reacted organoclay, wherein the coupling agent preferably contains a mercapto, disulfide, tretrasulfide and/or polysulfide end group provides mercury removal media having increased reactivity, stability, and synergistic mercury removal ability. The preferred mercury removal media described herein is prepared by reacting an organophilic clay containing onium ions A) with elemental sulfur; and B) with a sulfur-containing coupling agent, preferably containing a mercapto, disulfide, tetrasulfide, and/or polysulfide moiety.Type: GrantFiled: May 7, 2008Date of Patent: March 31, 2009Assignee: AMCOL International CorporationInventors: Zhen Wang, Robert Abraham
-
Patent number: 7510993Abstract: Compositions and methods for depositing one or more metal or metal alloy films on substrates. The compositions contain a catalyst, one or more carrier particles and one or more water-soluble or water-dispersible organic compounds. Metal or metal alloys may be deposited on the substrates by electroless or electrolytic deposition.Type: GrantFiled: June 24, 2004Date of Patent: March 31, 2009Assignee: Rohm and Haas Electronic Materials LLCInventors: Peter R. Levey, Nathaniel E. Brese
-
Patent number: 7510994Abstract: A catalyst is provided which is low in methane selectivity in a high CO conversion region and high in chain growth probability ? in a Fischer-Tropsch synthesis and comprises a support comprising silica or alumina and an oxide of zirconium and/or titanium loaded thereon in film form in an amount ranging from 0.5 percent by mass to 10.0 percent in terms of metal, and one or more metals selected from the group consisting of cobalt, nickel and ruthenium loaded on the support.Type: GrantFiled: October 3, 2006Date of Patent: March 31, 2009Assignee: Nippon Oil CorporationInventors: Masakazu Ikeda, Toshio Waku, Nobuo Aoki
-
Patent number: 7510995Abstract: A method for applying a mixed metal oxide catalyst to a metallic substrate for the creation of a robust, high temperature catalyst system for use in decomposing propellants, particularly hydrogen peroxide propellants, for use in propulsion systems. The method begins by forming a prepared substrate material consisting of a metallic inner substrate and a bound layer of a noble metal intermediate. Alternatively, a bound ceramic coating, or frit, may be introduced between the metallic inner substrate and noble metal intermediate when the metallic substrate is oxidation resistant. A high-activity catalyst slurry is applied to the surface of the prepared substrate and dried to remove the organic solvent. The catalyst layer is then heat treated to bind the catalyst layer to the surface. The bound catalyst layer is then activated using an activation treatment and calcinations to form the high-activity catalyst system.Type: GrantFiled: April 1, 2003Date of Patent: March 31, 2009Assignee: United Technologies CorporationInventors: Kathleen M. Sevener, Kevin A. Lohner, Jeffrey A. Mays, Daniel L. Wisner
-
Patent number: 7510996Abstract: A hydrogen storage material is expressed by a composition formula, (Ca1-xAx)1-z(Si1-yBy)z, wherein “A” is at least one member selected from the group consisting of alkali metal elements, alkaline-earth metal elements, rare-earth elements, the elements of groups 3 through 6, Ni, Au, In, Tl, Sn, Fe, Co, Cu and Ag; “B” is at least one member selected from the group consisting of the elements of groups 7 through 17, rare-earth elements, Hf and Be; 0?x<1 by atomic ratio; 0?y<1 by atomic ratio; and 0.38?z?0.58 by atomic ratio. It is lightweight as well as less expensive. In principle, neither high-temperature nor high-pressure activation is required, because it exhibits a high initial activity. The operation temperature can be lowered and the hydrogen absorption content can be enlarged by controlling the kind and substitution proportion of the substituent elements appropriately.Type: GrantFiled: June 10, 2004Date of Patent: March 31, 2009Assignee: Kabushiki Kaisha Toyota Chuo KenkyushoInventors: Masakazu Aoki, Nobuko Oba, Shin-ichi Towata, Tatsuo Noritake
-
Patent number: 7510997Abstract: The present invention relates to epitaxial, electrically conducting and mechanically robust, cubic nitride buffer layers deposited epitaxially on biaxially textured substrates such as metals and alloys. The invention comprises of a biaxially textured substrate with epitaxial layers of nitrides. The invention also discloses a method to form such epitaxial layers using a high rate deposition method as well as without the use of forming gases. The invention further comprises epitaxial layers of oxides on the biaxially textured nitride layer. In some embodiments the article further comprises electromagnetic devices which may have superconducting properties.Type: GrantFiled: August 17, 2004Date of Patent: March 31, 2009Assignees: Applied Thin Films, Inc., UT-Battelle, LLCInventors: Sambasivan Sankar, Amit Goyal, Scott A. Barnett, Ilwon Kim, Donald M. Kroeger
-
Patent number: 7510998Abstract: A silicone grease composition is provided comprising (A) 2-40% by weight of an organopolysiloxane having a kinematic viscosity of 50-500,000 mm2/s at 25° C., and (B) 60-98% by weight of at least one heat conductive filler selected from among metal powders, metal oxide powders and ceramic powders having a thermal conductivity of at least 10 W/m° C. and an average particle size of 0.1-15.0 ?m. Coarse particles are removed such that a 500-mesh oversize fraction is not more than 50 ppm and a 325-mesh oversize fraction is substantially zero.Type: GrantFiled: May 20, 2005Date of Patent: March 31, 2009Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Kunihiro Yamada, Akihiro Endo, Kunihiko Mita
-
Patent number: 7510999Abstract: A lubricant composition is provided comprising a first liquid lubricant and a second liquid lubricant, wherein the first liquid lubricant contains a cyclotriphosphazene ring attached to at least one perfluoropolyether having a single terminal hydroxyl group, and the second liquid lubricant contains a perfluoropolyether having two end groups selected from hydroxyl, tertiary amine, and combinations thereof. A magnetic recording media is also provided, comprising a substrate, a magnetic layer, an overcoat layer and a lubricant layer thereon, wherein the lubricant layer is formed from the lubricant composition. A further aspect of the invention concerns a method of making a magnetic recording media comprising forming a magnetic layer on a substrate; forming a protective overcoat layer on the magnetic layer; and forming a lubricant layer on the surface of the overcoat layer by applying the lubricant composition to the surface of the overcoat layer.Type: GrantFiled: May 28, 2004Date of Patent: March 31, 2009Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Hong Deng, Robert Waltman, Jinliu Wang
-
Patent number: 7511000Abstract: A gear part of the present invention includes a lubrication coating formed on a surface of the gear part, the lubrication coating containing an organic phosphorous compound. In the gear part, when a tooth surface of the gear part is engaged with a tooth surface of a counter member, the organic phosphorous compound is transferred to the tooth surface of the counter member and another lubrication coating containing the organic phosphorous compound is formed on the tooth surface of the counter member. As a result, the lubrication coating can be held on the surface of the gear part for long periods.Type: GrantFiled: November 16, 2004Date of Patent: March 31, 2009Assignee: Nissan Motor Co., Ltd.Inventors: Yoshiharu Matsuda, Kazuo Tatsumi, Tohji Yokoyama
-
Patent number: 7511001Abstract: The present invention relates to substituted cyclohexyl propanal compounds and their use in enhancing fragrance formulations in perfumes, toilet waters, colognes, personal products, and the like.Type: GrantFiled: July 31, 2007Date of Patent: March 31, 2009Assignee: International Flavors & Fragrances Inc.Inventors: Anthony T. Levorse, Jr., Brett D. Newirth
-
Patent number: 7511002Abstract: The invention relates to an oil-in-water emulsion obtained by mixing (a) a polymer compound having, in a side chain, a group represented by formula (1): -OX)n-E2-R??(1) wherein X represents a C1 to C6 divalent saturated hydrocarbon group, n is a number of 5 to 300, E2 is an ether linkage or an ester linkage, and R represents a C4 to C30 hydrocarbon group, (b) a water-soluble polyol, (c) a nonionic surfactant, (d) a hydrophobic compound, and water and diluting the resulting mixture with water and a process for producing the same.Type: GrantFiled: April 26, 2005Date of Patent: March 31, 2009Assignee: Kao CorporationInventors: Takeshi Ihara, Ikuo Sugano
-
Patent number: 7511003Abstract: Personal cleansing compositions comprise (A) a cleansing phase containing a surfactant and water; and (B) a separate benefit phase containing a hydrophobic material; wherein the cleansing and benefit phases are packaged together and are in physical contact. The two phases are packaged in physical contact and remain separate and stable at ambient conditions for at least 180 days. These compositions and corresponding methods provide improved cosmetics, skin feel, and/or skin benefit efficacy.Type: GrantFiled: October 31, 2003Date of Patent: March 31, 2009Assignee: The Procter & Gamble CompanyInventors: Heather Lynn Focht, Christopher Dean Putman, Cheyne Pohlman Thomas, Karl Shiqing Wei
-
Patent number: 7511004Abstract: Improved treatment blocks useful in the treatment of lavatory appliances, particularly toilets are provided. The improved treatment blocks are solid block compositions which provide an extended service life, particularly when used in an ITB device. Methods of producing the solid block composition and treatment blocks therefrom, as well as methods of use are also disclosed.Type: GrantFiled: May 23, 2006Date of Patent: March 31, 2009Assignee: Reckitt Benckiser Inc.Inventors: Tak Wai Cheung, Edward Fu, Tri Nguyen, Steven Wu
-
Patent number: 7511005Abstract: The present invention provides a novel nucleic acid sequence, designated ELIP, encoding a lipolytic enzyme and the corresponding encoded amino acid sequences. The invention also provides expression vectors and host cells comprising a nucleic acid sequence encoding at least one novel lipolytic enzyme, recombinant lipolytic enzyme proteins and methods for producing the same.Type: GrantFiled: May 12, 2004Date of Patent: March 31, 2009Assignee: Danisco US Inc., Genencor DivisionInventors: Brian E Jones, William D. Grant, Shaun Heaphy, Susan Grant, Helen C. Rees
-
Patent number: 7511006Abstract: The present invention relates to cleaning compositions containing C8-C10 alkylpolyglucosides which have low filming and streaking when combined with C2-C4 alcohols. The cleaning compositions can optionally comprise dyes, builders, fatty acids, fragrances, colorants, glycerol, anti-foaming agents, and preservatives.Type: GrantFiled: June 18, 2008Date of Patent: March 31, 2009Assignee: The Clorox CompanyInventors: Laura Shimmin, Sonia H. Burciaga, Bernard Hill, Ryan K. Hood, Thomas W. Kaaret, Andrew Kilkenny, Stephen Bradford Kong
-
Patent number: 7511007Abstract: The present invention is drawn to disinfectant compositions, which are human safe, e.g., food grade or food safe. In one embodiment, an aqueous disinfectant composition can comprise an aqueous vehicle, including water, from 0.001 wt % to 10.0 wt % of a peroxygen, and an alcohol. Additionally, from 0.001 ppm to 50,000 ppm by weight of a transition metal based on the aqueous vehicle content can also be present. The composition can be substantially free of aldehydes. Alternatively or additionally, the transition metal can be in the form of a colloidal transition metal, such as colloidal silver or alloy thereof.Type: GrantFiled: August 24, 2006Date of Patent: March 31, 2009Assignee: Solutions BioMed, LLCInventors: Daryl J. Tichy, Brian G. Larson