Abstract: A semiconductor package assembly including a molded leadless package (MLP) having an exposed top emitter pad and an exposed bottom source pad. A folded heat sink is attached to the exposed top emitter pad of the MLP by a soft solder attach process. The folded heat sink has a planar member generally coextensive in size with the MLP and in electrical and thermal contact with the top emitter pad of the MLP, and also has one or more leads extending generally perpendicularly to the planar member in a direction towards the lower surface of the MLP. These heat sink leads may provide the emitter connection to a printed circuit (PC) board.

Abstract: The invention is directed to an improved microelectronics device that reduces BEOL delamination by reducing the tensile stress imposed on the via which connects first level interconnects with the BEOL. Tensile stress imposed on the via is reduced by shifting the via towards the center of a silicon chip or alternatively shifting the UBM towards the corners of the silicon chip.

Abstract: A semiconductor apparatus includes a semiconductor chip, a wired board, a plurality of bump electrodes, a plurality of external terminals, and insulating material. The semiconductor chip includes a plurality of electrode pads arranged in a central area on one surface. The wired board is arranged as facing one surface of the semiconductor chip, and includes a wiring. The bump electrode is provided between surfaces at which the semiconductor chip and the wired board face each other, and electrically connects the electrode pad and the wiring. The external terminal corresponds to a plurality of bump electrodes, and is mounted on the wired board. The insulating material is provided between the semiconductor chip and the wired board, and covers at least a connection part between the bump electrode and the wiring.

Abstract: There is provided an electronic device package and the like in which it is not likely that damage occurs in a wiring pattern of an interposer substrate in a gap section formed, for example, between an electronic device and an insertion substrate. The semiconductor package in accordance with the present invention is a package of fan-out type including an interposer substrate and a semiconductor device and an insertion substrate which are arranged on the substrate. The interposer substrate 3 includes a wiring pattern therein. A gap is formed between the semiconductor device and the insertion substrate; in an area corresponding to the gap, a reinforcing member (a metallic film 7) is formed to increase strength of the wiring pattern.

Abstract: An SiC Schottky diode die or a Si Schottky diode die is mounted with its epitaxial anode surface connected to the best heat sink surface in the device package. This produces a substantial increase in the surge current capability of the device.

Abstract: Provided are a high-power ball grid array (BGA) and a method for manufacturing the high-power BGA. The high-power BGA includes a printed circuit board which has a through hole at its center, connection pads which are formed on the bottom of the printed circuit board, matrix solder balls which surround the through hole and are adjacent to the connection pads on the bottom of the printed circuit board, a heat spreader which is formed on the top surface of the printed circuit board and includes an insulating layer of a high thermal conductivity, a semiconductor chip which is mounted downwardly on the bottom surface of the heat spreader, within the through hole, and includes a plurality of pads for bonding via gold wires with the connection pad, and a passive film which fills the through hole and is formed at the bottom of the semiconductor chip.

Abstract: A double-face-cooled semiconductor module with an upper arm and a lower arm of an inverter circuit includes first and second heat dissipation members, each having a heat dissipation surface on one side and a conducting member formed on another side through an insulation member. On the conducting member on the first dissipation plate is provided with a fixing portion that fixes a collector surface of the semiconductor chip and a gate conductor connected to a gate terminal of the semiconductor module. The gate electrode terminal and the gate conductor are wire bonded. The conducting member on the second heat dissipation member is connected to an emitter surface of the semiconductor chip connected to the first heat dissipation member. The productivity and reliability are improved by most of formation operations for the upper and lower arms series circuit on one of the heat dissipation member.

Abstract: A semiconductor IC-embedded module 100 comprises a multilayer substrate 101 having first and second insulating layers 101a and 101b, and a controller IC 012 and memory IC 103 that are embedded in the multilayer substrate 101. A wiring layer 104 is formed as an internal layer in the multilayer substrate 101. Part of the wiring layer 104 constitutes a bus line 104X. The controller IC 102 or memory IC 103 is embedded in the second insulating layer 101b. First and second ground layers 105a and 105b are provided respectively in the first and second insulating layers 101a and 101b. The effect of noise generated by bus lines is reduced, and an additional reduction in noise and a decrease in size and thickness are achieved by laying out bus lines that connect the semiconductor ICs so that distances are minimized.

Abstract: Provided is a semiconductor memory module allowing a filling member formed between a module substrate and memory chips mounted on the module substrate to completely fill the space between the module substrate and the memory chips. According to embodiments of the present invention, the semiconductor memory module includes a module substrate having at least one memory chip mounted on the substrate such that its edges are oblique to major and minor axes bisecting the module substrate. The oblique orientation allows for an improved opening between memory chips formed on the substrate so that the filling member may be properly formed between the module substrate and the memory chips to prevent voids where the filling member is not formed.

Abstract: A method of manufacturing a semiconductor device including a PMOS transistor and a NMOS transistor is described. The method facilitates obtaining a FUSI phase of a suitable composition for the NMOS transistor and the PMOS transistor respectively, with fewer mask layers and through a fewer number of manufacturing steps.

Abstract: A pre-packaged flip chip package that includes one or more dice on a semiconductor wafer is disclosed. In the various embodiments, an adhesive layer may be applied to a first side of a finished wafer, having connector pads formed thereon. The adhesive layer may include openings through which the connector pads may be accessed. Conductive elements may be positioned within the adhesive, and configured to electrically couple to the conductive elements.

Abstract: An electronic device can include an interconnect level (16) including a bonding pad region (110). An insulating layer (18) can overlie the interconnect level (16) and include an opening (112, 24) over the bonding pad region (110). In one embodiment, a conductive stud (34) can lie within the opening (112, 24) and can be substantially encapsulated. In another embodiment, the electronic device can include a barrier layer (22) lying along a side and a bottom of the opening (112, 24) and a conductive stud (34) lying within the opening (112, 24). The conductive stud (34) can substantially fill the opening (112, 24). A majority of the conductive stud (34) can lie within the opening (112, 24). In still another embodiment, a process for forming an electronic device can include forming a conductive stud (34) within the opening (112, 24) wherein the conductive stud (34) lies substantially completely within the opening (112, 24).

Abstract: An integrated circuit package system includes: providing a base device; attaching a base interconnect to the base device; applying an encapsulant over the base device and the base interconnect; and forming a re-routing film over the encapsulant, the base device, and the base interconnect for connectivity without a substrate.

Abstract: The present invention relates to an electrode 100 with high capacitance. The electrode includes a conducting substrate 10 with a number of nano-sized structures 13 thereon and a coating 15. The nano-sized structures are concave-shaped and are of a size in the range from 2 nanometers to 50 nanometers. The nano-sized structures are configured for increasing specific surface area of the electrode. The present invention also provides a method for making the above-described electrode. The method includes steps of providing a conducting substrate, forming a number of nano-sized structures on the conducting substrate, and forming a coating on the nano-sized structures.

Abstract: A semiconductor device includes a first wiring layer, a second wiring layer and a third wiring layer. The first wiring layer is formed on a semiconductor substrate. The second and the third wiring layer wiring layers are arranged in a direction intersecting with the first wiring layer on respective sides of the wiring layer. An air bridge wiring intersects the second and third wiring layers sandwiching an air layer above the first wiring layer therewith. The overall shape of the air bridge wiring has an upward convex curvature in an arch shape and the transverse sectional shape of the air bridge wiring is in the form of a downward concave curvature.

Abstract: A semiconductor device according to the present invention includes a semiconductor substrate; a capacitor having a lower electrode formed on said semiconductor substrate, a capacity insulating film formed on said lower electrode, and an upper electrode formed on said capacity insulating film; contact holes formed on said upper electrode and said lower electrode; a barrier layer containing oxygen, formed inside said contact holes; and a conductive layer which fills said contact holes in which said barrier layer is formed on the inside.

Abstract: The present invention proposes a dummy metal fill structure which makes it possible to reduce variations in transistor characteristics as much as possible even if mask misalignment occurs, as well as to ensure the intended planarizing effect of the metal CMP process. The dummy metal fill formed above the gate electrode extends in the gate length direction with both ends thereof protruding from a region corresponding to the gate electrode. Even if a mask for forming a wiring layer is misaligned and the position of the dummy metal fill is misaligned from an intended position, the shape of the dummy metal fill within a region of the gate electrode is kept symmetric with respect to the center of the gate electrode.

Abstract: In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, an electrical bus embedded in a dielectric material below a surface of a semiconductor substrate is disclosed. Other embodiments are described and claimed.

Abstract: A method for forming deep lithographic interconnects between a first metal and a second metal is provided. The method comprises depositing a first insulator layer on a semiconductor substrate; etching the first insulator layer at a selected location to provide at least a first via to the semiconductor substrate; depositing the first metal on the semiconductor substrate to form at least a first metal contact plug in the first via in contact with the semiconductor substrate; treating the semiconductor substrate with an in-situ plasma of a nitrogen containing gas wherein the plasma forms a nitride layer of the first metal at least capping a top surface of the first metal plug in the first via; and forming a second metal contact to the metal nitride layer capping at least the top surface of the first metal plug.

Abstract: A semiconductor device having redistribution interconnects in the WPP technology and improved reliability, wherein the redistribution interconnects have first patterns and second patterns which are electrically separated from each other within the plane of the semiconductor substrate, the first patterns electrically coupled to the multi-layer interconnects and the floating second patterns are coexistent within the plane of the semiconductor substrate, and the occupation ratio of the total of the first patterns and the second patterns within the plane of the semiconductor substrate, that is, the occupation ratio of the redistribution interconnects is 35 to 60%.

Abstract: The semiconductor device 1 has a semiconductor chip 10 (first semiconductor chip) and a semiconductor chip 20 (second semiconductor chip). The semiconductor chip 20 is formed on the semiconductor chip 10. The semiconductor chip 20 is constituted by comprising a semiconductor substrate 22. The semiconductor substrate 22, which is an SOI substrate, is constituted by comprising an insulating layer 34, and a silicon layer 36, which is provided on the insulating layer 34, including a circuit forming region A1. The insulating layer 34 functions as a protective film (a first protective film) covering a lower face (a face opposite to the semiconductor chip 10) of the circuit forming region A1. A protective film 38 (a second protective film) is provided on the semiconductor substrate 22. The protective film 38 covers a side face of the circuit forming region A1.

Abstract: A three dimensional semiconductor device, comprising: a plurality of circuit blocks including programmable logic blocks having predetermined positions within the device; a plurality of pads having predetermined positions within the device; and a configuration memory circuit coupled to the programmable logic blocks having a plurality of fabricating methods without altering the predetermined positions of the pads and the circuit blocks.

Abstract: A semiconductor structure includes a first die comprising a first substrate and a first bonding pad over the first substrate, a second die having a first surface and a second surface opposite the first surface, wherein the second die is stacked on the first die and a protection layer having a vertical portion on a sidewall of the second die, and a horizontal portion extending over the first die.

Abstract: A packaging substrate and a method for fabricating the same are proposed, including: providing a substrate body having a first surface and an opposing second surface, wherein the first surface has a plurality of flip-chip solder pads and wire bonding pads and the second surface has a plurality of solder ball pads; forming a first and a second solder mask layers on the first and second surfaces respectively and forming openings in the first and second solder mask layers to expose the flip-chip solder pads, the wire bonding pads and the solder ball pads; forming first bumps on the flip-chip solder pads; and forming an electroless Ni/Pd/Au layer on the first bumps and the wire bonding pads by electroless plating, wherein the electroless Ni/Pd/Au layer has a thickness tolerance capable of meeting evenness requirements for fine pitch applications.

Abstract: A method of making a semiconductor die includes forming a trench around a conductive stud extending from the first side to a second side of a substrate to expose a portion of the stud and then forming a conductive layer inside the trench and in electrical contact with the stud.

Abstract: The claimed invention relates to structures suitable for improving the performance and reliability of electrical connectors. One embodiment of the claimed invention includes an integrated circuit die having an electrical contact coupled with electrically conductive paths that share a common electrical source. The conductive paths are configured to transmit the same electrical signal to the electrical contact, which supports an electrical connector, such as a solder bump. The electrical connector couples the die with an outside component, such as a circuit board. Each of the conductive paths connect to the electrical contact at different interface locations. When the electrical signal passes through the interface locations, the paths are configured to have non-zero current densities at those locations. The electrical resistance of the conductive paths may be substantially similar.

Abstract: One aspect of the invention pertains to a semiconductor package suitable for use in high stress environments, such as ones involving high pressures, temperatures and/or corrosive substances. In this aspect, a die and leadframe are fully encapsulated in a first plastic casing. The first plastic casing is fully encapsulated in turn with a second plastic casing. The two casings have different compositions. The first plastic casing, for example, may be made of a thermoset plastic material and the second plastic casing may be made of a thermoplastic material. The first plastic casing may have recesses, indentations and/or slots suitable for securing it to the second plastic casing. In some embodiments, a corrosion resistant coating is added to the second plastic casing. Methods for forming semiconductor packages suitable for use in high stress environments are also described.

Abstract: A semiconductor device and method having high output and having reduced external resistance is reduced and improved radiating performance. A MOSFET (70) has a connecting portion for electrically connecting a surface electrode of a semiconductor pellet and a plurality of inner leads, a resin encapsulant (29), a plurality of outer leads (37), (38) protruding in parallel from the same lateral surface of the resin encapsulant (29) and a header (28) bonded to a back surface of the semiconductor pellet and having a header protruding portion (28c) protruding from a lateral surface of the resin encapsulant (29) opposite to the lateral surface from which the outer leads protrude, wherein the header (28) has an exposed surface (28b) exposed from the resin encapsulant (29); the outer leads (37), (38) are bent; and the exposed of the outer leads (37), (38) are provided at substantially the same height.

Abstract: Disclosed is a semiconductor chip having an alignment mark which is formed on the surface of the semiconductor chip where no external connection bump is formed, and which has the position information of the external connection bump. A method of manufacturing the semiconductor chip having an alignment mark is also provided. Because the semiconductor chip includes the alignment mark having the position information of the external connection bump, the external connection bump is matched with a via which is formed in the external circuit layer of a printed circuit board including the semiconductor chip, thus improving electrical connection with the printed circuit board, and increasing the reliability of the printed circuit board including the semiconductor chip.

Abstract: A resonance frequency vibration power harvester includes an elongate body, a first vibration energy harvester device and a weight. The elongate body includes a first end, a second end and an interior channel extending through at least a portion of the elongate body between the first end and the second end. The second end of the elongate body is for connecting to a vibration source such that the first end is cantilevered. The first vibration energy harvester device is attached adjacent the first end of the elongate body, and the weight is joined to the interior channel to adjust a resonant frequency of the elongate body.

Abstract: A smart alternator control circuit and method is provided limiting alternator load on an internal combustion engine.

Abstract: A control system for a vehicle has an engine control unit for an engine and a generator control unit for a power generator driven by the engine. The engine control unit calculates a permissive power generation torque, which is permitted to be used by the power generator, in accordance with a response delay of the engine. The generator control unit calculates a command power to be generated by the power generator so that a battery voltage variation and an engine speed variation are suppressed to be less than respective allowable variation limits, when a power difference is caused between a required power and a permissive power generated by the permissive torque.

Abstract: A vehicle system that includes an engine control apparatus which regulates engine idling speed incorporates a battery current detection apparatus which acquires information expressing the value of field current of an engine-driven electric generator and detects a condition of high electrical load as occurrence of a battery discharge current exceeding a threshold value, and responds to that condition by notifying the engine control apparatus of a higher value of field current of the electric generator than the actual value, to thereby effect a rapid increase in engine speed and so rapidly increase the output power of the electric generator.

Abstract: A liquid treatment system that may be self-powered includes a hydro-generator. A flow of liquid may be used to rotate the hydro-generator to generate electric power. The hydro-generator may include an outer housing and an inner housing. The inner housing may include a first hub removeably engaged with a second hub. During manufacture, a plurality of paddles may be replaceably engaged between the first hub and the second hub. Also during manufacture, an electrical generator may be disposed in the inner housing. In operation, a flow of liquid may strike the paddles causing the inner housing to rotate. During rotation of the housing, the electrical generator may produce electrical power.

Abstract: When planning and setting up wind power installations, the visual detractions to be expected due to the wind power installation on the environment play an increasingly important part in approval and acceptance. The shadow casting caused by the wind power installation on the adjoining properties is often perceived by the residents as being very troublesome. A wind power installation is provided to improve regulation of shadow casting. That is achieved by a method of operating a wind power installation by detecting a first light intensity in a region of direct light irradiation and detecting a second light intensity in a shadowed region. The wind power installation is shut down if the difference between the first light intensity and the second light intensity is greater than a predetermined value.

Abstract: A skin structure has a skin and a power generation system attached to the skin. The power generation system has a turbine, one or more tubes fluidly coupled to the turbine, and a generator configured to generate electrical power in response to motion of the turbine. The skin structure may form a portion of an outer covering of a stationary structure, such as a building, or an outer covering of a manned or unmanned vehicle, such as a ground or aerial motor vehicle or a marine or submarine motor vehicle.

Abstract: A controller including a controller input coupled to an engine magneto for monitoring tractor engine operation by monitoring a change in magneto signal thereby determining if the engine is running. A power output circuit coupled to an output from the controller draws current from a tractor battery for powering an auxiliary component when the tractor engine is running and disrupts power to the auxiliary component when the tractor engine is not running to conserve battery life.

Abstract: The automobile of the present invention is provided with a capacitor for backup use in case of disconnection or breakdown of a battery. When a start switch is turned off, the collected charge in the capacitor is supplied to a device in which a large current is flowing, such as discharging resistor, motor or lamp, or a device in which a small current is flowing, such as dark current consuming device, and therefore, after the start switch is turned off, power consumption of the battery can be suppressed.

Abstract: An automatic sensing power system automatically determines a power requirement for an electrical device, converts power to the required level, and outputs the power to the electrical device when the electrical device is connected to the automatic sensing power system.

Abstract: An automatic sensing power system automatically determines a power requirement for an electrical device, converts power to the required level, and outputs the power to the electrical device when the electrical device is connected to the automatic sensing power system.

Abstract: An automatic sensing power system automatically determines a power requirement for an electrical device, converts power to the required level, and outputs the power to the electrical device when the electrical device is connected to the automatic sensing power system.

Abstract: An automatic sensing power system automatically has a voltage sampling system that samples a voltage from an electrical device, determines a power requirement for the electrical device, converts power to the required level, and outputs the power to the electrical device when the electrical device is connected to the automatic sensing power system.

Abstract: An automatic sensing power system automatically has a voltage sampling system that samples a voltage from an electrical device, determines a power requirement for the electrical device, converts power to the required level, and outputs the power to the electrical device when the electrical device is connected to the automatic sensing power system.

Abstract: A method includes powering a device using one or more first power sources and coupling one or more second power sources to provide power to the device. The method also includes replacing at least one of the first power sources, where the one or more second power sources provide power to the device during replacement of the at least one first power source. The first power source(s) could include one or more first batteries in one or more first battery slots, and the second power source(s) could include one or more second batteries in one or more second battery slots. The second batteries could be inserted into the second battery slots prior to replacement of at least one of the first batteries. The first power source(s) could also include one or more batteries in one or more battery slots, and the second power source(s) could include a portable voltage source.

Abstract: A power transmission control device provided in a power transmission device of a non-contact power transmission system includes a drive clock signal generation circuit that generates a drive clock signal specifying a drive frequency of a primary coil, a driver control circuit that generates a driver control signal based on the drive clock signal, and outputs the driver control signal to a transmission driver, a waveform detection circuit that detects a change in waveform of an induced voltage signal of the primary coil, and a control circuit that performs foreign object detection based on a detection result of the waveform detection circuit. The drive clock signal generation circuit outputs the drive clock signal set at a foreign object detection frequency during foreign object detection, the foreign object detection frequency being a frequency differing from a normal power transmission frequency.

Abstract: By reviewing a material of a forcer housing and an assembly structure of a coil member with respect to the forcer housing, a thrust force is increased, an optimum shape can be easily given to the forcer housing depending on a purpose of use, and a linear motor can be manufactured at low cost. The linear motor includes a magnet rod composed of a large number of magnetic poles arranged with predetermined pitches along an axial direction and a forcer having a through-hole into which the magnet rod is loosely inserted and reciprocatable relatively to the magnet rod according to an applied electric signal. The forcer is composed of a forcer housing in which the through-hole is defined and a coil member which is arranged on an inner peripheral surface of the through-hole of the forcer housing and to which the electric signal is applied. The forcer housing is formed by mold forming with an insulating nonmetal inorganic material.

Abstract: A vibratory linear actuator includes a stator with a magnetic pole surface, a movable member with a magnetic pole surface, an electromagnet arranged in one of the stator and the movable member, a permanent magnet arranged in the other of the stator and the movable member and a support unit for movably supporting the movable member so that the magnetic pole surface of the electromagnet can oppose the magnetic pole surface with a gap left therebetween. The actuator is designed to vibrate the movable member by supplying an electric current to the electromagnet. The support unit includes a fixed portion to be fixed to a housing for accommodating the actuator, and the stator is configured to be fixed to the support unit as the support unit is fixed to the housing.

Abstract: To improve resistance of a motor device against an organic solvent and to suppress degradation in performance of the motor device with time. In a motor device, an excitation magnet is formed using a hollow-cylinder shaped anisotropic bonded magnet 13. This bonded magnet 13 is press-fitted in a housing 12 and is held. The bonded magnet 13 is formed of a hollow-cylinder shaped anisotropic rare earth bonded magnet which is obtained by compounding an anisotropic rare earth magnet powder with a phenol-novolac type epoxy resin, followed by molding. The anisotropic rare earth bonded magnet 13 is press-fitted along an inner peripheral portion of the housing 12, and on an exposed surface layer of the anisotropic rare earth bonded magnet press-fitted in the housing, a coating layer is formed by an infiltration treatment using a polyamide-imide-based resin.

Abstract: A motor, including at least a stator core (1), a shaft (2) nested around the stator core (1), and shock-absorbing connector, wherein the shock-absorbing connector is disposed between the stator core (1) and the shaft (2) so as to absorb and buffer unbalanced counterforces acting on the stator core (1) and to dampen the shocks experienced by the shaft (2) and reduce the overall noise generated by the motor.

Abstract: The invention relates to a direct electrical drive (1) for a wheel set (30) of a vehicle, wherein the direct electrical drive (1) comprises a stator (7) and a rotor (3), with the rotor (3) being coupled mechanically with a wheel set shaft (11). The rotor (3) includes a cooling device. The cooling device includes cooling channels (22), an air inlet (37) and at least one fan (9), whereby the cooling channels (22) extend inside the rotor (3).