Abstract: A light emitting device (LED) may include a first semiconductor layer; an active layer formed on the first semiconductor layer and configured to generate first light having a first wavelength; a second semiconductor layer, formed on the active layer; and a plurality of semiconductor nano-structures arranged apart from each other and formed on the second semiconductor layer. The nano-structures may be configured to at least partially absorb the first light and emit second light having a second wavelength different from the first wavelength.

Abstract: An ultra-violet light-emitting diode (LED) array, 12, and method for fabricating same with an AlInGaN multiple-quantum-well active region, 500, exhibiting stable cw-powers. The LED includes a template, 10, with an ultraviolet light-emitting array structure on it. The template includes a first buffer layer, 321, then a second buffer layer, 421, on the first preferably with a strain-relieving layer in both buffer layers. Next there is a semiconductor layer having a first type of conductivity, 500, followed by a layer providing a quantum-well region, 600, with an emission spectrum ranging from 190 nm to 369 nm. Another semiconductor layer having a second type of conductivity is applied next, 800. A first metal contact, 980, is a charge spreading layer in electrical contact with the first layer and between the array of LED's. A second contact, 990, is applied to the semiconductor layer having the second type of conductivity, to complete the LED.

Abstract: An implementation of a single qubit phase gate for use in a quantum information processing scheme based on the ?=5/2 fractional quantum Hall (FQH) state is disclosed. Using sack geometry, a qubit consisting of two ?-quasiparticles. which may be isolated on respective antidots, may be separated by a constriction from the bulk of a two-dimensional electron gas in the ?=5/2 FQH state. An edge quasiparticle may induce a phase gate on the qubit. The number of quasiparticles that are allowed to traverse the edge path defines which gate is induced. For example, if a certain number of quasiparticles are allowed to traverse the path, then a ?/8 gate may be effected.

Abstract: A method for forming an electronic switching device on a substrate, wherein the method comprises depositing the active semiconducting layer of the electronic switching device onto the substrate from a liquid dispersion of ligand-modified colloidal nanorods, and subsequently immersing the substrate into a growth solution to increase the diameter and/or length of the nanorods on the substrate, and wherein the as-deposited nanorods are aligned such that their long-axis is aligned preferentially in the plane of current flow in the electronic switching device.

Abstract: An organic electronic device which has stable physical properties and which allows easy production is provided. The organic electronic device has a conductive path including fine particles, a first organic semiconductor molecule which has a first conductive type and binds at least two of the fine particles together, and a second organic semiconductor molecule which has a second conductive type and is captured in a state of noncovalent bond in a molecule recognition site that exists among the fine particles.

Abstract: Bridged cyclometalated carbene complexes, a process for preparing the bridged cyclometalated carbene complexes, the use of the bridged cyclometalated carbene complexes in organic light-emitting diodes, organic light-emitting diodes comprising at least one inventive bridged cyclometalated carbene complex, a light-emitting layer comprising at least one inventive bridged cyclometalated carbene complex, organic light-emitting diodes comprising at least one inventive light-emitting layer and devices which comprise at least one inventive organic light-emitting diode.

Abstract: A light emitting device material containing a pyrromethene compound represented by the general formula (1). It realized a luminescent element having a high luminescent efficiency and excellent color purity. Also provided is a luminescent element employing the materials.

Abstract: The organic EL device of the present invention includes an anode, a cathode (e.g., an Al layer (15)), and an organic layer 20 that is disposed between the anode and the cathode and that includes a light emitting layer 14. At least one side of the anode nearer to the organic layer (20) is formed of a transparent oxide semiconductor layer (e.g., an ITO layer (12)). The molybdenum oxide layer is disposed between the oxide semiconductor layer and the organic layer (20). The thickness of the molybdenum oxide layer is less than 2 nm when the molybdenum oxide layer is assumed to have a uniform thickness.

Abstract: A method of manufacturing an organic thin film transistor, comprising: providing a substrate comprising source and drain electrodes defining a channel region; forming a patterned layer of insulting material defining a well surrounding the channel region; depositing a protective layer in the well; subjecting exposed portions of the patterned layer of insulating material to a de-wetting treatment to lower the wettability of the exposed portions; removing the protective layer; and depositing organic semiconductive material from solution into the well.

Abstract: A molecular device includes a gold electrode, cytochrome c552 or a derivative or variant thereof immobilized on the gold electrode, and an electron transfer protein coupled to the cytochrome c552 or the derivative or variant thereof. Electrons or holes, or both, are transferred through the electron transfer protein by transition of electrons between molecular orbitals of the electron transfer protein.

Abstract: A method for manufacturing a thin film transistor includes the steps of covering a gate electrode patterned on a substrate with a gate insulating film, forming an organic semiconductor layer and an electrode film on the gate insulating film in that lamination order, and forming a negative type photoresist film on the substrate provided with the organic semiconductor layer and the electrode film and forming a resist pattern, which serves as a mask for forming a source-drain by etching the electrode film, through back surface exposure from the substrate side by using the gate electrode as a light-shielding mask and the following development treatment.

Abstract: There is provided a ZnO based compound semiconductor light emitting device which can emit light with high efficiency and from an entire surface while using ZnO based compound semiconductor which can be expected with higher light emitting efficiency than that of a GaN based compound. On an insulating substrate (1), an n-type layer (2), an active layer (3), and a p-type layer (4), made of ZnO based compound semiconductor materials, are laminated, wherein a specific resistance of the n-type layer is 0.001 ?·cm or more and 1 ?·cm or less, and a film thickness (?m) of the n-type layer is set in a value or more calculated by a formula (specific resistance (?·cm))×300, and an n-side electrode (5) is formed on an exposed portion of a surface of the n-type layer opposite to a surface being in contact with the substrate and a p-side electrode (6) is formed on the p-type layer.

Abstract: An object is to provide a transistor including an oxide layer which includes Zn and does not include a rare metal such as In or Ga. Another object is to reduce an off current and stabilize electric characteristics in the transistor including an oxide layer which includes Zn. A transistor including an oxide layer including Zn is formed by stacking an oxide semiconductor layer including insulating oxide over an oxide layer so that the oxide layer is in contact with a source electrode layer or a drain electrode layer with the oxide semiconductor layer including insulating oxide interposed therebetween, whereby variation in the threshold voltage of the transistor can be reduced and electric characteristics can be stabilized.

Abstract: An integrated circuit substrate containing an electrical probe pad structure over, and on both sides of, a dicing kerf lane. The electrical probe pad structure includes metal crack arresting strips adjacent to the dicing kerf lane. A metal density between the crack arresting strips is less than 70 percent. An electrical probe pad structure containing metal crack arresting strips, with a metal density between the crack arresting strips less than 70 percent. A process of forming an integrated circuit by forming an electrical probe pad structure over a dicing kerf lane adjacent to the integrated circuit, such that the electrical probe pad structure has metal crack arresting strips adjacent to the dicing kerf lane, and performing a dicing operation through the electrical probe pad structure.

Abstract: In the current manufacturing process of LSI, or semiconductor integrated circuit device, the step of assembling device (such as resin sealing step) is normally followed by the voltage-application test (high-temperature and high-humidity test) in an environment of high temperature (such as an approximate range from 85 to 130° C.) and high humidity (such as about 80% RH). For that test, the inventors of the present invention found the phenomenon of occurrence of separation of titanium nitride film as the anti-reflection film from upper film and of generation of cracks in the titanium nitride film at an edge part of upper surface of the aluminum-based bonding pad applied with a positive voltage during the high-temperature and high-humidity test caused by an electrochemical reaction due to moisture incoming through the sealing resin and the like to generate oxidation and bulging of the titanium nitride film.

Abstract: An interconnecting structure production method includes providing a substrate, forming a semiconductor layer on the substrate, forming a doped semiconductor layer on the semiconductor layer, the doped semiconductor layer containing a dopant, forming an oxide layer in a surface of the doped semiconductor layer by heating the surface of the doped semiconductor layer in atmosphere of an oxidizing gas with a water molecule contained therein, forming an alloy layer on the oxide layer, and forming an interconnecting layer on the alloy layer.

Abstract: Provided is a crystalline silicon thin film semiconductor device which is capable of reducing off-state leakage current and has excellent current rising characteristics. The thin film transistor includes a semiconductor layer formed of an amorphous silicon layer and a crystalline silicon layer. A drain electrode is provided in direct contact with the crystalline silicon layer of the semiconductor layer, to thereby improve the current rising characteristics.

Abstract: A thin-film transistor array panel and a manufacturing method thereof are provided for one or more embodiments. The thin-film transistor array panel may include: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a source electrode and a drain electrode formed on the gate insulating layer; and a flatness layer formed on the source electrode and the drain electrode, wherein the drain electrode has a higher height than the flatness layer.

Abstract: A control substrate comprising: a substrate main body; a base layer provided on one surface perpendicular to a thickness direction of the substrate main body; and a switching element provided on the base layer's surface located on the opposite side to the substrate main body, so as to perform switching between an electric connection and an electric disconnection, wherein the switching element comprises an electrode formed on the surface of the base layer by an application method, the surface being opposite to the substrate main body, and the base layer is formed of a member whose adhesiveness to the electrode is higher than the adhesiveness of the substrate main body to an electrode when forming the electrode on a base layer side surface of the substrate main body by an application method.

Abstract: A field-effect transistor includes at least a channel layer, a gate insulating layer, a source electrode, a drain electrode, and a gate electrode, which are formed on a substrate. The channel layer is made of an amorphous oxide material that contains at least In and B, and the amorphous oxide material has an element ratio B/(In+B) of 0.05 or higher and 0.29 or lower.

Abstract: An object is to obtain a semiconductor device with improved characteristics by reducing contact resistance of a semiconductor film with electrodes or wirings, and improving coverage of the semiconductor film and the electrodes or wirings. The present invention relates to a semiconductor device including a gate electrode over a substrate, a gate insulating film over the gate electrode, a first source or drain electrode over the gate insulating film, an island-shaped semiconductor film over the first source or drain electrode, and a second source or drain electrode over the island-shaped semiconductor film and the first source or drain electrode. Further, the second source or drain electrode is in contact with the first source or drain electrode, and the island-shaped semiconductor film is sandwiched between the first source or drain electrode and the second source or drain electrode. Moreover, the present invention relates to a manufacturing method of the semiconductor device.

Abstract: This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719 and 720 not overlapping with a gate wiring are arranged in an n-channel TFT 804 forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region 707 than in the LDD regions 717, 718, 719 and 720.

Abstract: A thin film semiconductor device formed as integrated circuits on an insulating substrate with bottom gate type thin film transistors stacked with gate electrodes, a gate insulating film and a semiconductor thin film in the order from below upward. The gate electrodes comprise metallic materials with thickness less than 100 nm. The gate insulating film has a thickness thicker than the gate electrodes. The semiconductor thin film comprises polycrystalline silicon crystallized by a laser beam. By reducing thickness of metallic gate electrodes, thermal capacity becomes small and difference in thermal condition on the metallic gate electrodes and on the insulating substrate made of glass or the like becomes small. This invention relates to the task of uniforming and optimizing recrystallization by a laser anneal treatment provided for the semiconductor thin film which works as an active layer of the bottom gate type thin film transistors.

Abstract: A method for fabricating semiconductor components includes the steps of providing a semiconductor substrate having a circuit side, a back side and integrated circuits and circuitry on the circuit side; thinning the substrate from the back side to a selected thickness; laser processing the back side of the thinned substrate to form at least one lasered feature on the back side; and dicing the substrate into a plurality of components having the lasered feature. The lasered feature can cover the entire back side or only selected areas of the back side, and can be configured to change electrical properties, mechanical properties or gettering properties of the substrate. A semiconductor component includes a thinned semiconductor substrate having a back side and a circuit side containing integrated circuits and associated circuitry. The semiconductor component also includes at least one lasered feature on the back side configured to provide selected electrical or physical characteristics for the substrate.

Abstract: A GaN layer-containing multilayer substrate employing as a substrate a single crystal that can be made to have a large diameter, a process for producing same, and a device employing the multilayer substrate. The process for producing a multilayer substrate of the present invention includes a germanium growing step of heteroepitaxially growing a germanium layer above a (111) silicon substrate by chemical vapor deposition, a heat treatment step of carrying out a heat treatment of the obtained germanium layer above the silicon substrate in a temperature range of 700° C. to 900° C., and subsequently a GaN growing step of heteroepitaxially growing a GaN layer above the germanium layer.

Abstract: Junction field effect transistors (JFETs) are shown to be a viable replacement for metal oxide semiconductor field effect transistors (MOSFETs) for gate lengths of less than about 40 nm, providing an alternative to the gate leakage problems presented by scaled down MOSFETs. Integrated circuit designs can have complementary JFET (CJFET) logic cells substituted for existing MOSFET-based logic cells to produce revised integrated circuit designs. Integrated circuits can include JFETS where the channel comprises a wide bandgap semiconductor material and the gate comprises a narrow bandgap semiconductor material. Mixtures of JFET and MOSFET transistors can be included on an integrated circuit design.

Abstract: In one embodiment, a charge storage device can include: a first node having a plurality of n-type diamond layers connected together; and a second node having a plurality of p-type diamond layers connected together, the plurality of p-type diamond layers being interleaved with the plurality of n-type diamond layers, where each of the plurality of diamond layers is formed using chemical vapor deposition (CVD).

Abstract: Semiconductor devices with multiple floating guard ring edge termination structures and methods of fabricating same are disclosed. A method for fabricating guard rings in a semiconductor device that includes forming a mesa structure on a semiconductor layer stack, the semiconductor stack including two or more layers of semiconductor materials including a first layer and a second layer, said second layer being on top of said first layer, forming trenches for guard rings in the first layer outside a periphery of said mesa, and forming guard rings in the trenches. The top surfaces of said guard rings have a lower elevation than a top surface of said first layer.

Abstract: A silicon biosensor and a method of manufacturing the same are provided. The silicon biosensor includes: a light emitting layer emitting light according to injected electrons and holes and changing a wavelength of the light depending on whether a biomaterial is absorbed by the light emitting layer; an electron injection layer injecting the electrons into the light emitting layer; and a hole injection layer injecting the holes into the light emitting layer. Accordingly, it is possible to produce low price biosensors in large quantities.

Abstract: A light emitting device and an electronic device using the same are provided. The light emitting device includes a light emitting chip having a wavelength between 460 nm and 650 nm and phosphor powders, in which the phosphor powders can be stimulated by light emitted from the chip to emit light with a wavelength between 700 nm and 1200 nm. The phosphor powders are selected from the group consisting of Cu-doped CdS, Cu-doped SeS, Cu-doped CdTe and combinations thereof.

Abstract: Provided is an organic light emitting device having a simple structure and enabling cost reduction. An organic light emitting device 30 of the present invention includes: an organic light emitting element 20; an electrode substrate (11, 12) including a pin connection hole (14, 15) with which the organic light emitting element 20 is fixed and electrically connected; and a lead pin (9, 10) having a clamp portion (9a, 10a) and an insertion portion (9b, 10b), the clamp portion (9a, 10a) clamping a peripheral portion of the organic light emitting element 20, the insertion portion (9b, 10b) being fitted into the pin connection hole (14, 15) to thereby connect the organic light emitting element 20 to the electrode substrate (11, 12).

Abstract: An exemplary yellow light emitting diode (LED) includes a substrate, a LED die, a phosphor layer and an encapsulant. The LED die is arranged on the substrate and comprises an indium gallium aluminum nitride represented by the formula InxGayAlzN, wherein x+y+z=1, 0?x?1, 0?y?1 and 0?z?1. The phosphor layer is a yttrium aluminum garnet phosphor layer configured on the light path of the LED die. The phosphor layer has a thickness of more than 250 micron. The encapsulant covers the LED die and the phosphor layer.

Abstract: A light emitting device comprises two light-emitting diode (LED) groups, a group of luminophor layers, and an input terminal. The first LED group includes at least one blue LED emitting light having a dominant wavelength in a range between 400 nm and 480 nm, and the second LED group includes at least one red-orange LED emitting light having a dominant wavelength in a range between 610 nm and 630 nm. The group of luminophor layers, which are selected from one of silicates, nitrides, and nitrogen oxides, are positioned above the first LED group and partially converts the light emitted by the first LED group into light having a dominant wavelength in a range between 500 nm and 555 nm. The input terminal is connected to the two LED groups for providing desired electric energy thereto.

Abstract: A system for displaying images is provided. The system includes a tandem electroluminescent device having a first electrode. N electroluminescent units are disposed on the first electrode in sequence, wherein N is an integral and not less than 2. A second electrode is disposed on the Nth electroluminescent unit. N-1interconnecting electrodes are provided, wherein each of the interconnecting electrodes is disposed between two adjacent electroluminescent units. The first electroluminescent unit includes a first emitting layer and a second emitting layer in sequence from the first electrode, and the first and second emitting layer have different physical quantities. The Nth electroluminescent unit includes a third emitting layer and a fourth emitting layer in sequence from the first electrode. The physical quantity of the third emitting layer is the same as that of the second emitting layer. The physical quantity of the fourth emitting layer is the same as that of the first emitting layer.

Abstract: An optoelectronic semiconductor chip is disclosed which emits electromagnetic radiation from its front side (7) during operation, comprising a semiconductor layer sequence (1) having an active region (4) suitable for generating the electromagnetic radiation, and a separately produced TCO supporting substrate (10), which is arranged at the semiconductor layer sequence and has a material from the group of transparent conductive oxides (TCO) and mechanically supports the semiconductor layer sequence (1).

Abstract: A white light-emitting diode package structure for simplifying package process includes a substrate unit, a light-emitting unit, a phosphor unit and a conductive unit. The light-emitting unit is disposed on the substrate, and the light-emitting unit has a positive conductive layer and a negative conductive layer. The phosphor unit has a phosphor layer formed on the light-emitting unit and at least two openings for respectively exposing one partial surface of the positive electrode layer and one partial surface of the negative electrode layer. The conductive unit has at least two conductive wires respectively passing through the two openings in order to electrically connect the positive electrode layer with the substrate unit and electrically connect the negative electrode layer with the substrate unit.

Abstract: In an embodiment the invention provides a LFCC package comprising first, second and third lead frames, a light source, and an encapsulant. The first lead frame comprises two tongues and a reflector cup. The first, second and third lead frames are attached to the encapsulant. The light source is mounted at the bottom of the inside of the reflector cup. The light source is electrically connected to the second and third lead frames by wire bonds. The reflector cup is surrounded on at least four sides by the encapsulant, the encapsulant being an integral single piece structure.

Abstract: In an embodiment, the invention provides a PLCC package comprising first and second lead frames, a plastic structural body, a light source, an encapsulant, and an optical lens. The first lead frame comprises two tongues and a reflector cup. The first and second lead frames are attached to the plastic structural body. The light source is mounted and electrically connected at the bottom of the inside of the reflector cup. The light source is also electrically connected to the second lead frame by a wire bond. The reflector cup is surrounded on at least four sides by the encapsulant, the encapsulant having a domed portion that functions as the optical lens, the encapsulant being an integral single piece structure.

Abstract: The light emitting device has a light emitting element 101, and translucent material 102 that passes incident light from the light emitting element 101 and emits that light to the outside. The sides of the translucent material 102 perimeter are inclined surfaces 107 that become wider from the upper surface to the lower surface. The area of the lower surface of the translucent material 102 is formed larger than the area of the upper surface of the light emitting element 101. The lower surface of the translucent material 102 and the upper surface of the light emitting element 101 are joined together, and the part of the lower surface of the translucent material 102 that is not joined with the light emitting element 101 and the inclined surfaces 101 are covered by light reflecting resin 103.

Abstract: A light emitting diode (LED) package structure includes a substrate having a chip disposal area and a recession, a chip installed in the chip disposal area, a silicon connecting element installed at the recession, and a silicon lens disposed at a position corresponding to the recession and coupled to the silicon connecting element, such that the silicon connecting element in the recession can assure the silicon lens to be secured onto the substrate to prevent the silicon lens from falling out.

Abstract: Disclosed are a semiconductor light emitting device. The semiconductor light emitting device comprises a light emitting structure comprising a IH-V group compound semiconductor, a reflective layer comprising mediums, which are different from each other and alternately stacked under the light emitting structure, and a second electrode layer under the reflective layer.

Abstract: The light emitting element includes a substrate; a first block pattern formed on the substrate; a light emitter including a first semiconductor pattern of a first conductivity type, a light emitting pattern, and a second semiconductor pattern of a second conductivity type, sequentially stacked on the substrate having the first block pattern formed thereon, the light emitter having a first portion formed on the first block pattern, and a second portion formed between two adjacent first block patterns, the second portion formed lower than the first portion to define a recessed region, and a second block pattern formed on the light emitter to fill the recessed region.

Abstract: Provided are a vertical-type light emitting device and a method of manufacturing the same. The light emitting device includes a p-type semiconductor layer, an active layer, and an n-type semi-conductor layer that are stacked, a cover layer disposed on a p-type electrode layer to surround the p-type electrode layer, a conductive support layer disposed on the cover layer, and an n-type electrode layer disposed on the n-type semiconductor layer.

Abstract: A semiconductor light emitting device having high reliability and excellent light distribution characteristics is provided. Specifically, a semiconductor light emitting device 1 is provided with an n-electrode 50, which is arranged on a light extraction surface on the side opposite to the surface whereupon a semiconductor stack 40 is mounted on a substrate 10. A plurality of convexes are arranged on a first convex region 80 and a second convex region 90 on the light extraction surface. The second convex region 90 adjoins to the interface between the n-electrode 50 and the semiconductor stack 40, between the first convex region 80 and the n-electrode 50.

Abstract: An LED can include a pair of electrode members, and an LED chip joined to a chip mount portion disposed at the extremity of one of the pair of electrode members. The LED chip can be electrically connected to the pair of electrode members. A transparent resin portion can include a wavelength conversion material mixed therein, the transparent resin portion formed in such a manner as to surround the LED chip, wherein the LED chip is positioned offset toward one side in the transparent resin portion, and wherein the wavelength conversion material mixed in the transparent resin portion has a higher density around the LED chip within the transparent resin portion.

Abstract: A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate.

Abstract: A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate.

Abstract: A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate.

Abstract: Disclosed herein is a light emitting device. The light emitting device includes a light emitting diode disposed on a substrate to emit light of a first wavelength. A transparent molding part encloses the LED, a lower wavelength conversion material layer is disposed on the transparent molding part, and an upper wavelength conversion material layer is disposed on the lower wavelength conversion material layer. The lower wavelength conversion material layer contains a phosphor converting the light of the first wavelength into light of a second wavelength longer than the first wavelength, and the upper wavelength conversion material layer contains a phosphor converting the light of the first wavelength into light of a third wavelength, which is longer than the first wavelength but shorter than the second wavelength. Light produced via wavelength conversion is prevented from being lost by the phosphor. Light emitting devices including a multilayer reflection mirror are also disclosed.

Abstract: A light emitting apparatus includes a light emitting device mounted on a base. First and second leads are electrically connected to the light emitting device. A first resin molding member formed of thermosetting resin covers at least partially the base and the first and second leads so that the first resin molding member is formed integrally with the base and the first and second leads. A second resin molding member formed of thermosetting resin is in contact with at least a part of the first resin molding member and covers the light emitting device. A recessed portion is formed in the first resin molding member on a light emitting device mount surface side of the base to open upward and to have a side surface. A protection device is mounted on the first lead or the second lead. The protection device is covered by the first resin molding member.