Patents Issued in April 14, 2011
  • Publication number: 20110086490
    Abstract: A single-side implanting process for capacitors of stack DRAM is disclosed. Firstly, form a stacked structure with a dielectric layer and an insulating nitride layer on a semi-conductor substrate and etch the stacked structure to form a plurality of trenches. Then, form conductive metal plates respectively on an upper surface of the stacked structure and bottoms of the trenches, form a continuous conductive nitride film, form a continuous oxide film, and form a photo resist layer for covering the trenches which are provided for isolation. Then, form a plurality of implanted oxide areas on a single-side surface, remove the photo resist layer, remove the plurality of implanted oxide areas, remove the conductive metal plates and the conductive nitride film uncovered by the oxide film, and remove the oxide film and the dielectric film.
    Type: Application
    Filed: March 10, 2010
    Publication date: April 14, 2011
    Applicant: INOTERA MEMORIES, INC.
    Inventors: HSIAO-LEI WANG, SHIN BIN HUANG, CHING-NAN HSIAO, CHUNG-LIN HUANG
  • Publication number: 20110086491
    Abstract: A method of forming an integrated circuit structure includes providing a wafer having a silicon substrate; forming a plurality of shallow trench isolation (STI) regions in the silicon substrate; and forming recesses by removing top portions of the silicon substrate between opposite sidewalls of the plurality of STI regions. Substantially all long sides of all recesses in the silicon substrate extend in a same direction. A III-V compound semiconductor material is then epitaxially grown in the recesses.
    Type: Application
    Filed: July 23, 2010
    Publication date: April 14, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsin Ko, Clement Hsingjen Wann
  • Publication number: 20110086492
    Abstract: An object of an embodiment of the disclosed invention is to provide a method suitable for reprocessing a semiconductor substrate which is reused to manufacture an SOI substrate.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 14, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hideto OHNUMA, Kazuya HANAOKA
  • Publication number: 20110086493
    Abstract: The present invention has an object to provide a semiconductor chip of high reliability with less risk of breakage. Specifically, the present invention provides a semiconductor chip having a semiconductor silicon substrate including a semiconductor device layer and a porous silicon domain layer, the semiconductor device layer being provided in a main surface region on one surface of the semiconductor silicon substrate, the porous silicon domain layer being provided in a main surface region on a back surface which is the other surface of the semiconductor silicon substrate, and the porous silicon domain layer having porous silicon domains dispersed like islands in the back surface of the semiconductor silicon substrate.
    Type: Application
    Filed: December 17, 2010
    Publication date: April 14, 2011
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Kiyonori Oyu, Shigeru Aoki
  • Publication number: 20110086494
    Abstract: To provide a method of removing a heavy metal contained in a thinned semiconductor substrate. A method of removing a heavy metal in a semiconductor substrate of the present invention comprises: attaching, to a rear surface of the semiconductor substrate, a material that lowers a potential barrier of the rear surface of the semiconductor substrate, on a front surface of which a circuit is to be formed or is formed; applying a thermal treatment to the semiconductor substrate under a condition based on a thickness and a resistivity of the semiconductor substrate; and, depositing the heavy metal in the semiconductor substrate on the rear surface.
    Type: Application
    Filed: October 6, 2010
    Publication date: April 14, 2011
    Applicant: SUMCO CORPORATION
    Inventors: Noritomo Mitsugi, Masataka Hourai, Shuichi Samata, Kiyoshi Nagai, Kei Matsumoto
  • Publication number: 20110086495
    Abstract: Methods for fabricating semiconductor devices are provided. The methods include providing a semiconductor substrate having pFET and nFET regions, each having active areas and shallow trench isolation. A hardmask layer is formed overlying the semiconductor substrate. A photoresist layer is provided over the hardmask layer. The phoresist layer is patterned. An exposed portion of the hardmask layer is removed from one of the pFET region and nFET region with the patterned photoresist acting as an etch mask to define a masked region and an unmasked region. An epitaxial silicon layer is formed on the active area in the unmasked region. A protective oxide layer is formed overlying the epitaxial silicon layer. The hardmask layer is removed from the masked region with the protective oxide layer protecting the epitaxial silicon layer during such removal step. The protective oxide layer is removed from the epitaxial silicon layer.
    Type: Application
    Filed: October 12, 2009
    Publication date: April 14, 2011
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Rohit PAL, Janice MONZET
  • Publication number: 20110086496
    Abstract: A metal organic chemical vapor deposition apparatus includes reaction chambers in which nitride layers is deposited on a substrate using a group III-V material, a buffer chamber connected to the reaction chambers and in which a transfer robot is disposed to transfer the substrate into the reaction chambers, a gas supply device configured to selectively supply one or more of hydrogen, nitrogen, and ammonia gases into the buffer chamber so that when the buffer chamber communicates with one of the reaction chambers, the buffer chamber has the same atmosphere as an atmosphere of the reaction chamber, and a heater disposed in the buffer chamber. Nitride layers are deposited on a substrate in the reaction chambers, and the temperature and gas atmosphere of the buffer chamber are adjusted such that when the substrate is transferred, epitaxial layers formed on the substrate can be stably maintained.
    Type: Application
    Filed: September 29, 2010
    Publication date: April 14, 2011
    Applicant: LIGADP CO., LTD.
    Inventor: Joo Jin
  • Publication number: 20110086497
    Abstract: A method of producing a device includes embedding trenches with an epitaxial layer having high crystallinity while a mask oxide film remains unremoved. An n-type semiconductor is formed on the surface of a silicon substrate, and a mask oxide film and a mask nitride film are formed on the surface of the n-type semiconductor. The mask laminated film is opened by photolithography and etching, and trenches are formed in the silicon substrate. The width of the remaining mask laminated film is narrowed and portions of the n-type semiconductor close to the opening ends of the trenches are exposed. The trenches are embedded with a p-type semiconductor and the surface of the mask laminated film is prevented from being covered with the p-type semiconductor. The p-type semiconductor is grown from the second exposed portions of the n-type semiconductor. V-shaped grooves are prevented from forming on the surface of the p-type semiconductor.
    Type: Application
    Filed: December 14, 2010
    Publication date: April 14, 2011
    Applicant: c/o FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventor: Kazuya YAMAGUCHI
  • Publication number: 20110086498
    Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.
    Type: Application
    Filed: December 20, 2010
    Publication date: April 14, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, Calvin Sheen
  • Publication number: 20110086499
    Abstract: A method for removing a photoresist is disclosed. First, a substrate including a patterned photoresist is provided. Second, an ion implantation is carried out on the substrate. Then, a non-oxidative pre-treatment is carried out on the substrate. The non-oxidative pre-treatment provides hydrogen, a carrier gas and plasma. Later, a photoresist-stripping step is carried out so that the photoresist can be completely removed.
    Type: Application
    Filed: October 13, 2009
    Publication date: April 14, 2011
    Inventors: Chin-Cheng Chien, Chan-Lon Yang, Chiu-Hsien Yeh
  • Publication number: 20110086500
    Abstract: An impurity is implanted by ion implantation into an object to be processed. The ion implantation is performed using an ion beam which is diverged after being temporarily converged.
    Type: Application
    Filed: July 23, 2010
    Publication date: April 14, 2011
    Inventors: Kenji Yoneda, Hiroko Kubo
  • Publication number: 20110086501
    Abstract: A method of processing a substrate having horizontal and non-horizontal surfaces is disclosed. The substrate is implanted with particles using an ion implanter. During the ion implant, due to the nature of the implant process, a film may be deposited on the surfaces, wherein the thickness of this film is thicker on the horizontal surfaces. The presences of this film may adversely alter the properties of the substrate. To rectify this, a second process step is performed to remove the film deposited on the horizontal surfaces. In some embodiments, an etching process is used to remove this film. In some embodiments, a material modifying step is used to change the composition of the material comprising the film. This material modifying step may be instead of, or in addition to the etching process.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 14, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: George D. Papasouliotis, Vikram Singh, Heyun Yin, Helen L. Maynard, Ludovic Godet
  • Publication number: 20110086502
    Abstract: An method of fabricating the gate structure comprises: sequentially depositing and patterning a dummy oxide layer and a dummy gate electrode layer on a substrate; surrounding the dummy oxide layer and the dummy gate electrode layer with a nitrogen-containing dielectric layer and an interlayer dielectric layer; removing the dummy gate electrode layer; removing the dummy oxide layer by exposing a surface of the dummy oxide layer to a vapor mixture comprising NH3 and a fluorine-containing compound at a first temperature; heating the substrate to a second temperature to form an opening in the nitrogen-containing dielectric layer; depositing a gate dielectric; and depositing a gate electrode.
    Type: Application
    Filed: April 9, 2010
    Publication date: April 14, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Matt YEH, Yi-Chen HUANG, Fan-Yi HSU, Ouyang HUI
  • Publication number: 20110086503
    Abstract: A method for fabricating a semiconductor device includes providing a substrate including cell regions and peripheral regions; selectively forming a gate conductive layer over the substrate in the peripheral regions, forming a sealing layer over the substrate with the gate conductive layer formed thereon, forming an insulation layer over the sealing layer to cover the substrate with the gate conductive layer formed on the substrate, planarizing the insulation layer to expose the sealing layer formed over the gate conductive layer, and forming a plurality of plugs in the cell regions, the plurality of the plugs penetrating the insulation layer and the sealing layer.
    Type: Application
    Filed: December 30, 2009
    Publication date: April 14, 2011
    Inventors: Ji-Min LIM, Kyung-Ho Hwang
  • Publication number: 20110086504
    Abstract: A method for forming an integrated circuit is provided. The method includes forming a gate dielectric structure over a substrate. A titanium-containing sacrificial layer is formed, contacting the gate dielectric structure. The whole titanium-containing sacrificial layer is substantially removed.
    Type: Application
    Filed: September 10, 2010
    Publication date: April 14, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo Bin HUANG, Hsin-Chien LU, Ryan Chia-Jen CHEN, Chi-Ming YANG, Chyi Shyuan CHERN, Chin-Hsiang LIN
  • Publication number: 20110086505
    Abstract: The metallic bump is directly formed on a semiconductor wafer's I/O pad without UBM. First, a zinc layer is formed on the I/O pad or an anti-oxidation layer of the I/O pad is selectively etched off. Then, an isolative layer and a copper foil are arranged sequentially in this order above the I/O pad. The isolative layer is originally in a liquid state or in a temporarily solid state and later permanently solidified. Then, a via above the I/O pad is formed by removing part of the isolative layer and the cooper foil. Subsequently, a thin metallic layer connecting the copper foil and the I/O pad is formed in the via and a plating resist on the copper foil is formed. Then, a metallic bump is formed from the via whose height is controlled by the plating resist. Finally, the plating resist and the copper foil are removed.
    Type: Application
    Filed: December 17, 2010
    Publication date: April 14, 2011
    Inventor: Wan-Ling Yu
  • Publication number: 20110086506
    Abstract: An exemplary method for fabricating a damascene interconnect structure includes the following. First, providing a substrate. Second, depositing a multilayer dielectric film on the substrate. Third, forming a patterned photoresist on the multilayer dielectric film. Fourth, etching the multilayer dielectric film to form a plurality of trenches, a portion of each of the trenches having an enlarged width at each of sidewalls thereof. Fifth, filling the trenches with conductive metal to form conductive lines such that air is trapped in extremities of the enlarged width portions of the trenches.
    Type: Application
    Filed: December 13, 2010
    Publication date: April 14, 2011
    Applicant: INNOLUX DISPLAY CORP.
    Inventor: SHUO-TING YAN
  • Publication number: 20110086507
    Abstract: A method for providing an oxide layer on a semiconductor substrate is disclosed. In one aspect, the method includes obtaining a semiconductor substrate. The substrate may have a three-dimensional structure, which may comprise at least one hole. The method may also include forming an oxide layer on the substrate, for example, on the three-dimensional structure, by anodizing the substrate in an acidic electrolyte solution.
    Type: Application
    Filed: October 18, 2010
    Publication date: April 14, 2011
    Applicant: IMEC
    Inventors: Philippe Soussan, Eric Beyne, Philippe Muller
  • Publication number: 20110086508
    Abstract: A semiconductor device that includes a metal wiring formed on the insulating film and having a main wiring portion laminated with a plurality of metal films and a metal protection film formed at least on the upper surfaces of the main wiring portion and made of a precious metal material.
    Type: Application
    Filed: December 20, 2010
    Publication date: April 14, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Hideaki Kikuchi, Kouichi Nagai, Jirou Miura
  • Publication number: 20110086509
    Abstract: Embodiments of the invention generally provide methods for forming cobalt silicide. In one embodiment, a method for forming a cobalt silicide material includes exposing a substrate having a silicon-containing material to either a wet etch solution or a pre-clean plasma during a first step and then to a hydrogen plasma during a second step of a pre-clean process. The method further includes depositing a cobalt metal layer on the silicon-containing material by a CVD process, heating the substrate to form a first cobalt silicide layer comprising CoSi at the interface of the cobalt metal layer and the silicon-containing material during a first annealing process, removing any unreacted cobalt metal from the substrate during an etch process, and heating the substrate to form a second cobalt silicide layer comprising CoSi2 during a second annealing process.
    Type: Application
    Filed: December 15, 2010
    Publication date: April 14, 2011
    Inventors: SESHADRI GANGULI, Sang-Ho Yu, See-Eng Phan, Mei Chang, Amit Khandelwal, Hyoung-Chan Ha
  • Publication number: 20110086510
    Abstract: A semiconductor device relating to the present invention has multiple gate electrodes arranged on a semiconductor substrate at a narrow spacing and an interlayer insulating film covering the gate electrodes. The interlayer insulating film consists of a hygroscopic insulating film filling gate electrode spacing with a thinner thickness on the gate electrodes than the film thickness on the flat surface of the semiconductor substrate and low-hygroscopic insulating film formed on the hygroscopic insulating film. This structure enables suppressing an increase of contact resistance due to H2O liberated from the hygroscopic insulating film even if very fine contact is formed between the adjacent gate electrodes.
    Type: Application
    Filed: December 17, 2010
    Publication date: April 14, 2011
    Applicant: PANASONIC CORPORATION
    Inventor: Masahiro JOEI
  • Publication number: 20110086511
    Abstract: A photomask used for manufacturing a semiconductor device includes a substrate; and one or more layers disposed over the substrate, the one or more layers defining a full field area and a reduced field area with a primary pattern being formed in the reduced field area, wherein the full field area is defined by a width of at least 90 mm and a height of at least 100 mm, and the reduced field area is defined by a width within the range of approximately 20-80 mm and a height within the range of approximately 20-80 mm, a center point of the primary patterned area being spaced a predetermined distance from a center point of the photomask so that the primary patterned area avoids photomask defects.
    Type: Application
    Filed: June 22, 2010
    Publication date: April 14, 2011
    Inventors: Bryan S. Kasprowicz, Christopher J. Progler
  • Publication number: 20110086512
    Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.
    Type: Application
    Filed: March 15, 2010
    Publication date: April 14, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koji HASHIMOTO, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
  • Publication number: 20110086513
    Abstract: Components of a plasma processing apparatus includes a backing member with gas passages attached to an upper electrode with gas passages. To compensate for the differences in coefficient of thermal expansion between the metallic backing member and upper electrode, the gas passages are positioned and sized such that they are misaligned at ambient temperature and substantially concentric at an elevated processing temperature. Non-uniform shear stresses can be generated in the elastomeric bonding material, due to the thermal expansion. Shear stresses can either be accommodated by applying an elastomeric bonding material of varying thickness or using a backing member comprising of multiple pieces.
    Type: Application
    Filed: December 14, 2010
    Publication date: April 14, 2011
    Applicant: Lam Research Corporation
    Inventors: Anthony De La Llera, Allan K. Ronne, Jaehyun Kim, Jason Augustino, Rajinder Dhindsa, Yen-Kun Wang, Saurabh J. Ullal, Anthony J. Norell, Keith Comendant, William M. Denty, JR.
  • Publication number: 20110086514
    Abstract: A substrate processing method is arranged to perform a heat process on a substrate with a coating film formed thereon to bake and cure the coating film. At first, the substrate, with the coating film formed thereon, is held at a preparatory temperature lower than a lower limit of temperature for baking and curing the coating film, to adjust distribution of a predetermined component in the coating film. Then, the substrate, with distribution of the predetermined component thus adjusted, is subjected to a heat process at a temperature not lower than the lower limit of temperature.
    Type: Application
    Filed: December 20, 2010
    Publication date: April 14, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Takahisa OTSUKA, Tsuyoshi Shibata
  • Publication number: 20110086515
    Abstract: In one embodiment, a mask pattern verification apparatus is disclosed.
    Type: Application
    Filed: September 13, 2010
    Publication date: April 14, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Chikaaki KODAMA, Takanori Urakami, Nozomu Furuta, Shunsuke Kagaya
  • Publication number: 20110086516
    Abstract: A method of forming dielectric film having Si—N bonds on a semiconductor substrate by plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which the semiconductor substrate is placed; introducing a hydrogen-containing silicon precursor in pulses of less than 1.0-second duration into the reaction space wherein the reactive gas and the rare gas are introduced; exiting a plasma in pulses of less than 1.0-second duration immediately after the silicon precursor is shut off; and maintaining the reactive gas and the rare gas as a purge of less than 2.0-second duration.
    Type: Application
    Filed: October 8, 2010
    Publication date: April 14, 2011
    Applicant: ASM JAPAN K.K.
    Inventors: Woo Jin Lee, Kuo-wei Hong, Akira Shimizu, Deakyun Jeong
  • Publication number: 20110086517
    Abstract: Disclosed is a plasma CVD device. In the plasma CVD device, in producing a silicon nitride film while controlling the size of a band gap by CVD, microwaves are introduced into a treatment vessel by a flat antenna having a plurality of holes. The plasma CVD is carried out under a given treatment pressure selected from a pressure range of not less than 0.1 Pa and not more than 1333 Pa at a flow ratio between a silicon-containing compound gas and a nitrogen gas (silicon-containing compound gas flow rate/nitrogen gas flow rate) selected from a range of not less than 0.005 and not more than 0.2, whereby the Si/N ratio in the film is controlled to form a silicon nitride film having a band gap size of not less than 2.5 eV and not more than 7 eV.
    Type: Application
    Filed: March 30, 2009
    Publication date: April 14, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Minoru Honda, Toshio Nakanishi, Masayuki Kohno, Tatsuo Nishita, Junya Miyahara
  • Publication number: 20110086518
    Abstract: A method for ashing hardened resist from a photoresist patterned chromium alloy post etch using a plasma ashing chemistry which contains no gaseous source of hydrogen and contains a gaseous source of oxygen and a gaseous source of nitrogen with an oxygen to nitrogen atomic ratio of at least 5.
    Type: Application
    Filed: October 12, 2009
    Publication date: April 14, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Abbas ALI
  • Publication number: 20110086519
    Abstract: A battery-powered wireless transmitter for connecting to a musical instrument comprising an antenna; a cover comprising a well at one end and a first gear on one side of the well; a T-shaped plug having a horizontal section pivotably disposed in the well and a vertical section projecting out of the well, the plug comprising a spring member at one end of the horizontal section, a second gear on the other end of the horizontal section being urged by the spring member to mesh with the first gear, and an electrically conductive rod projecting out of the vertical section; and an adapter comprising an end socket. Pivoting the rod about the horizontal section by rotating the second gear about the fixed first gear will adjust an angle of the plug with respect to the cover and fix the angle after stopping the pivoting.
    Type: Application
    Filed: October 8, 2009
    Publication date: April 14, 2011
    Applicant: JTS PROFESSIONAL CO., LTD.
    Inventor: Ming-Cheng Chung
  • Publication number: 20110086520
    Abstract: An information handling system includes a printed circuit board and an extension card. The printed circuit board includes a first expansion terminal. The extension card includes a first coupling interface, a retention mechanism, and an access terminal. The first coupling interface is operable to engage the first expansion terminal. The retention mechanism is operable to be coupled to at least a first exterior portion of the first expansion terminal to secure the first coupling interface to the first expansion terminal. The access terminal is operably coupled to the first coupling interface, and the access terminal is electrically coupled the first expansion terminal to access terminal.
    Type: Application
    Filed: December 16, 2010
    Publication date: April 14, 2011
    Applicant: DELL PRODUCTS, LP
    Inventors: Richard S. Mills, Edmond I. Bailey
  • Publication number: 20110086521
    Abstract: An inserting connector includes a plurality of plug electrodes where plug connecting terminals are provided at first ends of the plug electrodes and plug terminals are provided at second ends of the plug electrodes, the plug connecting terminals being configured to be connected to a board, the plug terminals being configured to be connected to jack terminals; wherein the plug connecting terminals extend in a direction perpendicular to a surface of the board; the plug terminals extend in a movable direction where the plug terminals are attached to or detached from the jack terminals; the plug electrodes are bent at an angle ? in longitudinal directions of the plug electrodes, the angle ? being greater than 0 degrees and less than 90 degrees.
    Type: Application
    Filed: September 17, 2010
    Publication date: April 14, 2011
    Applicants: FUJITSU COMPONENT LIMITED, FUJITSU LIMITED
    Inventors: Yasuyuki Miki, Mitsuru Kobayashi, Hiroshi Tajiri, Takahiro Kondou, Koji Ishikawa, Akira Tamura
  • Publication number: 20110086522
    Abstract: A connector assembly includes a printed circuit having a component surface, and an electrical connector having a bottom side mounted on the component surface of the printed circuit. The electrical connector extends a length from a mating face to a rear side that is opposite the mating face. The electrical connector is configured to mate with a mating connector at the mating face. The assembly includes a support member that includes a body having a connector face and a circuit face. The support member is positioned such that the connector face engages the rear side of the electrical connector and the circuit face engages the component surface of the printed circuit to support the electrical connector on the printed circuit.
    Type: Application
    Filed: October 9, 2009
    Publication date: April 14, 2011
    Inventors: Keith McQuilkin Murr, Jordan M. Cole, Brian Patrick Costello
  • Publication number: 20110086523
    Abstract: A battery connector is mounted on a printed circuit board which defines a holding hole therein. The battery connector includes an insulating housing, a plurality of conductive terminals and a fastening member disposed in the insulating housing respectively. The insulating housing defines a plurality of terminal recesses each extending vertically and longitudinally to pass through a top surface and a front surface thereof. The front surface defines a shallow depression. Each of the conductive terminals has a contact portion and a soldering portion exposed from the front surface for being soldered on the printed circuit board. The fastening member has a base board engaged in the shallow depression and exposed from the front surface for being soldered on the printed circuit board. A soldering tail is extended opposite to the insulating housing from a portion of the base board for being inserted into the holding hole.
    Type: Application
    Filed: October 13, 2009
    Publication date: April 14, 2011
    Inventors: Chih-Lin Yang, Hsin-Tsung Ho
  • Publication number: 20110086524
    Abstract: An electrical connector secured to a PCB having welding areas and through holes, includes an insulative housing defining a receiving cavity and a plurality of contacts arranged in the housing. Each contact defines a contacting portion received in the receiving cavity, a soldering portion extending out of the housing to be connected with the welding area and a connecting portion perpendicular to the soldering portion which is connecting the contacting portion and the soldering portion. At least one contact further includes a board-lock portion bending from a distal end of the soldering portions which is adapted for inserting in the through hole of the PCB.
    Type: Application
    Filed: June 1, 2010
    Publication date: April 14, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: DE-JIN CHEN
  • Publication number: 20110086525
    Abstract: The invention relates to a circuit board arrangement and to an electric connection module having a carrier module and at least one electric contact, and to an attachment module, wherein the invention provides that the attachment module is used for the protection against the touch of the at least one electric contact, and is made of an elastic plastic, and wherein further the carrier module is provided for accomodating the at least one electric contact. For this purpose the carrier module is made of another temperature-resistant plastic in order to be suitable for a soldering process at high temperatures. During the soldering process, at least one electric contact can be soldered to a circuit board.
    Type: Application
    Filed: February 18, 2009
    Publication date: April 14, 2011
    Applicant: PHOENIX CONTACT GMBH & CO. KG
    Inventors: Klaus Begemann, Ansgar Kathmann, Markus Kettern
  • Publication number: 20110086526
    Abstract: An illuminating device is provided with a cold cathode fluorescent tube (discharge tube) (20), an inverter circuit (T) that is connected to the cold cathode fluorescent tube (20) and drives the cold cathode fluorescent tube (20) to be turned on, a chassis (12) made from metal for accommodating the cold cathode fluorescent tube (20), an inverter circuit board (24) on which the inverter circuit (T) is mounted and in which a ground wire (G) is provided, and a connector (21) for electrically connecting the cold cathode fluorescent tube (20) and the inverter circuit (T). The connector (21) is provided with a conductor (23) for electrically connecting the chassis (12) and the ground wire (G).
    Type: Application
    Filed: April 14, 2009
    Publication date: April 14, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Daisuke Kamata
  • Publication number: 20110086527
    Abstract: The invention relates to an adapter set (11). The adapter set is made up of a plug part (13) and a socket part (15). The plug part (13) is provided with at least one three-pole plug contact (20,30,40,50) of a particular country standard at one end and a three pole safety plug socket (17) at the other end of the adapter set (11). The socket part (15) is provided with a three-pole safety plug (19) and a three-pole multi-way plug socket (16). The adapter set (11) comprises one single safety plug (19), namely the plug formed on the socket part (15). It is provided that the polarity of the multi-way plug socket matches the polarity of the plug contacts.
    Type: Application
    Filed: June 16, 2009
    Publication date: April 14, 2011
    Inventor: Walter Ruffner
  • Publication number: 20110086528
    Abstract: A spark plug socket has an elastic base member and a contact element secured in the base member. The base member has a spark plug receptacle for a spark plug and the contact element has a contact receptacle for a terminal of the spark plug. The spark plug socket is removable in a removing direction from the spark plug. In an unloaded state of the spark plug socket arranged on the spark plug, a section of the contact receptacle engages behind the terminal of the spark plug in the removing direction of the spark plug socket. A longitudinal center axis of the contact receptacle is slanted relative to a longitudinal center axis of the spark plug receptacle. The contact element is adjustable against an elasticity of the base member such that an angle between the longitudinal center axis of the contact receptacle and the longitudinal center axis of the spark plug receptacle is reduced.
    Type: Application
    Filed: September 25, 2010
    Publication date: April 14, 2011
    Applicant: ANDREAS STIHL AG & CO. KG
    Inventors: Michael Schneider, Georg Maier
  • Publication number: 20110086529
    Abstract: A lever type connector includes a lever which includes a pair of parallel plates and a grip portion connecting parallel plates each other and is attached to a connector housing. Each of the parallel plates is formed with a reception hole into which one of shafts is inserted and a cam groove. First and second retaining projections which retain the lever by engaging with a retaining portion provided on the lever are provided at opposite ends of the opposite sides of the connector housing. The lever is retained by the first retaining projection so as to be located at a position where a rear face is exposed so that a terminal connected with a wire can be inserted through the rear face, and is retained by the second retaining projection so as to dispose the cam groove at a position where the cam groove can receive a cam pin of a mating connector.
    Type: Application
    Filed: September 8, 2010
    Publication date: April 14, 2011
    Applicant: YAZAKI CORPORATION
    Inventors: Tohru KOBAYASHI, Shoji YAMAMOTO
  • Publication number: 20110086530
    Abstract: An electronic card connector includes a base, upper and lower terminals and an ejector including a core, a sliding sheet, a guiding rod and an elastic member. A baffle separates the base into upper and lower slots for respectively accommodating upper and lower cards. The core has a sliding slot, which has one end having a concave positioning point, and the other end having a starting point, such that unidirectional circulation successively from the starting point to the positioning point and then to the starting point is formed. The sheet may slide relatively to the base and has first and second pushing portions respectively disposed in the lower and upper slots. The rod has one end engaged into the sliding slot and is slidable along the sliding slot. The elastic member provides elasticity for moving the sliding sheet into the base and then returning the sheet to a home position.
    Type: Application
    Filed: October 14, 2010
    Publication date: April 14, 2011
    Inventor: Horng Yu TSAI
  • Publication number: 20110086531
    Abstract: The invention is a bus bar comprising a cover part made of an insulating material, and a bottom part comprising two chambers each for the reception of one pole connector. A chamber partition wall is arranged between each set of chambers, wherein at least one connecting lug is arranged on a corresponding pole connector. The cover part can be set on the bottom part in such a way that each of the pole connectors is covered, and each of the connecting lugs extends out through corresponding openings in the cover part. At least one partition wall is arranged on the cover part, which is positioned between two adjacent connecting lugs when the cover part is set on the bottom part. The bottom part is closable on its front side by a set of one or more end caps.
    Type: Application
    Filed: November 12, 2009
    Publication date: April 14, 2011
    Inventors: Friedbert Brütsch, Ralph Bock
  • Publication number: 20110086532
    Abstract: Electrical connection coupling apparatuses are provided that can include a male component encompassing an end of a first electrical conduit; a female component encompassing an end of a second electrical conduit, wherein when coupled the components define apposing parabolas with the wide ends of the parabolas opposing one another, and each parabola tapering to the electrical conduit. Electrical connection coupling apparatuses can include a recess extending along a lateral portion of the component; and a clasping assembly comprising a member having an end pivotably engaged within the recess, the member extending along its length to a flange. Receptacle adapters are provided that can include a body extending from a male coupling end to a female coupling end, the body defining sidewalls extending between the ends; a flange configured to couple the body to an electrical outlet; and a recess extending from the female coupling end along the body.
    Type: Application
    Filed: October 8, 2009
    Publication date: April 14, 2011
    Inventor: Shawn Jackson
  • Publication number: 20110086533
    Abstract: A lever engagement type connector includes a first connector housing having a retaining portion and a second connector housing. A lever formed with a cam groove is rotatably attached to the first connector housing. An engagement pin engaged with the cam groove is projected on the second connector housing. A wire cover is attached to the first connector housing. An engagement portion engaged with the retaining portion is provided in the wire cover. The lever is formed with a jig insertion hole at a position where an engagement area between the retaining portion and the engagement portion is covered by the lever in a state that the lever is disposed at a position other than a predetermined position.
    Type: Application
    Filed: August 30, 2010
    Publication date: April 14, 2011
    Applicant: YAZAKI CORPORATION
    Inventors: Tohru KOBAYASHI, Hiroshi MIYAZAKI
  • Publication number: 20110086534
    Abstract: A device for securing a first electrical connector to a second electrical connector, comprising a bracket body; and at least one engaging portion extending from the bracket body to the second electrical connector and coupling to a portion of the second electrical connector. Also provided is a method of securing one electrical connector to another electrical connector and an interconnect system comprising a first connector, a second connector, a third connector, and an engaging device.
    Type: Application
    Filed: May 12, 2009
    Publication date: April 14, 2011
    Inventor: Chin Hua Lim
  • Publication number: 20110086535
    Abstract: A connector assembly includes a first male connector, a second male connector, and a female connector. The female connector defines two receiving slots side by side. The first male connector includes a first body, a first inserting terminal, extending downwardly from the first body, and a first securing portion. The first inserting terminal engages one of the receiving slots of the female connecter. The second male connector includes a second body; a second inserting terminal, extending downwardly from the second body; and a second securing portion, engaging the slot of the first male connector. The second inserting terminal engages the other one of the receiving slots of the female connecter.
    Type: Application
    Filed: January 30, 2010
    Publication date: April 14, 2011
    Applicants: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHIN-WEN YEH, ZHI-JIAN PENG
  • Publication number: 20110086536
    Abstract: A connector comprises a connector body (40), a connector upper housing (10), a locking component (20) and a connecting assembly (30) provided within the connector body (40). The locking component (20) includes a locking knob (23) and a locking bolt (21). Holes are provided on the middle of the connecting assembly (30) and the connector body (40) respectively to match with the locking bolt (21). The diameter of the locking knob (23) of the locking component (20) is larger than the width of the connector body (40). The connector upper housing (10) is fixed on the connector body (40) and restricts the locking knob (23) between the connector body (40) and the connector upper housing (10).
    Type: Application
    Filed: December 17, 2008
    Publication date: April 14, 2011
    Applicant: Hytera Communications Corp., Ltd.
    Inventors: Tang Zhou, Shaowei Geng
  • Publication number: 20110086537
    Abstract: A cable assembly (100), comprises an insulative housing (1); a plurality of contacts (2) disposed in the housing; a cable (4) electrically connecting to the plurality of contacts; a cover (5) formed around a rear end of the housing and a connection region between the contacts and the cable; and a positioning mechanism (6) detachably connected to one lateral side of the housing.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 14, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: PING-SHENG SU, HONG-LEI FAN
  • Publication number: 20110086538
    Abstract: The present invention relates to a pull-through modular jack and method of use thereof. The modular jack allows wires to be fed through the housing and pulled tight prior to terminating. This ensures that the wires terminate with the insulation displacement contact very close to the point at which the wires are still twisted. Termination is made by moving a pressing portion to a pressed position, which then pushes the wires into the insulation displacement contacts that displace the wire insulation to make contact.
    Type: Application
    Filed: December 14, 2010
    Publication date: April 14, 2011
    Applicant: JOHN MEZZALINGUA ASSOCIATES, INC. D/B/A PPC
    Inventor: Jeremy Amidon
  • Publication number: 20110086539
    Abstract: A cable end connector has a main body portion and male connector portions extending therefrom. The male connector portions are respectively receivable in recesses in an end portion of a cable connection component. The cable end connector is adapted to display status light signals emitted from between the recesses at the end portion of the cable connection component.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 14, 2011
    Inventor: Jerry G. Aguren