Abstract: A frontside of a chip is bonded to a top surface of a chip carrier. Seal material is dispensed at a periphery of the top surface of the chip carrier. A solder TIM having a first side and a second side is provided. The first side of the TIM contacts a backside of the chip. A reflow is performed to melt the TIM. The second side of the TIM is bonded to a lid. The seal material is cured. The lid is attached to the top surface of the chip carrier. Backfill material is injected into a space between the top surface of the chip carrier and the lid. The backfill material abuts sides of the TIM. The backfill material is cured. TIM solder cracking and associated thermal degradation are mitigated.

Abstract: A power module includes one or more semiconductor power devices bonded to an insulated metal substrate (IMS). A plurality of cooling fluid channels is integrated into the IMS.

Abstract: An interconnection structure having an oxygen trap pattern in a semiconductor device, and a method of fabricating the same are provided. The interconnection structure includes a lower interlayer insulating layer formed on a semiconductor substrate. A metal layer pattern and a capping layer pattern are sequentially stacked on the lower interlayer insulating layer. An oxygen trap pattern is disposed on the capping layer pattern and includes a conductive oxygen trap pattern.

Abstract: In a method of manufacturing a semiconductor-device mounted board, connection terminals are formed on electrode pads on a semiconductor integrated circuit respectively. A first insulating layer is formed to cover the connection terminals. A plate-like medium having a rough surface is disposed on the first insulating layer. The rough surface of the plate-like medium is pressed onto the first insulating layer so that a part of each of the connection terminals is exposed. A semiconductor device is produced by removing the plate-like medium. A second insulating layer is formed to cover side surfaces of the semiconductor device. A wiring pattern is formed to cover surfaces of the first and second insulating layers, the wiring pattern being electrically connected to the exposed connection terminal parts.

Abstract: A mounting structure and a mounting method which are capable of securely electrically connecting wiring on a board and a device to each other in the case where the device is mounted on the board, and are capable of forming a finer bump, and increasing the number of pins are provided. A device includes at least one projection having a structure in which a surface of at least a tip part of a projecting section made of an elastic body is coated with a conductive film.

Abstract: A wiring substrate includes: a semiconductor chip on which a plurality of bumps are mounted, and a plurality of connection pads which are joined to the bumps mounted on the semiconductor chip in a flip chip method, wherein the connection pads of a peripheral portion of the wiring substrate are formed in a non-solder mask defined structure, and the connection pads of a center portion of the wiring substrate are formed in a solder mask defined structure.

Abstract: A printed circuit board includes a body part formed with connection pads on a first surface thereof; and a warpage compensating part formed over the first surface of the body part and having a height that increases from edges toward a center of the warpage compensating part so that an upper surface of the warpage compensating part facing away from the first surface of the body part is convex upward. The warpage compensating part comprises conductive layer patterns formed over the first surface of the body part to be electrically connected to the connection pads; and a solder resist formed over the first surface of the body part so as to expose the conductive layer patterns. The height of the solder resist gradually increases from both edges toward a center of the solder resist.

Abstract: Lead free solder interconnections for integrated circuits. A copper column extends from an input/output terminal of an integrated circuit. A cap layer of material is formed on the input/output terminal of the integrated circuit. A lead free solder connector is formed on the cap layer. A substrate having a metal finish solder pad is aligned with the solder connector. An intermetallic compound is formed at the interface between the cap layer and the lead free solder connector. A solder connection is formed between the input/output terminal of the integrated circuit and the metal finish pad that is less than 0.5 weight percent copper, and the intermetallic compound is substantially free of copper.

Abstract: In a semiconductor device package having a stress relief spacer, and a manufacturing method thereof, metal interconnect fingers extend from the body of a chip provide for chip interconnection. The metal fingers are isolated from the body of the chip by a stress-relief spacer. In one example, such isolation takes the form of an air gap. In another example, such isolation takes the form of an elastomer material. In either case, mismatch in coefficient of thermal expansion between the metal interconnect fingers and the body of the chip is avoided, alleviating the problems associated with cracking and delamination, and leading to improved device yield and device reliability.

Abstract: An interconnect structure is provided that substantially eliminates electro-migration (EM) damage, a design structure and a method of manufacturing. The metal interconnect is formed in a dielectric material. A metal cap is selective to the metal interconnect. The metal cap includes RuX, where X is at Boron, Phosphorous or a combination of Boron and Phosphorous.

Abstract: An interconnect structure for an integrated circuit (IC) device includes a metal line formed within a dielectric layer, the metal line having one or more vertical diffusion barriers therein; wherein the one or more vertical diffusion barriers correspond to a liner material of a via formed above the metal line, with the via extending completely through a thickness of the metal line such that a bottom most portion of the via comprises a portion of the metal line.

Abstract: A high aspect ratio metallization structure is provided in which a noble metal-containing material is present at least within a lower portion of a contact opening located in a dielectric material and is in direct contact with a metal semiconductor alloy located on an upper surface of a material stack of at least one semiconductor device. In one embodiment, the noble metal-containing material is plug located within the lower region of the contact opening and an upper region of the contact opening includes a conductive metal-containing material. The conductive metal-containing material is separated from plug of noble metal-containing material by a bottom walled portion of a U-shaped diffusion barrier. In another embodiment, the noble metal-containing material is present throughout the entire contact opening.

Abstract: Disclosed is a semiconductor article which includes a semiconductor base portion, a back end of the line (BEOL) wiring portion on the semiconductor base portion, a through silicon via and a guard ring. The semiconductor base portion is made of a semiconductor material. The BEOL wiring portion includes a plurality of wiring layers having metallic wiring and insulating material. The BEOL wiring portion does not include a semiconductor material. The through silicon via provides a conductive path through the BEOL wiring portion and the semiconductor base portion. The guard ring surrounds the through silicon via in the BEOL wiring portion.

Abstract: A design structure is provided for interconnect structures containing various capping materials for electrical fuses and other related applications. The structure includes a first interconnect structure having a first interfacial structure and a second interconnect structure adjacent to the first structure. The second interconnect structure has second interfacial structure different from the first interfacial structure.

Abstract: A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region.

Abstract: An electronic packaging having at least one bond pad positioned on a chip for effectuating through-wafer connections to an integrated circuit. The electronic package is equipped with an edge seal between the bond pad region and an active circuit region, and includes a crack stop, which is adapted to protect the arrangement from the entry of deleterious moisture and combination into the active regions of the chip containing the bond pads.

Abstract: A semiconductor device includes: an interconnection substrate on which a semiconductor chip is mounted; electrodes formed on a surface of the interconnection substrate; and solder bumps formed on the electrodes. The solder bump includes a base section and a surface layer section that covers the base section. The surface layer section includes conductive metal selected from the group consisting of Cu, Ni, Au, and Ag, and Sn at least and a ratio of the number of atoms of the conductive metal to the number of Sn atoms per a unit volume is more than 0.01.

Abstract: A wiring structure includes a conductive pattern on a substrate, a first insulation layer pattern between adjacent conductive patterns and a second insulation layer pattern on the first insulation layer pattern. The first insulation layer pattern is separated from the conductive pattern by a first distance to provide a first air gap. The second insulation layer pattern is spaced apart from the conductive pattern by a second distance substantially smaller than the first distance to provide a second air gap. The wiring structure may have a reduced parasitic capacitance while simplifying processes for forming the wiring structure.

Abstract: A semiconductor package including a through-electrode for stacked a semiconductor package and a semiconductor package having the same is disclosed. The semiconductor package through-electrode includes a first electrode having a recessed portion formed therein to pass through a semiconductor chip. A second electrode is disposed within the recess of the first electrode. The first electrode of the semiconductor package through-electrode includes a first metal having a first hardness, and a second electrode comprises a second metal having a second hardness lower than the first hardness. The through-electrode passes through the semiconductor chip body and may be formed with the first metal having the first hardness and/or a first melting point and the second metal having the second hardness and/or a second melting point which are lower than the first hardness and/or the first melting point. This through-electrode allows a plurality of semiconductor packages to be easily stacked.

Abstract: An electroless Cu layer is formed on each side of a packaging substrate containing a core, at least one front metal interconnect layer, and at least one backside metal interconnect layer. A photoresist is applied on both electroless Cu layers and lithographically patterned. First electrolytic Cu portions are formed on exposed surfaces of the electroless Cu layers, followed by formation of electrolytic Ni portions and second electrolytic Cu portions. The electrolytic Ni portions provide enhanced resistance to electromigration, while the second electrolytic Cu portions provide an adhesion layer for a solder mask and serves as an oxidation protection layer. Some of the first electrolytic Cu may be masked by lithographic means to block formation of electrolytic Ni portions and second electrolytic Cu portions thereupon as needed. Optionally, the electrolytic Ni portions may be formed directly on electroless Cu layers.

Abstract: Wire bonding method for reducing height of a wire loop in a semiconductor device, including a first bonding step of bonding an initial ball formed at a tip end of a wire onto a first bonding point using a capillary, thereby forming a pressure-bonded ball; a wire pushing step of pushing the wire obliquely downward toward the second bonding point at a plurality of positions by repeating a sequential movement for a plurality of times, the sequential movement including moving of the capillary substantially vertically upward and then obliquely downward toward the second bonding point by a distance shorter than a rising distance that the capillary has moved upward; and a second bonding step of moving the capillary upward and then toward the second bonding point, and bonding the wire onto the second bonding point by pressure-bonding.

Abstract: Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.

Abstract: A stackable integrated circuit package system includes: forming a first integrated circuit die having a small interconnect and a large interconnect provided thereon; forming an external interconnect, having an upper tip and a lower tip, from a lead frame; mounting the first integrated circuit die on the external interconnect with the small interconnect on the lower tip and below the upper tip; and encapsulating around the small interconnect and around the large interconnect with an exposed surface.

Abstract: Alignment methods of IC device substrates. A first IC device substrate has a first front side for defining a plurality of first IC features, a first backside opposite the first front side, and a first alignment pattern formed on the first front side or the first backside. A second IC device substrate has a second front side for defining a plurality of second IC features, a second backside opposite the second front side, and a second alignment pattern formed on the second front side or the second backside. A first optical detector and a second optical detector are applied to detect the first and second alignment patterns, so as to align the first and second IC device substrates. Specifically, the first and second alignment patterns face toward the first and second optical detectors in opposite directions.

Abstract: Reduce noises emitted from inlet and outlet of cooling air of a soundproof enclosed type generator. An inlet 20 and an outlet 26 of the cooling air are provided to the front and rear of a chassis 2, respectively. An air supply duct 8 is detachably mounted to the inlet 20, and an exhaust duct 9 is detachably mounted to the outlet 26. An air taking-in opening 8a facing downward is provided to the air supply duct 8 which guides the air towards horizontally opened inlet 20. The exhaust duct 9 is equipped with wall surface and a straightening vane 27 at a position opposed to the cooling air discharged from the outlet 26 to change the cooling air flow in complicated fashion to discharge it outside. Sound-absorption materials are pasted to the interior surface of the air supply duct 8 and the exhaust duct 9.

Abstract: The system for generating and storing clean energy includes a flexible body externally exposed to an intermittent localized pressure. A pair of one-way check valves couple to the flexible body. A first valve is configured to facilitate unidirectional fluid flow into the flexible body and a second valve configured to facilitate unidirectional fluid flow out from the flexible body. A substantially rigid and planar base is positioned between the flexible body and the intermittent localized pressure so that pressure point peristaltic expansion and compression cycles along a portion of the flexible body cause positive fluid displacement into and out from the flexible body. An energy generation system in fluid communication with the flexible body is configured to generate electrical energy from pressurized fluid resultant from the peristaltic expansion and compression cycles.

Abstract: A start-up method of a wind turbine generator includes a step of increasing a pitch angle of a wind turbine blade from a feather pitch angle to a fine pitch angle.

Abstract: In one aspect, a method for controlling the amplitude modulation of the noise generated by wind turbines is disclosed. The method may include determining a rotor position of a first wind turbine, determining a rotor position of a second wind turbine, determining if the first and second wind turbines are operating in-phase and, in the event that the first and second wind turbines are operating in-phase, adjusting an operating condition of at least one of the first wind turbine and the second wind turbine so that the first and second wind turbines operate out-of-phase.

Abstract: This invention is for a vertical axis wind turbine apparatus supported in a tower with wind diverter doors for controlling the air impinging on the turbine blades. The diverter doors are closable in high wind conditions to seal off the wind turbine to protect the turbine against damage.

Abstract: The wind power generator includes: a wind tunnel formed by a columnar member erected on a foundation in a vertical direction; a plurality of wind-collecting plates that extends from a circumferential wall of the columnar member in directions normal to the circumferential wall; a plurality of upper and lower guide plates provided between the wind-collecting plates; a plurality of wind inlets that introduces wind collected by the wind-collecting plates into the wind tunnel; back-flow preventing means that allow only the flow of wind blowing from the outside of the columnar member into the inside of the columnar member; a turbine that is driven by wind blowing out from one end of the wind tunnel, and power generator that is driven by the turbine.

Abstract: A power line communication device comprises a plurality of transformers in series. These transformers are used to increase the voltage of a digitally encoded signal in a stepwise fashion prior to being coupled into a power line. While a transmit path includes at least a first transformer and a second transformer in series, a receive path may include only one of these two transformers. For example a receive path may include only the first transformer, or include the first transformer and a third transformer. The net ratio of voltage increase and decrease may be different in the transmit and receive paths. Additionally, the communication interface can be disposed within an AC/DC converter or distributed among an AC/DC converter and an appliance attached thereto.

Abstract: A method of transmitting data over a power line of a switch mode power supply system includes encoding a switch frequency of the switch mode power supply with the data. A ripple voltage is generated at the encoded switch frequency relative to a voltage generated by the switch mode power supply. The ripple voltage is conducted over the power line of the system. The ripple voltage is de-coupled from the power line and the data is decoded from the encoded switch frequency of the coupled ripple voltage.

Abstract: A method for detecting a synchronization point of an alternating power in comparing the alternating waveform with a threshold voltage is provided. The method includes the steps of detecting a rising point at which the voltage of the alternating waveform changes from a level lower than the threshold voltage to a level equal to or higher than the threshold voltage; detecting a falling point at which the voltage of the alternating waveform changes from a level equal to or higher than the threshold voltage to a level lower than the threshold voltage; measuring a first interval from the rising point to the falling point subsequent to the rising point; measuring a second interval from the falling point to the rising point subsequent to the falling point; and determining the synchronization point based on a difference between the length of the first interval and the length of the second interval.

Abstract: An energy conversion system transfers energy between an energy source, or storage unit, and an electric device via a first port and a second port and at least one of receives and provides energy via a third port.

Abstract: The disclosure provides for an aircraft galley and lavatory energy system capable of independent operation from a separate aircraft energy generating system. The galley and lavatory energy system comprises an energy source providing electrical energy, heat energy, and at least one by-product; a plurality of galley and lavatory devices for receiving the electrical energy, the heat energy, and the at least one by-product; and, a plurality of connectors for connecting the electrical energy, the heat energy, and the at least one by-product to the galley and lavatory devices. The energy source comprises a fuel cell, a fuel module, and optionally, a supplemental fuel source.

Abstract: A system of localized tapping sections (1, 2 or 3) is provided with air or ground units for the distribution of electrical energy and an assembly on the vehicle (4) for tapping the energy. The electrical energy distribution units are supported by distributing poles (5), only accommodate electrical voltage when the vehicle approaches the related section, and being disconnected when the vehicle (4) leaves the tapping section. The tapping sections are located in vehicle stopping zones, for example, stations (1), acceleration zones, and uphill gradients (2), in order to recharge and/or supply drive energy to the vehicle (4). The system is beneficial to autonomous urban public transportation which accumulates drive energy.

Abstract: A power adapter for a peripheral device such as portable electronics device is disclosed. The power adapter includes a housing that contains electrical components associated with the power adapter. The power adapter also includes a data port provided at a surface of the housing. The data port is configured to provide external power to the peripheral device.

Abstract: A power conditioner includes a main converter to transform a voltage outputted from a power source into a first transformed voltage and output the first transformed voltage to supply power to a power using point; and an auxiliary converter to transform the first transformed voltage outputted from the main converter into a second transformed voltage and output the second transformed voltage to supply power to balance-of-plant (BOP) elements including driving devices of the power source. The main converter includes a first winding to transform the voltage outputted from the power source into the first transformed voltage and output the first transformed voltage to supply power to the power using point; and a second winding to transform the voltage outputted from the power source into a third transformed voltage and output the third transformed voltage to supply power directly to the BOP elements, thereby bypassing the auxiliary converter.

Abstract: Methods of regulating an output voltage of a multi-output isolated power converter are disclosed. One method includes allowing the output voltage to vary unregulated when the output voltage is below a threshold value and preventing the output voltage from increasing when the output voltage reaches the threshold value. Additional methods and multi-output power supplies are also disclosed.

Abstract: A method for power load management is provided in the present invention, wherein two different standard values are determined to be a basis for regulating power consumption. When power consumption exceeds a first standard value, a monitoring procedure is started to monitor consumption status. If the power consumption exceeds a second standard value, an unloading procedure is processed to reduce the power consumption of electrical devices under operation. In another embodiment, the present invention also provides a system for power load management comprising a control unit coupled to at least one electrical device and a power meter. By means of real-time recording of power consumption in the power meter, the control unit is capable of determining the power consumption status and determining whether it is necessary to unload or reload the at least one electrical device.

Abstract: An exemplary method of providing electrical power is provided. A first alternating current is received from a grid. The first alternating current is converted to a first direct current using a first inverter in electrical communication with the grid. The first inverter is also in electrical communication with a fuel cell system. The first direct current is converted to a second alternating current using a second inverter, and the second alternating current is provided to a load.

Abstract: A multi-supply power supply circuit has a first power supply regulating circuit that produces a first power supply voltage; and a second power supply regulating circuit that receives the first power supply voltage from the first power supply regulating circuit as an enable input signal and is operative to produce a second and different power supply voltage. In one embodiment, the first power supply voltage may reach a steady state condition prior to the second power supply voltage reaching a steady state condition. In one example, the multi-supply power supply circuit includes a plurality of cascaded low drop out power supply regulating circuits.

Abstract: The invention relates to a pop reduction system for a switching power conversion system (0, 1), which system comprises an analogue control system (0) and a switching power stage (1), where the pop reduction system comprises an extra power stage (2), controllable means (3) for establishing or eliminating an extra signal path from the output of said control system (0) via said extra power stage (2) to the output terminal of said switching power conversion system (0, 1} and control means (34) for controlling said controllable means (3), whereby establishing or elimination of said extra signal path is attained. The invention furthermore relates to a corresponding method for pop reduction and generally to amplifier systems comprising the pop reduction system according to the invention.

Abstract: A UPS is operated by deasserting a static switch drive signal, e.g., a gate signal to a thyristor, and then delaying provision of power from a converter circuit of the UPS, e.g., an inverter or other source of AC power, until after the switch has current commutated to an off state. For example, expiration of a predetermined time interval following deassertion of the switch drive signal may be detected, and the converter circuit may be enabled to drive the output of the UPS responsive to the detected expiration of the predetermined time interval. Alternatively, a current in the static switch may be detected, and the converter circuit may be enabled to drive the output of the UPS responsive to the detected current. The invention may be embodied as methods and apparatus.

Abstract: An apparatus, system, and method are disclosed for providing alternating current (“AC”) power redundancy in power supplies. A first input module is configured to receive a first AC power input waveform. A second input module is configured to receive a second AC power input waveform. A first switch and second switch are controlled by a switching logic module to select one of the AC power input waveforms for use by a power supply. If the first AC power input waveform is present, then it is selected for use. If both the first and second AC power input waveforms are present, then the first AC power input waveform is selected for use. If only the second AC power input waveform is present then it is selected for use.

Abstract: Certain embodiments of the invention may include systems and methods for providing a hybrid wind-solar inverter. According to an exemplary embodiment of the invention, a method for directing power from alternative power sources to an electrical grid is provided. The method can include: receiving at least two input DC power signals from a plurality of power sources; receiving one or more control signals from the electrical grid; directing, based at least in part on the one or more control signals, at least some of the input DC power signals to an output DC power signal; and, transforming the output DC power signal to an output AC power signal for transmission via the electrical grid.

Abstract: A bipolar pulse generator is implemented in a simple structure while providing a high efficiency design having a relatively low total size, while still allowing access by fibers used to control a photoconductive switch that activates the generator. The bipolar pulse generator includes a stacked Blumlein generator structure with an additional transmission line connected to a load at its near end and short-circuited at its distal end. An extra transmission line is positioned between the Blumlein generator's structure and the load provides specified limited gap between positive and negative sub-pulses. The bipolar pulse generator further includes a bended Blumlein generator structure, in which an existing intrinsic “stray” transmission line is used to provide the bipolar pulse. Still further, bipolar pulse generator includes stepped transmission lines, with additional switches positioned between steps, which are charged by different voltages.

Abstract: A system includes one or more constant “on” outlets, one or more controlled outlets, a two-part power supply, and accompanying circuitry. Other embodiments are also disclosed herein.

Abstract: A method for power load management is provided in the present invention, wherein two different standard values are determined to be a basis for regulating power consumption. When power consumption exceeds a first standard value, a monitoring procedure is started to monitor consumption status. If the power consumption exceeds a second standard value, an unloading procedure is processed to reduce the power consumption of electrical devices under operation. In another embodiment, the present invention also provides a system for power load management comprising a control unit coupled to at least one electrical device and a power meter. By means of real-time recording of power consumption in the power meter, the control unit is capable of determining the power consumption status and determining whether it is necessary to unload or reload the at least one electrical device.

Abstract: A system is described that turns off a high power, power supply when a device no longer needs high power. A low power, power supply or a rechargeable battery provides power to determine when the device again needs high power. The low power supply consumes a minimum possible power when the device does not need high power and the power rechargeable battery is not charged. That is, the high power and low power, power supplies are turned on or off based on the real time power consumption need of the device and the charged state of the battery. The power need of the device is monitored by a current shunt monitoring circuit and a control signal monitoring circuit.