Abstract: Subject matter disclosed herein relates to memory devices comprising a memory array, a first port to interface with a memory controller directly or indirectly via another memory device, a second port to interface with yet another memory device, and a switch to selectively electrically connect the memory controller to a circuit path leading to the second port or to the memory array, wherein the switch may be responsive to a signal generated by the memory controller.

Abstract: Some embodiments provide for a method of mapping a user design to a configurable integrated circuit (IC). The method is for a configurable IC that implements a user design with an associated user design clock cycle. The IC operates on a sub-cycle clock that has multiple sub-cycle periods within a user period of the user design clock cycle. The method identifies multiple port accesses to a first multi-port memory defined in the user design. The accesses are in a single user design clock cycle. The method maps the multiple port accesses to the first multi-port memory to multiple physical-port memory accesses to a second physical-port memory in the configurable IC during multiple sub-cycles associated with a single user design clock cycle.

Abstract: Apparatuses and methods for redirecting data writes are disclosed. In one embodiment a controller may be configured to receive a command including write data and address data identifying a target zone of a data storage medium; determine whether the target zone contains sufficient available data sectors to store the write data; and record the write data to a common area of a different zone when the target zone does not contain sufficient available data sectors, the common area available to store data when a target zone lacks sufficient available data sectors. In another embodiment, a method may comprise receiving a write command identifying a target zone of a data storage medium; determining whether the target zone contains sufficient available data sectors to store the write data; and recording the write data to a common area of a different zone when the target zone does not contain sufficient available data sectors.

Abstract: A network of collection, charging and distribution machines collects, charges and distributes portable electrical energy storage devices (e.g., batteries, supercapacitors or ultracapacitors). Vehicle diagnostic data of a vehicle using the portable electrical energy storage device is stored on a diagnostic data storage system of the portable electrical energy storage device during use of a respective portable electrical energy storage device by a respective vehicle. Once the user places the portable electrical energy storage device in the collection, charging and distribution machine, or comes within wireless communications range of a collection, charging and distribution machine, a connection is established between the collection, charging and distribution machine and the portable electrical energy storage device.

Abstract: An approach for interleaving memory repair data compression and fuse programming operations in a single fusebay architecture is described. In one embodiment, the single fusebay architecture includes a multiple of pages that are used with a partitioning and interleaving approach to handling memory repair data compression and fuse programming operations. In particular, for each page in the single fusebay architecture, a memory repair data compression operation is performed on memory repair data followed by a fuse programming operation performed on the compressed memory repair data.

Abstract: A control device includes a receiver that receives an instruction to update first data stored in a first volume to second data, and a copy processor that starts copying the first data into a second volume in response to the reception of the update instruction by the receiver and limits the start of copying of the first data from the second volume into a third volume until data that is stored in the first volume is completely copied into the second volume.

Abstract: A control apparatus includes a processor. The processor determines, upon detecting a read error on a first volume of a storage under a non-equivalent state, a first storage area in which the read error has occurred. The first storage area is included in the first volume. The processor determines whether a write process has been conducted on the first storage area under the non-equivalent state. The processor determines whether a write process has been conducted on a second storage area under the non-equivalent state. The second storage area is included in a second volume of a storage and corresponds to the first storage area. The processor copies data stored in the second storage area to the first storage area when no write process has been conducted on the first storage area and the second storage area under the non-equivalent state.

Abstract: In one embodiment, the present invention includes a method for receiving an indication of a loss of redundancy with respect to a pair of mirrored memory regions of a partially redundant memory system, determining new mirrored memory regions, and dynamically migrating information stored in the original mirrored memory regions to the new mirrored memory regions. Other embodiments are described and claimed.

Abstract: A memory device sharing system includes M (M represents an integer of 2 or greater) access control apparatus for sharing N (N represents an integer of 2 or greater) memory devices which store data, and a managing apparatus for managing access to the memory devices via the access control apparatus. The managing apparatus checks data stored in the N memory devices, generates data position information representative of the storage positions of data stored in any one of the N memory devices, and sends the data position information to the M access control apparatus. Each of the M access control apparatuses receives the data position information sent from the manager, and accesses the storage position indicated by the data position information if each of the M access control apparatuses receives an access request to access the data from an access request source.

Abstract: A data protection method is provided that includes determining a compressibility score of one or more lines of data stored in a memory. The memory includes a first area characterized by a first reliability level and a second area characterized by a second reliability level. Lines of data with a first compressibility score are migrated to the first area of the memory. Lines of data with a second compressibility score are migrated to the second area of the memory.

Abstract: A system includes an associative memory, a first table, a second table, a comparator, and an updater. The associative memory may include data and associations among data and may be built from the first table. The first table may include a record with a first and second field. The associative memory may be configured to ingest the first field and avoid ingesting the second field. The second table may include a record with a third field storing information indicating whether the first field has been ingested by the associative memory or has been forgotten by the associative memory. The comparator may be configured to compare the first and second table to identify one of whether the first field should be forgotten or ingested by the associative memory. The updater may be configured to update the associative memory by performing one of ingesting or forgetting the first field.

Abstract: The present disclosure includes devices, methods, and systems supporting on unit termination. A number of embodiments include a number of memory units, wherein a memory unit includes termination circuitry, and a memory unit does not include termination circuitry.

Abstract: Different processor elements in multi-task/multi-core system on chip may have different memory requirements at runtime. The method for adaptively allocating cache memory re-allocates the cache resource by updating the bank assignment table. According to the associativity-based partitioning scheme, centralized memory is separated into several groups of SRAM banks which are numbered differently. These groups are assigned to different processor elements to be L2 caches. The bank assignment information is recoded in bank assignment table, and is updated by system profiling engine. By changing the information in bank assignment table, the cache resource re-allocation for processor elements is achieved.

Abstract: Embodiments of the present technology are directed toward techniques for balancing memory accesses to different memory types.

Abstract: An integrated circuit includes a random address generation unit configured to generate a first random address for a data randomizing operation, an address conversion unit configured to convert the first random address and generate a second random address, and a synchronization output unit configured to sequentially output the first and second random addresses in synchronization with a clock signal.

Abstract: A first arrangement including a first interface configured to receive a memory transaction having an address from a second arrangement; a second interface; an address translator configured to determine based on said address if said transaction is for said first arrangement and if so to translate said address or if said transaction is for a third arrangement to forward said transaction without modification to said address to said second interface, said second interface being configured to transmit said transaction, without modification to said address, to said third arrangement.

Abstract: Intercepting a requested memory operation corresponding to a conventional memory is disclosed. The requested memory operation is translated to be applied to a structured memory.

Abstract: Methods and apparatus are disclosed for using a shared page miss handler device to satisfy page miss requests of a plurality of devices in a multi-core system. One embodiment of such a method comprises receiving one or more page miss requests from one or more respective requesting devices of the plurality of devices in the multi-core system, and arbitrating to identify a first page miss requests of the one or more requesting devices A page table walk is performed to generate a physical address responsive to the first page miss request. Then the physical address is sent to the corresponding requesting device, or a fault is signaled to an operating system for the corresponding requesting device responsive to the first page miss request.

Abstract: Methods and apparatus are disclosed for efficient TLB (translation look-aside buffer) shoot-downs for heterogeneous devices sharing virtual memory in a multi-core system. Embodiments of an apparatus for efficient TLB shoot-downs may include a TLB to store virtual address translation entries, and a memory management unit, coupled with the TLB, to maintain PASID (process address space identifier) state entries corresponding to the virtual address translation entries. The PASID state entries may include an active reference state and a lazy-invalidation state. The memory management unit may perform atomic modification of PASID state entries responsive to receiving PASID state update requests from devices in the multi-core system and read the lazy-invalidation state of the PASID state entries. The memory management unit may send PASID state update responses to the devices to synchronize TLB entries prior to activation responsive to the respective lazy-invalidation state.

Abstract: A mechanism is provided for automatically routing network interconnects in a data processing system. A processor in a node of a plurality of nodes receives network topology from neighboring nodes in the plurality of nodes within the data processing system. The processor constructs a system node map that identifies a physical connectivity between the node and the neighboring nodes. The processor programs a switch in the node with a connectivity map that indicates a set of point-to-point connections with the neighboring nodes. The set of point-to-point connections comprise locally-connected connections and pass-through connections.

Abstract: Techniques are described for transmitting predicted output data on a processing element in a stream computing application instead of processing currently received input data. The stream computing application monitors the output of a processing element and determines whether its output is predictable, for example, if the previously transmitted output values are within a predefined range or if one or more input values correlate with the same one or more output values. The application may then generate a predicted output value to transmit from the processing element instead of transmitting a processed output value based on current input values. The predicted output value may be, for example, an average of the previously transmitted output values or a previously transmitted output value that was transmitted in response to a previously received input value that is similar to a currently received input value.

Abstract: An external intrinsic interface. A processor may include a core including a plurality of functional units, an intrinsic module located outside the core, and an interface module to perform relaying between the intrinsic module and a functional unit, among the plurality of functional units.

Abstract: A method of compressing a sequence of program instructions begins by examining a program instruction stream to identify a sequence of two or more instructions that meet a parameter. The identified sequence of two or more instructions is replaced by a selected type of layout instruction which is then compressed. A method of decompressing accesses an X-index and a Y-index together as a compressed value. The compressed value is decompressed to a selected type of layout instruction which is decoded and replaced with a sequence of two or more instructions. An apparatus for decompressing includes a storage subsystem configured for storing compressed instructions, wherein a compressed instruction comprises an X-index and a Y-index. A decompressor is configured for translating an X-index and Y-index accessed from the storage subsystem to a selected type of layout instruction which is decoded and replaced with a sequence of two or more instructions.

Abstract: A method, system and computer program product for allowing portions of programs to be executed on a System z Integrated Information Processor (zIIP). A service call is inserted at the beginning of the zIIP eligible code to enable enclave Service Request Block (SRB)-mode execution on the zIIP processor. An additional service call is inserted at the end of the zIIP eligible code to disable the enclave SRB-mode execution. A module in the operating system, referred to herein as the “zIIP shifter module,” is configured to detect these service calls thereby implementing and terminating the SRB-mode execution so that the zIIP processor executes the zIIP eligible code for the appropriate duration of time. In this manner, only a portion of the programs that contain eligible zIIP executable code is executed on the zIIP processor without requiring the programs to be entirely restructured thereby reducing development cost and improving software development productivity.

Abstract: Systems, methods, and apparatus for configuring utility meters are provided. A meter configuration application may be executed by a device that includes one or more computers and that facilitates utility meter configuration. A plug-in module associated with a utility meter type may be received by the device. Based at least in part upon providing the plug-in module to the meter configuration application, a configuration file may be built for the utility meter type. The utility meter may then be configured utilizing the configuration file.

Abstract: A method for configuring an electricity system including providing a first programmable electronic device, providing a further programmable electronic device adapted to communicate with the first programmable electronic device and configurable according to a first communication configuration mode which is dynamic or a static, providing a first configuration description file defining communications between the first and further programmable electronic devices according to a second communication configuration mode opposite to the first mode, and processing via computer the first file to convert it into a converted configuration description file defining communications configuration between the first and further programmable electronic devices according to the first mode.

Abstract: Hibernation and remote restore functions of a client logical partition (LPAR) that exists within a data processing system having cluster-aware Virtual Input/Output (I/O) Servers (VIOSes) is performed via receipt of commands via a virtual control panel (VCP) through an underlying hypervisor. The client hibernation data file is stored in a shared repository by a source/original VIOS assigned to the client. The hypervisor receives a remote restart command and assigns a target/remote client LPAR and a target VIOS. The source I/O adapters and target I/O adapters are locked and the target VIOS gathers adapter configuration information from the source VIOS and configures the target adapters to be able to perform the I/O functionality provided by the source adapters to the client LPAR. The target VIOS then retrieves the client's hibernation data file, and the client LPAR is restored at the remote LPAR with the target VIOS providing the client's I/O functionality.

Abstract: According to one embodiment, an apparatus comprises a physical computing device including a network interface configured to enable communications over a network, and at least one processor. The apparatus captures an operational state of the physical computing device including information pertaining to a state of the physical computing device resulting from operations performed by the physical computing device. The apparatus further configures the physical computing device with the operational state captured from a desired computing device to continue operations of the desired computing device on the physical computing device. Embodiments may further include a method and computer-readable media encoded with software for the storage and transfer of physical machine state in substantially the same manner described above.

Abstract: A computer system and an operation system loading method thereof are provided. The computer system comprises a universal serial bus (USB) storage device storing a boot image, servers and a boot image sharer comprising USB ports, a memory, a first USB host controller and a micro-processor. The micro-processor controls the first USB host controller to emulate each USB port to the USB storage device, and stores the boot image to memory, such that the boot image is shared to the USB ports. The servers are respectively coupled to the USB ports, wherein each server comprises a second USB host controller and a basic input output system (BIOS). The second USB host controller is coupled to one of the USB ports. The BIOS reads the boot image from the emulated USB storage device and loads an operation system according to the boot image.

Abstract: A computer system includes a display and a computer. The display includes a first data port, a boot button connected to a first pin of the first data port, and a display control circuit connected to the boot button. The computer includes a second data port connected to the first data port, a buffer connected to a second pin of the second data port, and a computer control circuit. When the boot button is turned on, the display control circuit receives a low-level signal. The display control circuit boots the display, and controls the display to operate. The computer control circuit receives the low-level signal through the first and second data ports, and the buffer. The computer control circuit boots the computer, and controls the computer to operate.

Abstract: A power switching system, a computer system, and a reboot controlling method thereof are disclosed. The power switching system is used to the computer system and includes a first power input port, a first power output port, a first linear regulator module, and a first switch module. The first power input port is used for inputting a first power signal. The first power output port is used for outputting a second power signal. The first linear regulator module includes a first transformer unit used for transforming the first power signal into the second power signal, and a first switch control unit used for controlling the first transformer unit. When the first switch module is activated, the first switch control unit is connected to a ground and controls the first transformer unit to stop outputting the second power signal.

Abstract: The present disclosure describes techniques and apparatuses for switching between processor cache and random-access memory. In some aspects, the techniques and apparatuses are able to reduce die size of application-specific components by forgoing dedicated random-access memory (RAM). Instead of using dedicated RAM, a memory having a cache configuration is reconfigured to a RAM configuration during operations of the application-specific component and then, when the operations are complete, the memory is configured back to the cache configuration. Because many application-specific components already include memory having the cache configuration, reconfiguring this memory rather than including a dedicated RAM reduces die size for the application component.

Abstract: A first arrangement including an interface configured to receive transactions with an address from a second arrangement having a first memory space; a translator configured to translate an address of a first type of received transaction to a second memory space of the first arrangement, the second memory space being different to the first memory space; and boot logic configured to map a boot transaction of the received transactions to a boot region in the second memory space.

Abstract: Disclosed embodiments relate to communicating operating system booting information. A machine-readable storage medium may include instructions for reading data related to booting of an operating system of an electronic device from a non-volatile storage, instructions for writing the read data to a volatile storage prior to the booting of an operating system on the electronic device, and instructions for communicating the data written to the volatile storage to the electronic device via a serial communication interface. The machine-readable storage medium may further include instructions for receiving data, from the electronic device via the serial communication interface, related to the booting of the operating system of the electronic device and instructions for writing the received data to the non-volatile storage.

Abstract: A computing device boot-up method begins by a processing module detecting a boot-up of the computing device. The method continues with the processing module addressing a distributed basic input/output system (BIOS) memory to retrieve a plurality of error coded BIOS data slices. The method continues with the processing module reconstructing BIOS data from the plurality of error coded BIOS data slices using an error coding dispersal function. The method continues with the computing device booting up in accordance with the BIOS data.

Abstract: A first network signal is received indicating a device identifier in response to a transaction involving an electronic device uniquely associated with the device identifier. An entity identifier specific to an entity associated with the transaction is determined. In response to an initialization event of the electronic device, a second network signal from the electronic device is received that identifies the electronic device. In response to the second network signal, a configuration is communicated to the electronic device that is specific to the entity associated with the transaction.

Abstract: A multi-mode data card includes at least two mode modules, and also includes an external interface module and an interface control module. The external interface module connects to the interface control module. The external interface is configured to connect with computer for data interaction; the interface control module is equipped with at least two channels, and said at least two channels connects to said at least two mode modules respectively. The interface control module is configured to: when the multi-mode data card is calibrated, connect the external interface module with the channel corresponding to the mode module to be calibrated, and switch the multi-mode data card to the mode to be calibrated. A method for calibrating multi-mode data card is also provided in the present invention.

Abstract: A method for allowing portions of programs to be executed on a System z Integrated Information Processor (zIIP). A service call is inserted at the beginning of the zIIP eligible code to enable enclave Service Request Block (SRB)-mode execution on the zIIP processor. An additional service call is inserted at the end of the zIIP eligible code to disable the enclave SRB-mode execution. A module in the operating system, referred to herein as the “zIIP shifter module,” is configured to detect these service calls thereby implementing and terminating the SRB-mode execution so that the zIIP processor executes the zIIP eligible code for the appropriate duration of time. In this manner, only a portion of the programs that contain eligible zIIP executable code is executed on the zIIP processor without requiring the programs to be entirely restructured thereby reducing development cost and improving software development productivity.

Abstract: An information processing device has a storage unit configured to store correlation information in which a control rule for an operating frequency of a central processing unit of the information processing device is correlated with a combination of a state change of a first element of the information processing device, and a state of a second element of the information processing device which is different from the first element, a detecting unit configured to detect the state change of the first element, a determining unit configured to determine the state of the second element in the event that state change of the first element has been detected by the detecting unit, a searching unit configured to search for, a control rule corresponding to a combination of the state change and the state, and a control unit configured to control the operating frequency of the central processing unit.

Abstract: A server apparatus includes: an output detector for detecting output-processing which is processing of outputting data from the application program into a shared area; and an output control section for storing instruction information in the shared area, instead of storing the output data outputted from the application program therein, in response to the detection of the output-processing, the instruction information specifying an acquisition method by which an authorized client apparatus acquires the output data. The client apparatus includes: a reading detection section for detecting reading-processing which is processing of reading data from the shared area; and a reading control section which reads the instruction information from the shared area in response to the detection of the reading-processing, and which acquires the output data by the acquisition method specified by the instruction information.

Abstract: An interactive information dissemination system includes a media server (210) for receiving a plurality of media elements and storing the media elements in a database. A sender client (200) enables a first user to identify message data, a recipient identifier, and a media element from the database of media elements. A recipient client (202) presents the media element to a second user associated with the recipient identifier. The recipient client (202) further presents the message data to the second user when the second user performs a predetermined action, such as submitting authentication information or requesting the message data, to receive the message data. The message data may be secured by requiring sender and recipient authentication, and by encoding the data using a private encoding key and data package identifier managed by a main server (206) and a key server (208).

Abstract: A proxy server in a cloud-based proxy service receives a secure session request from a client device for a secure session. The secure session request is received at the proxy server as a result of a Domain Name System (DNS) request for a domain resolving to the proxy server. The proxy server participates in a secure session negotiation with the client device including transmitting a digital certificate to the client device that is bound to domain and multiple other domains. The proxy server receives an encrypted request from the client device for an action to be performed on a resource that is hosted at an origin server corresponding to the domain. The proxy server decrypts the request and participates in a secure session negotiation with the origin server including receiving a digital certificate from the origin server. The proxy server encrypts the decrypted request using the digital certificate from the origin server and transmits the encrypted request to the origin server.

Abstract: A method and a system for secure transfer of an application from a server (S) into a reading device unit (2) with authentication of a user with a data carrier unit (1), the server (S) making available the application, wherein, between the data carrier unit (1) and the server (S), a first cryptographically secured channel (K1) is set up based on first cryptographic information (A), and between a security module (3) of the reading device unit (2) and the server (S) a second cryptographically secured channel (K2) is set up based on second cryptographic information (B). The application is transferred from the server to the reading device unit via the second cryptographically secured channel (K2).

Abstract: A method includes identifying a suspect node of a network that includes multiple nodes in wireless communication. The method also includes initiating formation of a sub-network of the network in response to identifying the suspect node. The suspect node is not a member of the sub-network. After formation of the sub-network, first communications between the suspect node and a device of the network are routed to or through at least one of the members of the sub-network. The sub-network is configured to enable second communications between members of the sub-network, where the second communications are communicated in a manner that is secured against access by the suspect node.

Abstract: Modular authentication and session management involves the use of discrete modules to perform specific tasks in a networked computing environment. There may be a separate authentication server that verifies the identity of the user and an authorization client that grants various levels of access to users. There may also be an authentication client that receives an initial request from a requesting application and forwards the request to the authentication server to verify the identity of the use. The authorization client may then be invoked to provide the necessary level of access. The use of discrete modules allows multiple business applications to use the same modules to perform user authentication tasks, thus alleviating the unnecessary multiplication of code.

Abstract: A process control system is disclosed which can include a plurality of spatially distributed, internetworked network subscribers with secure communication between the network subscribers via a communication network. Communication integrity can be based on an interchange of certificates. In order to protect the communication integrity, the process control system can include a central certification point which is an integral part of the process control system and allocates and distributes certificates.

Abstract: A method of requesting and issuing a certificate from certification authority for use by an initiating correspondent with a registration authority is provided. The initiating correspondent makes a request for a certificate to the registration authority, and the registration authority sends the request to a certificate authority, which issues the certificate to the registration authority. The certificate is stored at a location in a directory and this location is associated with a pointer such as uniform resource locator (URL) that is derived from information contained in the certificate request. The initiating correspondent computes the location using the same information and forwards it to other corespondents. The other correspondents can then locate the certificate to authenticate the public key of the initiating correspondent.

Abstract: In a certification request, a user device includes an object identifier. When a certification authority generates an identity certificate responsive to receiving the certification request, the certification authority includes the object identifier, thereby allowing improved management of the identity certificate at the user device and elsewhere.

Abstract: A server computing system initiates a first sub-system to generate a certificate revocation list (CRL) using resources that are separate from resources of a second sub-system that performs certificate authority (CA) management functions other than generating a CRL. The first sub-system receives a command from the second sub-system to update revocation data in a cache that is coupled to the first sub-system and generates a CRL using the updated revocation data in the cache. The first sub-system provides the CRL to the second sub-system.

Abstract: A data processing system, a server such as a federated server, a computer system, and like devices, and associated operating methods can be configured to support fine-grained security including resource allocation and resource scheduling. A data processing system can comprise a federated server operable to access data distributed among a plurality of remote data sources upon request from a plurality of client users and applications; and logic executable on the federated server. The logic can be operable to enforce fine-grained security operations on a plurality of federated shared data sets distributed among the plurality of remote data sources.