Abstract: An apparatus and program product in which test components—here denominated entities—are handled by a test framework and wrapped in a common API (application programming interface) which provides command execution, file handling and inter-communication. The entities are interchangeable parameters to the test, hiding platform-specific code from the test developer and promoting code re-use. Retargettability is enabled by allowing specific systems—physical machines, for example—to be specified on a per test run basis, without changing generic test code.

Abstract: Test components—here denominated entities—are handled by a test framework and wrapped in a common API (application programming interface) which provides command execution, file handling and inter-communication. The entities are interchangeable parameters to the test, hiding platform-specific code from the test developer and promoting code re-use. Retargettability is enabled by allowing specific systems—physical machines, for example—to be specified on a per test run basis, without changing generic test code.

Abstract: A method for testing a program stored in the memory of an electric tool, from a plurality of modules, comprises the following steps: testing the program using at least one predefined safety test while the program is being executed, and testing at least one module from the plurality of modules using at least one predefined module test while the program is being executed.

Abstract: A system and method for improving the yield rate of a multiprocessor semiconductor chip that includes primary processor cores and one or more redundant processor cores. A first tester conducts a first test on one or more processor cores, and encodes results of the first test in an on-chip non-volatile memory. A second tester conducts a second test on the processor cores, and encodes results of the second test in an external non-volatile storage device. An override bit of a multiplexer is set if a processor core fails the second test. In response to the override bit, the multiplexer selects a physical-to-logical mapping of processor IDs according to one of: the encoded results in the memory device or the encoded results in the external storage device. On-chip logic configures the processor cores according to the selected physical-to-logical mapping.

Abstract: Mechanisms, in a processor chip, are provided for obtaining debug data from on-chip logic of the processor chip while the processor chip is in a secure mode of operation. The processor chip is placed into a secure mode of operation in which access to internal logic of the processor chip to control the internal logic of the processor chip, by mechanisms external to the processor chip, is disabled on a debug interface of the processor chip. A triggering condition of the processor chip is detected that is a trigger for initiated debug data collection from the on-chip logic. Debug data collection is performed from the on-chip logic to generate debug data. Data is output, by the processor chip to an external mechanism, on the debug interface based on the debug data.

Abstract: Mechanisms, in a processor chip, are provided for obtaining debug data from on-chip logic of the processor chip while the processor chip is in a secure mode of operation. The processor chip is placed into a secure mode of operation in which access to internal logic of the processor chip to control the internal logic of the processor chip, by mechanisms external to the processor chip, is disabled on a debug interface of the processor chip. A triggering condition of the processor chip is detected that is a trigger for initiated debug data collection from the on-chip logic. Debug data collection is performed from the on-chip logic to generate debug data. Data is output, by the processor chip to an external mechanism, on the debug interface based on the debug data.

Abstract: A computing device for use with a power system is provided. The computing device includes a processor that is programmed to organize data representative of at least one fault within the power system and to generate a graphical representation of the organized data. The computing device also includes a presentation interface that is coupled to the processor for presenting the graphical representation to a user to enable the user to identify the fault. Moreover, a user interface is coupled to the presentation interface and configured to enable the user to select at least one data point on the graphical representation such that the user is enabled to identify at least one variable of the fault.

Abstract: A tool for detecting potential impairment in an electronic device. The tool classifies the user input into various categories and determines some measurement, typically a rate of input per user or per time, for determining average use statistics of the electronic device. The tool then determines if a calculated measurement based on user inputs deviates from the average use statistics past some threshold level of deviation. In response to surpassing the threshold level of deviation, the tool identifies the electronic device as potentially impaired.

Abstract: Metrics associated with computer code files within a codebase may be analyzed to identify bug-prone files. Functions of the method or system may determine metrics corresponding to each file of a plurality of codebase files within an application codebase. The functions may also store the metrics corresponding to each codebase file in a record of a database table, rank order the plurality of codebase files according to at least one metric, and flag each codebase file having a ranking over a threshold value of the metric. The codebase file metrics may describe fault-inducing characteristics of the plurality of codebase files and include both a total number of previous faults and a total number of changes that are associated with each codebase file.

Abstract: Processes, computer-readable media, and machines are disclosed for reducing a likelihood that active functional components fail in a computing system. An active monitoring component receives metrics associated with different active functional components of a computing system. The different active functional components contribute to different functionalities of the system. Based at least in part on the metrics associated with a particular active functional component, the active monitoring component determines that the particular active functional component has reached a likelihood of failure but has not failed. In response to determining that the particular active functional component has reached the likelihood of failure but has not failed, the active monitoring component causes a set of actions that are predicted to reduce the likelihood of failure.

Abstract: This disclosure describes methods, systems and software that can be used to calculate the estimated mean time to data loss for a particular configuration of a disk group. For example, a system can be used to evaluate a plurality of configurations, and/or to select (and/or allow a user to select) an optimal configuration of the disk group, based, in some cases, on the relative estimated mean times to data loss of the various configurations. This can allow, if desired, the configuration of the disk group to minimize the likelihood of data loss in the disk group.

Abstract: To make it possible to easily identify the error location, a communication apparatus includes: a first storage unit; an error detecting unit detecting a bus error caused on a bus of its own PLC; an error counting unit counting the number of times the error detecting unit has detected a bus error and recording a counted value of the bus error in the first storage unit; a transmitting unit transmitting a counted value recorded in the first storage unit and counted by the error counting unit to all of other PLCs belonging to the same PLC system; and a receiving unit receiving a counted value transmitted from the other PLCs belonging to the same PLC system and storing the received counted value in the first storage unit in such a way that a PLC that is a transmission source of the counted value can be identified.

Abstract: In a controller of a tape drive, when an error recovery section cannot recover an error detected by an error detecting section, an error-report generation section generates an error report, an error-information acquisition section acquires error information of the tape drive and a cartridge loaded in the tape drive, an error-information exchange section acquires pieces of error information of other tape drives and cartridges loaded in these other tape drives, an error-factor judging section judges whether the error is attributable to the tape drive or the cartridge based on these pieces of error information, an error-report update section updates the error report in accordance with the result of this judgment, and an error-report output section outputs the error report thus updated to a host.

Abstract: A computer-implemented method, computer-readable media, and a computerized system to track and detect data hazards are provided. The computerized system includes processors configured to execute instructions associated with a multithreaded program. The computerized system allocates memory for the multithreaded program and creates threads for execution on the processors. The memory may include a reserved area for tracking information. The threads access the allocated memory in accordance with the multithreaded program and the memory including the tracking information is updated based on the threads' memory access. In turn, the processors generate notifications of data hazard based on the tracking information stored in the allocated memory.

Abstract: The recovery of data during programming, such as in the case of a broken word-line, is considered. The arrangement described assumes that k pages may be corrupted when the system finishes programming a block. Then these corrupted pages can be recovered using an erasure code. In order to recover any k pages, the system will compute and temporarily store k parity pages in the controller. These k parity pages may be computed on-the-fly as the data pages are received from the host. Once programming of the block is finished, a post-write read may be done in order to validate that the data is stored reliably. If no problem is detected during EPWR, then the parity pages in the controller may be discarded. In case a problem is detected, and data in up to k pages is corrupt on some bad word-lines, then the missing data is recovered using the k parity pages that are stored in the controller and using the other non-corrupted pages that are read from the block of the memory array and decoded.

Abstract: A post-write read operation, using a combined verification of multiple pages of data, is presented. In a simultaneous verification of multiple pages in a block, the controller evaluates a combined function of the multiple pages, instead of evaluating each page separately. In one exemplary embodiment, the combined function is formed by XORing the pages together. Such a combined verification of multiple pages based on the read data can significantly reduce the controller involvement, lowering the required bus and ECC bandwidth for a post-write read and hence allow efficient post-write reads when the number of dies is large.

Abstract: Techniques for a post-write read are presented. In an exemplary embodiment, host data is initially written into the non-volatile memory in binary form, such as a non-volatile binary cache. It is then subsequently written from the binary section into a multi-state non-volatile section of the memory. After being written in multi-state format, pages of data from a multi-state block can then be checked against there source pages in the binary section to verify the quality of the multi-state write. This process can be performed on the memory device itself, without transferring the pages out to the controller.

Abstract: A memory circuit including a logic circuit, content addressable memory, and a multiplexer. The logic circuit is configured to output a first address. The content addressable memory is configured to i) receive the first address and ii) output a substitute address and a match signal if the first address matches a second address stored in the content addressable memory. The multiplexer is configured to i) receive the first address and the substitute address and ii) selectively output one of the first address and the substitute address based on the match signal.

Abstract: A system and method for scan partitioning for testing an embedded logic circuit in an integrated circuit (IC) device is provided. One or more scan partitions in the embedded logic circuit are identified. Each scan partition includes one or more scan chains of scan registers. One or more interacting registers connecting scan registers of a first scan partition and scan registers of a second scan partition are identified and combined to form an interacting scan chain. The embedded logic circuit is tested by selectively activating the scan chains of the first and second scan partitions and the interacting scan chain.

Abstract: A scan test circuit includes: a functional path, including: a D-type latch, for receiving an input and generating an output, the D-type latch including a feedback node; and a test path, including: a scan latch, for receiving a test input and generating an output. The scan test circuit also includes a tri-state inverter. The output of the test path is input to the feedback node of the D-type latch and also input to the tri-state inverter. The functional path is clocked by pulses generated by a pulse generator according to a system clock. The test path is clocked by a test clock generated according to a test enable signal and the system clock. When the test enable signal is enabled, the generation of the pulses is disabled.

Abstract: An address and command port interface selectively enables JTAG TAP domain operations and Trace domain operations within an IC. The port carries TMS and TDI input and TDO output on a single pin and receives a clock signal on a separate pin. The addressable two pin interface loads and updates instructions and data to the TAP domain within the IC. The instruction or data update operations in multiple ICs occur simultaneously. A process transmits data from an addressed target device to a controller using data frames, each data frame comprising a header bit and data bits. The logic level of the header bit is used to start, continue, and stop the data transmission to the controller. A data and clock signal interface between a controller and multiple target devices provides for each target device to be individually addressed and commanded to perform a JTAG or Trace operation.

Abstract: A semiconductor integrated circuit according to an aspect of the invention includes scan flip-flops and a scan control unit. The scan flip-flop outputs backup data that is held as an internal state under control of the scan control unit, and the scan flip-flop holds backup data output from the scan flip-flop in the scan flip-flop under control of the scan control unit.

Abstract: Multiple data permutation operations in respective different dimensions are used to provide an overall effective data permutation using smaller blocks of data in each permutation than would be used in directly implementing the overall permutation in a single permutation operation. Data that has been permuted in one permutation operation is block interleaved, and the interleaved data is then permuted in a subsequent permutation operation. A matrix transpose is one example of block interleaving that could be applied between permutation operations.

Abstract: The subject technology provides a decoding solution that supports multiple choices of code rates. A decoder may be configured to receive a selected code rate from a plurality of code rates. On the selection of the code rate, the decoder may determine a circulant size based on the code rate, and, on receiving the codeword, update, during one or more parity-check operations, a number of confidence values proportional to the circulant size in each of a plurality of memory units, each number of confidence values corresponding to a portion of the codeword.

Abstract: A semiconductor memory apparatus includes: a memory cell area including a plurality of memory cell arrays stacked therein, each memory cell array having a plurality of memory cells integrated and formed therein to store data and a plurality of through-lines formed therein to transmit signals; and a control logic area configured to generate parity bits using a data signal inputted to the memory cell area and transmit the generated parity bits and the data signal to different through-lines.

Abstract: A method for encoding data bits includes computing checksum parity bits based on the data bits. A set of equations satisfied by the data bits and the checksum parity bits corresponds to a dense parity-check matrix. The dense parity-check matrix comprises sums of permutation sub-matrices.

Abstract: A system and method for efficiently communicating uncompressed video and for efficiently communicating corresponding acknowledgements in a system for wireless communication of uncompressed video are disclosed. In one embodiment, the method includes aggregating multiple subpackets of different types of data into a composite packet. The different types of data may include video, audio, control data, extraneous data files, and others. A robust composite packet configuration can provide for more flexible and more efficient transmission of data on the high rate channel as well as more efficient transmission of acknowledgements on the low rate channel.

Abstract: The present invention is related to multi-dimensional error definition, error measurement, error analysis, error function generation, error information optimization, and error correction for communication systems. Novel techniques are provided that can be applied to a myriad of applications for which an input to output transfer characteristic must be corrected or linearized. According to embodiments of the present invention, error can be described, processed, and geometrically interpreted. Compact formulations of error correction and calibration functions can be generated according to the present invention, which reduce memory requirements as well as computational time.

Abstract: A method of operating a memory controller includes reading data from a first block of a memory device; detecting degraded pages from a plurality of pages of the first block and counting a number of the degraded pages in the first block; and recharging or reclaiming the first block, which includes the degraded pages, based on the counted number of the degraded pages.

Abstract: A sequence of data packets is received within an integrated circuit device and stored within a first memory thereof Error descriptor values are updated within a second memory of the integrated circuit device based on error information associated with the sequence of data packets. The error descriptor values each include an address field to specify a corresponding storage region of the first memory and an error field to specify an error status of data values stored within the storage region. A sequence of multiple-bit error values are generated based, at least in part, on the error fields and address fields within respective subsets of the error descriptor values. Concurrently with generation of at least one of the multiple-bit error values the state of one or more bits of the data values stored in the first memory based are changed based on a previously-generated one of the multiple-bit error values.

Abstract: Techniques are described that can be used to extend the data transmission rate specified by 10GBASE-KR of IEEE 802.3ap (2007) to more than 10 Gb/s using a multiple lane backplane. A signal for transmission over 10 Gb/s can be divided into multiple streams for transmission over multiple lanes. Multiple transceiver pairs can be used for transmission and receipt of the multiple streams. Each transceiver pair may comply with 10GBASE-KR of IEEE 802.3ap (2007).

Abstract: A coding device includes: an inspection matrix generating module that generates a block inspection matrix; and a coding module that generates and outputs a code word from an input message by the inspection matrix. The inspection matrix generating module includes: a degree-allocation unit that prescribes function values of the block inspection matrix by the coefficients of a self-reciprocal polynomial expression; a weight distribution determination unit that prescribes the number of components that are non-zero matrices among the components of each block of the block inspection matrix using a mask pattern; a first degree-altering unit that considers the sum of the components of the k_r-th row block of the block inspection matrix as a cyclic permutation matrix; and a second degree-altering unit that prescribes the row-block number of components that are non-zero matrices among the components of each row block excluding said k_r-th row block of the clock inspection matrix.

Abstract: A termination indication is computed during an iteration of an iterative decoding of a representation of a codeword according to a schedule. The termination indication is tested to see if the decoding has converged or is not likely to converge. The testing of the termination indication shows convergence or lack of likelihood thereof even if a codeword bit estimate was flipped during an immediately preceding traversal of the schedule. Preferably, the termination indication includes an error correction syndrome weight, a zero value whereof indicates convergence, and the computing of the termination indication includes, in response to the flipping of a codeword bit estimate, flipping the error correction syndrome bits that are influenced by that codeword bit estimate.

Abstract: A transmitter generates an encrypted data by processing a specific data according to a specific transmission mode, generates a verification code according to the specific transmission mode, and provides a protocol data unit according to the encrypted data and the verification code. After transmission, a receiver decodes the protocol data unit and determines whether the decrypted data of the protocol data unit matches the verification code, thereby providing error detection for wireless transmission.

Abstract: An annotation system includes first annotation data for annotating a manifestation of a first instance of a first XML document. The first instance of the first XML document is served by a document system. The first annotation data includes a first XML document identifier for the first XML document. The first annotation data is uniquely identified by a first annotation data identifier. The document system is configured to respond to a request containing the first XML document identifier with a manifestation of a second instance of the first XML document. The annotation system: (A) receives a request containing the first annotation data identifier; (B) issues a request containing the first XML document identifier to the document system; and (C) in response to the request containing the first annotation data identifier, manifests the first annotation data in connection with a manifestation of a second instance of the XML document.

Abstract: Systems and methods are provided the for presentation of links to content to a user on webpages of a website where titles associated with the links are tuned to the user's psychographic variables. In one embodiment, a respective plurality of titles is generated for each of a plurality of content items. At least some titles are tagged with psychographic tags. When a user accesses content by selecting a link having a title that is tagged with one or more psychographic tags, the system stores a representation of such tags in association with the user. When additional links for recommended content are displayed to the user, the system selects titles for links to such content based on psychographic tags associated with the user and the titles.

Abstract: A website and method are disclosed for helping a recommender to provide confidential recommendations for individuals. The system enables the recommender to efficiently comply with multiple requests for confidential recommendations, and to efficiently comply with a single request for a confidential recommendation to be sent to multiple institutions. The system eliminates the need to write multiple confidential recommendations when the individual applies to multiple institutions by enabling the recommender to distribute multiple links to the same confidential recommendation. The system also enables the recommender to easily edit the recommendation before or after multiple links have been distributed, thereby ensuring that the recommender retains control over the content of the confidential recommendation. The control over the recommendation link also includes a capability for changing the link expiration date, temporarily suspending or re-activating a link, and deleting a link.

Abstract: Certain examples provide a computer-implemented method. The method includes displaying, at an initial position, a first entry of a plurality of entries of a table. The method includes displaying a first indicator to indicate that the first entry has been assigned from a set of unlocked entries to a set of locked entries, and that the first entry is assigned to a first lock position. The method includes sorting the plurality of entries to determine a first sort order including a first sort position of the first entry that is different from the first lock position. The method includes displaying the set of unlocked entries according to the first sort order and displaying the first entry at the first lock position.

Abstract: A first instance of a first XML document is served by a document server component of a document system. An annotation system that is functionally independent of the document system semantically analyzes content and structure of the first instance of the first XML document to identify a first instance of a first target for first annotation content, wherein the first target is not text. The annotation system also generates target locating data for locating a second instance of the first target in a second instance of the first XML document. The annotation system stores the target locating data.

Abstract: An annotation system receives a request from a requester to perform an operation on first annotation data for annotating a first instance of a first XML document. The operation is at least one of a create, read, update, and delete operation. The first instance of the first XML document is served by a document server component of a document system. The document system is functionally independent of the annotation system. The request explicitly addresses the first annotation data by means of an application programming interface in the annotation system. The annotation system performs the operation on the first annotation data in response to the request.

Abstract: An annotation system includes first annotation data for annotating a manifestation of a first instance of a first XML document. The first instance of the first XML document is served by a document system. The first annotation data includes a first XML document identifier for the first XML document. The first annotation data is uniquely identified by a first annotation data identifier. The document system is configured to respond to a request containing the first XML document identifier with a manifestation of a second instance of the first XML document. The annotation system: (A) receives a request containing the first annotation data identifier; (B) issues a request containing the first XML document identifier to the document system; and (C) in response to the request containing the first annotation data identifier, manifests the first annotation data in connection with a manifestation of a second instance of the XML document.

Abstract: An operation of a user on a document is received. The received operation is analyzed. A structured guiding view for the document is generated by using a result of the analyzing and a basic structure of the document. In certain implementations, a user's reading interests and reading habits may be analyzed through the user's reading behaviors or notations added to the document by the user, and the result of the analyzing may be mapped into an intuitively presentable structured guiding view for the document.

Abstract: An annotation system receives a first annotation input representing first annotation content for temporally annotating a first instance of a first target in a first instance of a first XML document. The first instance of the first XML document is served by a document server component of a document system. The annotation system is functionally independent of the document system. The annotation system temporally annotates the first instance of the first target with the first annotation content. The annotation subsequently manifests the first annotation content in connection with a manifestation of a second instance of the first target in a manifestation of a second instance of the first XML document served by the document server.

Abstract: First indicators may be obtained, each first indicator associated with a respective first web page document. A classification type of each first web page document may be determined, based on the respective first indicators and a respective first content of each first web page document. A set of candidate documents that are included in the first web page documents may be selected, based on the determined classification type. For each one of the candidate documents, a group of first attention geography items and a group of first content geography items associated with the each one of the candidate documents may be determined. A determination may be made whether each of the candidate documents includes a first hyperlocal content page document, based on the group of first attention geography items and the group of first content geography items that are associated with the candidate documents.

Abstract: Methods and devices include a server and at least two web browsers operable on at least two different computing devices. Each browser reports results of processing and rendering of webpages to the server. The server aggregates the data. The server generates metadata from the aggregated browsers. The server transmits the generated metadata to at least one computing device. The computing device renders a webpage using at least a portion of the provided metadata. The metadata may identify portions of JavaScript that can be processed in parallel. The metadata may identify a library portion that does not have to be loaded. The metadata may identify a portion of the webpage that may be rendered first before a second portion of the webpage. Returning metadata to the computing device can assist the computing device in parsing, analyzing or executing the request for the webpage.

Abstract: A method for generating a page of an electronic document (ED), including: obtaining a common input/output (I/O) format of the ED, where the common I/O format comprises the properties, the objects, and fields corresponding to the objects; populating, during a first layout by a layout engine and based on the properties, the fields in the common I/O format of the ED with coordinates; and generating, from the common I/O format of the ED, the page by placing the objects on the page according to the coordinates.

Abstract: An exemplary embodiment of the present may generate a DOM-tree and generate a signal based on the DOM-tree and a node list. The signal may be analyzed and nodes may be selected within the signal to form a periodic wave. Repeat patterns may be detected using the periodic wave and the nodes.

Abstract: A web application architecture can use a wrapper application to provide a virtual machine environment within a web browser and web applications can run on the wrapper application. The wrapper application can provide life cycle management for the web applications and provide other functions such as log in and log out for all of the web applications in the environment.

Abstract: The present invention generally comprises a computer control environment that builds on the Blackspace™ software system to provide further functionality and flexibility in directing a computer. It employs graphic inputs drawn by a user and known as gestures to replace and supplant the pop-up and pull-down menus known in the prior art.

Abstract: A system and method provide an image data file encoding said image in accordance with a standard image format and a page of content in a markup language, said page of content being intended for transmission over a telecommunications network from a server to a client for display by a browser running on the client, said page of content including a link or reference to the image data file for incorporating the image within the page of content. The image is converted from said standard image format into a format in which the image is encoded using said markup language, and the image encoded using said markup language is incorporated into the page of content to replace said link or reference to the image data file prior to transmission of the page of content.