Abstract: An integrated circuit device comprising at least one calibration module for calibrating an impedance of at least one on-die interconnect line driver in order to adaptively match an impedance between the at least one on-die interconnect line driver and at least one on-die interconnect line conjugated thereto. The at least one calibration module is arranged to receive an indication of an output signal of the at least one line driver, compare the received indication of an output signal to a reference signal and detect a presence or an absence of a voltage overshoot of the output signal of the at least one line driver, and upon detection of a presence or an absence of a voltage overshoot of the output signal of the at least one line driver, cause the adjustment of power supply of the at least one line driver, to be decreased or increased correspondingly.

Abstract: A regulating circuit is used with a buffer circuit. The buffer circuit at least includes a metal-oxide-semiconductor transistor and a voltage output terminal. The voltage output terminal is connected to a drain terminal of the metal-oxide-semiconductor transistor of the buffer circuit. The regulating circuit includes a first metal-oxide-semiconductor transistor and a second metal-oxide-semiconductor transistor. The first metal-oxide-semiconductor transistor has a source terminal and a drain terminal connected to a voltage source and a connecting node, respectively. The connecting node is electrically connected to a substrate of the metal-oxide-semiconductor transistor of the buffer circuit. The second metal-oxide-semiconductor transistor has a drain terminal and a source terminal connected to the connecting node and the voltage output terminal, respectively. A substrate of the second metal-oxide-semiconductor transistor is electrically connected to the connecting node.

Abstract: A circuit includes a power switch and a level shifter. The level shifter has a node and an assistant circuit. The node is configured to control the power switch. The assistant circuitry is coupled to the node and configured for the node to receive a first voltage value through the assistant circuit. The first voltage value is different from a second voltage value of an input signal received by the level shifter.

Abstract: A frequency tunable signal source (100) with first (105) and a second (115, 315) oscillators, each of which outputs a signal at a fundamental frequency (f1, f2) and at least one signal at a harmonic frequency (f1?, f2?) and a mixer (120) with first (121) and second (122) input ports and an output port (124), and a control unit (110) which controls switches (S1, S2, S3, S4), by means of which two of said signals (f1, f2, f1?, f2?) are switchably connected to the first input port. The other two signals are switchably to the other input port, with one switch (S1, S2, S3, S4) for each signal (f1, f2, f1?, f2?). There is also comprised a third oscillator (125), with an output signal connected to a third input port (123) of the mixer (120). At least one of the oscillators (105, 115, 315, 125) is a VCO, a Voltage Controlled Oscillator.

Abstract: A chip includes a pool of blocks. Each block is adapted to implement a communication protocol. A cross-connect configurably connects between the blocks. A configured connection through the cross-connect between a sending block and a receiving block includes a lane with a toggle line and multiple data lines. The receiving block uses the toggle line to determine when valid data is on the data lines. The sending block and receiving block are on different clock domains.

Abstract: In one embodiment, an apparatus includes a touch sensor including drive electrodes. The apparatus also includes sense electrodes arranged along a first axis and a second axis. The first and second axes are substantially perpendicular to each other. The apparatus also includes one or more computer-readable non-transitory storage media coupled to the touch sensor that embody logic that drives all the drive electrodes substantially simultaneously with a common drive signal.

Abstract: A sensor panel comprises a flexible film of a thickness having a first surface and a second surface spaced apart from the first surface by the thickness of the film; an array of micro structures in the flexible film, each micro structure including a chamber formed into the flexible film from the first surface; and an array of sensors on the second surface for generating current induced by static electric charge.

Abstract: A method and circuit for implementing a chip to chip calibration in a chip stack, for example, with through silicon vias (TSV) stack, and a design structure on which the subject circuit resides are provided. A first chip and a second chip are included within a semiconductor chip stack. The semiconductor chip stack includes a vertical stack optionally provided with Though Silicon Via (TSV) stacking of the chips. At least one of the first chip and the second chip includes a calibration control circuit and a performance indicator circuit coupled to the calibration control circuit to train and calibrate at least one of the first chip and the second chip to provide enhanced performance and reliability for the semiconductor chip stack.

Abstract: Improvements in the efficiency of two charge pump designs are presented. As a charge pump switches between modes, capacitances are charged. Due to charge sharing between capacitances, inefficiencies are introduced. Techniques for reducing these inefficiencies are presented for two different charge pump designs are presented. For a clock voltage doubler type of pump, a four phase clock scheme is introduced to pre-charge the output nodes of the pump's legs. For a pump design where a set of capacitances are connected in series to supply the output during the charging phase, one or more pre-charging phases are introduced after the reset phase, but before the charging phase. In this pre-charge phase, the bottom plate of a capacitor is set to the high voltage level prior to being connected to the top plate of the preceding capacitor in the series.

Abstract: Body biasing circuit and methods are implemented in a variety of different instances. One such instance involves placing, a first well of a first body bias island and a second well of a second body bias island in a first bias mode by controlling switches of a body bias switch circuit. The biasing is one of a reverse body bias, a nominal body bias and a forward body bias. The second well is also biased according to one of a reverse body bias, a nominal body bias and a forward body bias. In response to the bias-mode input, the first well of the first body bias island and the second well of the second body bias island are each placed in a second bias mode by controlling switches of the body bias switch circuit. The bias of the first well and second well can be changed.

Abstract: An piezoelectric electromechanical transistor has first and second terminals formed in a semiconductor region, a gate and a piezoelectric region between the gate and the semiconductor region. The piezoelectric region may be configured to drive the semiconductor region to vibrate in response to a signal applied to the gate. The transistor may be configured to produce a signal at the first terminal at least partially based on vibration of the semiconductor region.

Abstract: A current mirror circuit is described. The current mirror circuit includes a first transistor and a second transistor. The gates of the first transistor and the second transistor are coupled at a bias voltage. The current mirror circuit also includes an auxiliary transistor that is biased into weak inversion by receiving the bias voltage at a gate of the auxiliary transistor after being reduced by an offset voltage. The sources of the first transistor, second transistor and auxiliary transistor are coupled together. A primary current from the drain of the second transistor is combined with an auxiliary current from the drain of the auxiliary transistor to produce an output current.

Abstract: A semiconductor device includes first and second resistors. The first resistor is formed in a first substrate region and coupled between a first node and an output node. The second resistor is formed in a second substrate region and coupled between the output node and a second node. The first substrate region is coupled to the first node which has a first voltage. The second node has a second voltage. The second substrate region is coupled to a voltage dividing node that is set in the first resistor.

Abstract: A differential transmission circuit comprises a sending unit that generates a pair of differential signals from an input signal, and sends the differential signals; a receiver that receives the differential signals sent by the sending unit; and a transmission path that transmits the differential signals from the sending unit to the receiver, wherein the sending unit has a selector that selects one of the input signal and a signal obtained by inverting a polarity of the input signal, and generates the differential signals from the signal selected by the selector.

Abstract: A detector circuit can be used for determining the reflection coefficients of HF signals in a signal path. The detector circuit includes a bidirectional hybrid coupler, logarithmic amplifiers connected to the hybrid couple, and a subtractor having an offset connection.

Abstract: An auto-zero amplifier is disclosed, having an amplifying circuit, a switch, and a difference signal generating circuit. The amplifying circuit receives a first input signal for generating a first output signal, and receives a second input signal for generating a second output signal. The switch is coupled between the amplifying circuit and a capacitor. The switch is conducted for charging or discharging the capacitor to a voltage with the first output signal, and the switch is not conducted for keeping the capacitor at the voltage. The difference signal generating circuit is coupled with the amplifying circuit and the capacitor for generating a difference signal of the first output signal and the second output signal, a multiple of the difference signal, a part of the difference signal, and/or a digital output value for the difference signal.

Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.

Abstract: Power amplifiers and methods of coating a protective film of alumina (Al2O3) on the power amplifiers are disclosed herein. The protective film is applied through an atomic layer deposition (ALD) process. The ALD process can deposit very thin layers of alumina on the surface of the power amplifier in a precisely controlled manner. Thus, the ALD process can form a uniform film that is substantially free of free of pin-holes and voids.

Abstract: Provided are apparatuses and methods for reducing nonlinear distortions in Class D amplifiers by dynamically changing first and second threshold voltages in a pulse width modulator. A Class D amplifier apparatus is disclosed, comprising a pulse width modulator whose operation relies on a first and second threshold value, and a threshold controller which varies the thresholds in response to internal signals in the amplifier. Further, a method of processing Class D amplifier internal signals is disclosed, comprising steps involving measuring internal signals in a Class D amplifier and varying threshold signals in response to those measurements within the amplifier.

Abstract: A method and apparatus for providing a power supply for an amplifier is provided. The power conversion is achieved using synchronous rectifiers in a regulated half bridge power supply, taking the sum of the positive and negative rails as feedback, in order facilitate energy transfer between positive and negative output rails. This minimizes the effects of off side charging and rail sag, as well as achieving good line regulation, while allowing use of very small, low value output capacitors.

Abstract: A photodetecting device 1 includes a photodiode PD and an integrating circuit 11. The integrating circuit 11 includes an amplifier circuit 20, a capacitive element C2, and a second switch SW2. The amplifier circuit 20 has a driving section including a PMOS transistor T1 and an NMOS transistor T2, the respective drain terminals thereof being connected to each other. A first switch SW1 comprising a PMOS transistor T10 is opened or closed according to the level of a first reset signal Reset1 input to the gate terminal. When the first reset signal Reset1 is at a low level, the first switch SW1 is closed to apply a power supply potential VDD to the gate terminal of the PMOS transistor T1, thereby turning off the PMOS transistor T1. Thus, an amplifier circuit, an integrating circuit and a photodetecting device capable of achieving both low power consumption and high speed can be realized.

Abstract: The present invention relates to an operational amplifier comprising an input-stage circuit, a floating current mirror circuit, and an output-stage circuit. The input-stage circuit receives an input signal and produces a control signal. The floating current mirror circuit is coupled to the input-stage circuit, and produces a mirror current according to the control signal. The output-stage circuit is coupled to the floating current mirror circuit, and produces a driving signal according to the mirror current. When the operational amplifier is operating in the static mode, the output-stage circuit further produces a static current according to the mirror current. Thereby, by using the floating current mirror circuit, the purpose of low power consumption can be achieved while driving to the high-voltage mode or to the low-voltage mode.

Abstract: A power amplifying circuit includes first and second operational amplifiers. The power amplifying circuit includes first to fourth feedback resistor. The power amplifying circuit includes a fully differential operational amplifier that is connected to the output terminal of the first operational amplifier at a non-inverting input terminal thereof, to the output terminal of the second operational amplifier at an inverting input terminal thereof, to a first signal output terminal at a non-inverting output terminal thereof, and to a second signal output terminal at an inverting output terminal thereof and maintains a constant differential gain. The power amplifying circuit includes a switching circuit. The power amplifying circuit includes first and second input resistors. The power amplifying circuit includes a midpoint potential controlling circuit that monitors a power supply voltage and controls the switching circuit.

Abstract: A Radio Frequency (RF) amplifier in a communication system and a method for controlling the RF amplifier are provided. The RF amplifier includes an input unit for receiving an RF signal, a cascode unit for amplifying the RF signal according to a gain of the RF amplifier and for outputting the amplified RF signal, a load unit connected to the cascode unit, and a gain controller for controlling the gain by converting an impedance in a baseband to an impedance viewed from an RF band, the gain controller being connected in parallel to the load unit.

Abstract: An oscillation device for reducing memory capacity includes a frequency difference detecting unit and a compensation value obtaining unit. When oscillation frequencies of the first and second oscillation circuits are respectively f1 and f2, and oscillation frequencies of the first and second oscillation circuits at a reference temperature are respectively f1r and f2r, the frequency difference detecting unit determines a difference corresponding value x corresponding to a difference value between a value corresponding to a difference between f1 and f1r, and a value corresponding to a difference between f2 and f2r. The compensation value obtaining unit obtains a frequency compensation value of f1 resulting from ambient temperature different from reference temperature based on the difference corresponding value x, and calculates the frequency compensation value of f1 by calculating nth-order polynomial for X being a value corresponding to x/k, where k is a divide coefficient specific to a device.

Abstract: An atomic oscillator includes an atom that generates interaction with first and second lights in accordance with an energy level of a three-level system; and a light source that emits the first light having a first plurality of lights of a first plurality of frequency components different from each other and the second light having a second plurality of lights of a second plurality of frequency components different from each other, wherein when the first and second lights are irradiated to the atom, an electromagnetically induced transparency phenomenon occurs in accordance with one of the first plurality of lights and one of the second plurality of lights.

Abstract: An oscillation circuit and associated method, wherein the oscillation circuit provides a pair of oscillation signals at two oscillation nodes, and includes a first capacitor, a switch circuit and a second capacitor serially coupled between the two oscillation nodes; the switch circuit conducts between the first capacitor and the second capacitor on an enable voltage higher than a power voltage of the oscillation circuit.

Abstract: A temperature-compensated crystal oscillator includes a crystal resonator; and an oscillator circuit for performing temperature compensation.

Abstract: A balun includes a first port connected with a port connection part, a second port connected with the port connection part at a point separated by ?0/4 from a connection point of the first port and the port connection part, and a third port connected with the port connection part at a point separated by ?0/2 from a connection point of the second port and the port connection part. A maximum width of the second port and the third port are larger than a width at a region connected with the port connection part and larger than a width at a distal end, respectively. And a maximum distance between the second port and the third port is larger than a distance between the connection points with the port connection part and larger than a distance between the distal ends.

Abstract: A method includes providing a source resonator including a first conductive loop in parallel with a first capacitive element and in series with a first adjustable element the source resonator having a source target impedance, providing a plurality of device resonators each including a conductive loop and having a device target impedance, connecting, for each of the plurality of device resonators, a resistor corresponding to the device target impedance in series with the conductive loop of each of the plurality of device resonators, connecting a network analyzer in series with the first conductive loop and adjusting at least one of the first capacitive element and the first adjustable element until a measured impedance of the source resonator is within a predetermined range of the source target impedance.

Abstract: A distributed differential coupler, including a first conductive line and two second conductive lines coupled to the first one, each second conductive line including two conductive sections electrically in series, their respective junctions points being intended to be grounded.

Abstract: A duplex filter includes a block of dielectric material with top, bottom, and side surfaces and first and second spaced-apart sets of through-holes. A pair of outside walls and a center wall extend outwardly from the top surface. A pattern of metallized areas is defined on the top surface of the block including first and second electrodes that extend on the pair of outside walls respectively and third and fourth electrode antennae that extend on the center wall. The block may be two separate blocks coupled together to form an interior layer of metallization separating the first and second sets of through-holes and the center wall separates respective transmit and receive portions of the pattern of metallized areas.

Abstract: An acoustic wave device includes: a substrate; a lower electrode formed on the substrate; at least two piezoelectric films formed on the lower electrode; an insulating film located between the at least two piezoelectric films; and an upper electrode formed on the at least two piezoelectric films, wherein an outer periphery of an uppermost piezoelectric film out of the at least two piezoelectric films in a region in which the lower electrode and the upper electrode face each other is positioned further in than an outer periphery of the upper electrode.

Abstract: A circuit module includes a duplexer and a circuit substrate. A first signal path connects a first external electrode to a second external electrode. A second signal path connects a third external electrode to a fourth external electrode. A third signal path connects a fifth external electrode to a sixth external electrode. A first ground path connects a seventh external electrode to an eighth external electrode. A second ground path is connected to a ninth external electrode and is capacitively coupled to the second signal path.

Abstract: A waveguide E-plane filter component comprising a first main part and a second main part which in turn comprise a corresponding first and second waveguide section part. The main parts are arranged to be mounted to each other, each waveguide section part comprising a bottom wall, corresponding side walls and an open side, where the open sides are arranged to face each other. The waveguide E-plane filter component further comprises at least one electrically conducting foil that is arranged to be placed between the main parts, said foil comprising a filter part that is arranged to run between the waveguide section parts, the filter part comprising apertures, in said foil.

Abstract: A bulk acoustic wave (BAW) resonator device includes an acoustic reflector formed over a substrate and a resonator stack formed over the acoustic reflector. The acoustic reflector includes multiple acoustic impedance layers. The resonator stack includes a first electrode formed over the acoustic reflector, a piezoelectric layer formed over the first electrode, and a second electrode formed over the piezoelectric layer. A bridge is formed within one of the acoustic reflector and the resonator stack.

Abstract: Techniques to develop negative impedance circuits that may operate to their power supply rails. The techniques may include generating currents in response to voltage signals presented at respective input terminals of a negative impedance circuit. The voltage signals may be differential signals. The generated currents may be driven through a common impedance within the negative impedance circuit. The currents flowing through the common impedance may be mirrored back to the input terminals of the negative impedance circuit. The negative impedance circuit may be controlled to operate about a common-mode voltage for the circuit.

Abstract: A thermally conductive stripline RF transmission cable has a flat inner conductor surrounded by a dielectric layer that is surrounded by an outer conductor. The dielectric layer may include a base polymer and a thermally conductive material to increase a thermal conductivity of the cable. A thermal conductivity of the dielectric layer may be increased between a midsection of the inner conductor and the outer conductor. A jacket may surround the outer conductor, the jacket including a base polymer and a thermally conductive material. Additional conductors may be applied within the dielectric layer and/or in the jacket, proximate the outer conductor.

Abstract: A stripline RF transmission cable has a flat inner conductor surrounded by a dielectric layer that is surrounded by an outer conductor. A jacket with an attachment feature surrounds the outer conductor. The attachment feature may be a fin aligned parallel or normal to the inner conductor. The attachment feature may be continuous or periodic along a longitudinal extent of the cable. The attachment feature may include male and female portions dimensioned to couple with one another, enabling adjacent cables to be attached to one another.

Abstract: A stripline RF transmission cable has a generally planar inner conductor surrounded by a dielectric layer that is surrounded by a corrugated outer conductor. The corrugations may be, for example, annular or helical. The outer conductor has a top section and a bottom section which transition to a pair of edge sections that interconnect the top section with the bottom section. The top section, bottom section and the inner conductor may be provided with generally equal widths. A spacing between the inner conductor and the dielectric layer may be reduced proximate a mid section of the inner conductor. The inner conductor may also be corrugated generally normal to a longitudinal extend of the inner conductor.

Abstract: A transmission line with a structure which is capable of forming a passive equalizer and an electrical apparatus using the same are illustrated. The transmission line has a substrate, a ground plane, a defect ground structure, a pair of transmission conducting lines, and at least one stub. The substrate has a plurality of surfaces. The ground plane is located on at least one of the surfaces. The defect ground structure is formed on the ground plane. The pair of transmission conducting lines is located on one of the surfaces, and stretching over the defect ground structure. The at least one stub is located above a plane of the defect ground structure, extending along with at least one side of two sides of the pair of the transmission conducting lines, and electrically coupled to the pair of the transmission conducting lines and the ground plane.

Abstract: Actuator device having an expansion unit, which includes a magnetic shape memory alloy material, and a spring unit which interacts therewith in a restoring manner, wherein at least one spring of the spring unit is assigned to the expansion unit, which is designed to perform an expansion movement along an expansion direction, in such a way that the spring can exert a restoring spring force counter to the expansion direction on the expansion unit, and wherein the spring is set up and/or predetermined in its spring characteristic curve properties in such a way that a spring force profile of the spring unit along a stroke range, determined by an expansion force profile of the expansion unit and a restoring spring force profile, of the expansion movement does not form a continuously rising curve, and/or the spring force profile, with respect to a continuously rising curve, extends and/or increases the stroke range.

Abstract: A reactor including an assembly of a coil, a magnetic core on which the coil is disposed, and a case that houses the assembly. The case includes an installation face, a side wall that is removably attached to the installation face and surrounds the periphery of the assembly, and a heat dissipation layer formed on the inner face of the installation face and interposed between the installation face and the installation-side face of the coil. The installation face consists of aluminum, the side wall consists of an insulating resin, and the heat dissipation layer consists of an adhesive with high thermal conductivity and excellent insulation. The installation face is separate from the side wall, making it easy to form the heat dissipation layer, and having excellent heat dissipation. The side wall consists of an insulating resin, thus reducing the gap between it and the coil.

Abstract: Provided is a laminated inductor having a magnetic body, a conductor part covered in a manner directly contacting the magnetic body, and external terminals provided on the outside of the magnetic body and conducting to the conductor part; wherein the magnetic body is a laminate constituted by layers containing soft magnetic alloy grains, and the soft magnetic alloy grain contacting the conductor part is flattened on the conductor part side.

Abstract: There are provided a coil component and a manufacturing method thereof which secure coupling force between a coil and a substrate. The coil component includes: a substrate unit including a first substrate layer, an insulating layer stacked on the first substrate, and a second substrate layer stacked on the insulating layer; and coil layers each interposed between the first substrate layer and the insulating layer and between the insulating layer and the second substrate layer.

Abstract: A communications structure comprises a first semiconductor substrate having a first coil, and a second semiconductor substrate having a second coil above the first semiconductor substrate. Inner edges of the first and second coils define a boundary of a volume that extends below the first coil and above the second coil. A ferromagnetic core is positioned at least partially within the boundary, such that a mutual inductance is provided between the first and second coils for wireless transmission of signals or power between the first and second coils.

Abstract: A laminated inductor having a laminate structure constituted by magnetic layers and internal conductive wire-forming layers, wherein the magnetic layer is formed by soft magnetic alloy grains, the internal conductive wire-forming layer has an internal conductive wire and a reverse pattern portion around it, and the reverse pattern portion is formed by soft magnetic alloy grains whose constituent elements are of the same types as those of, and whose average grain size is greater than that of, the soft magnetic alloy grains constituting the magnetic layer.

Abstract: Provided are a green compact from which a low-loss core can be formed, a method of manufacturing the green compact, and a core for a reactor using the green compact. Parts of outer circumferential surfaces of green compacts 41 and 42 are molded with an inner peripheral surface of a through hole 10hA of a die 10A, and the other parts are molded with an outer circumferential surface of a core rod 13A that is inserted and disposed in the through hole 10hA. A raw-material powder P, which is a coated soft magnetic powder, is fed into compacting spaces 31 and 32 and pressurized by using a lower punch 12 (first punch) and an upper punch 11 (second punch). Then, the green compacts 41 and 42 are removed from the compacting spaces 31 and 32 by moving the die 10A with respect to the green compacts 41 and 42 without moving the core rod 13A with respect to the green compacts 41 and 42.

Abstract: A first short-circuit layer and a second short-circuit layer are electrically connected to and integrally stacked onto only a first magnetoresistance effect element layer and a first resistance element layer, respectively, so as to achieve short-circuiting, and thereby adjusting electrical resistances of the first magnetoresistance effect element layer and the first resistance element layer.

Abstract: A method and system for reducing the temperature of a communication system are disclosed. The method and system comprise detecting a temperature of the communication system. The method and system further includes providing a signal based upon the detected temperature, and determining a desired idle time between transmit packets based upon the signal. Finally, the method and system includes sending the desired idle time between transmit packets to the communication system.