Patents Issued in March 12, 2013
  • Patent number: 8394634
    Abstract: Isolated polynucleotides and polypeptides and recombinant DNA constructs particularly useful for altering agronomic characteristics of plants under nitrogen limiting conditions, compositions (such as plants or seeds) comprising these recombinant DNA constructs, and methods utilizing these recombinant DNA constructs. The recombinant DNA construct comprises a polynucleotide operably linked to a promoter functional in a plant, wherein said polynucleotide encodes an LNT2 polypeptide.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: March 12, 2013
    Assignees: E. I. du Pont de Nemours and Company, Pioneer Hi-Bred International, Inc.
    Inventors: Milo Aukerman, Stephen M. Allen, Dale Loussaert, Stanley Luck, Hajime Sakai, Scott V. Tingey
  • Patent number: 8394635
    Abstract: A sample processing system 101 that may be automated and methods are disclosed where sample(s) 198 are arranged on a carrier element 197 and a process operation control system 171 automatically processes the sample(s) perhaps robotically according to an desired aggregation of event dictated by an input 173. Alteration of an initial aggregated event topology may be accepted while the system is processing an initial aggregation and varied-parameter robotic control simulation functionalities 606 may be accomplished to determine an enhanced sequence for processing. Suggested operator actions may be displayed that might further enhance the scheduling of the altered aggregated event topology together with an automatic operator need prompt 608 that may inform an operator of a need for a particular action in order to accomplish the desired tasks.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: March 12, 2013
    Assignee: DAKO Denmark A/S
    Inventors: Marc Key, Gordon Feingold, Rosanne Welcher
  • Patent number: 8394636
    Abstract: The objective of the present invention is to provide a remote control method which allows a technician, etc. in a support center to remote-control a clinical specimen processing device, and a remote control system, a status informing device and a control apparatus used for such a method. The remote control method of the present invention, which is a remote control method for remote-controlling the clinical specimen processing device that processes a clinical specimen, is designed so that an image of the clinical specimen processing device is picked up by an image pickup device, and the image picked up by the image pickup device is supplied to a control apparatus located at a remote place from the clinical specimen processing device through a communication network so that the picked-up image is displayed on the control apparatus.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: March 12, 2013
    Assignee: Sysmex Corporation
    Inventors: Mizuho Nishikiori, Tadayuki Yamaguchi, Hiroshi Murakami
  • Patent number: 8394637
    Abstract: The invention relates to a handheld analyzer for testing a sample, in particular of a biological fluid, for a medically significant component. It comprises a test unit, which detects the correct positioning of an analytical consumable means in a conveyance pathway. According to this invention, the test unit has both an electric switch component which mechanically senses the positioning of the analytical consumable means and an optical sensor unit which optically senses the positioning of the analytical consumable means on the conveyance pathway. The handheld analyzer is controlled as a function of a comparison of the signals of the electric switch component and the optical sensor unit. It is possible in this way to reduce malfunctions or operating errors associated therewith.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: March 12, 2013
    Assignee: Roche Diagnostics Operations, Inc.
    Inventors: Jochen Schulat, Gertrud Albrecht, Bernhard Kern
  • Patent number: 8394638
    Abstract: A system may include a means for administering a therapeutic agent to a subject; a means for administering a first pharmaceutically-acceptable taggant to the subject at least substantially concurrent with the therapeutic agent, the first pharmaceutically-acceptable taggant having a pharmacokinetic profile; and a means for administering a second pharmaceutically-acceptable taggant to the subject with the first pharmaceutically-acceptable taggant, the second pharmaceutically-acceptable taggant having a pharmacokinetic profile different from the pharmacokinetic profile of the first pharmaceutically-acceptable taggant.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: March 12, 2013
    Assignee: The Invention Science Fund I, LLC
    Inventors: Roderick A. Hyde, Muriel Y. Ishikawa, Jordin T. Kare, Eric C. Leuthardt, Dennis J. Rivet, Lowell L. Wood, Jr., Victoria Y. H. Wood
  • Patent number: 8394639
    Abstract: The invention provides methods and kits for diagnosing a renal disease in a patient or for predicting the risk of a patient for developing a renal disease. In one embodiment, the invention provides a method for diagnosing a renal disease in a patient, comprising determining the level of a ubiquitin fragment having a mass-to-charge ratio (m/z) of 6188 (ubiquitin m/z 6188), or the level of a nucleic acid encoding ubiquitin m/z 6188, in a sample derived from said patient, wherein the substantial absence or a reduced level of less than 25% of ubiquitin m/z 6188 or the nucleic acid encoding ubiquitin m/z 6188 compared to a control is indicative of the renal disease in said patient.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: March 12, 2013
    Assignee: Georg-August-Universitat Gottingen Stiftung Offentlichen Rechts, Universitatsmedizin
    Inventors: Hassan Dihazi, Gerhard A. Müller, Frank Strutz
  • Patent number: 8394640
    Abstract: The invention features methods for evaluating the conformation of a polymer, for example, for determining the conformational distribution of a plurality of polymers and to detect binding or denaturation events. The methods employ a nanopore which the polymer, e.g., a nucleic acid, traverses. As the polymer traverses the nanopore, measurements of transport properties of the nanopore yield data on the conformation of the polymer.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: March 12, 2013
    Assignee: President and Fellows of Harvard College
    Inventors: Jene A. Golovchenko, Jiali Li, Derek Stein, Marc H. Gershow
  • Patent number: 8394641
    Abstract: The invention is directed to droplet actuator devices and assay methods. The method may include immobilization of the enzymatic substrate including forming an inclusion complex with the substrate within an aqueous environment in contact with an oil.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: March 12, 2013
    Assignee: Advanced Liquid Logic Inc.
    Inventor: Theodore Winger
  • Patent number: 8394642
    Abstract: The invention provides a system that can process a raw biological sample, perform a biochemical reaction and provide an analysis readout. For example, the system can extract DNA from a swab, amplify STR loci from the DNA, and analyze the amplified loci and STR markers in the sample. The system integrates these functions by using microfluidic components to connect what can be macrofluidic functions. In one embodiment the system includes a sample purification module, a reaction module, a post-reaction clean-up module, a capillary electrophoresis module and a computer. In certain embodiments, the system includes a disposable cartridge for performing analyte capture. The cartridge can comprise a fluidic manifold having macrofluidic chambers mated with microfluidic chips that route the liquids between chambers. The system fits within an enclosure of no more than 10 ft3. and can be a closed, portable, and/or a battery operated system. The system can be used to go from raw sample to analysis in less than 4 hours.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: March 12, 2013
    Assignee: IntegenX Inc.
    Inventors: Stevan B. Jovanovich, William D. Nielsen, David S. Cohen, Michael Recknor, Mattias Vangbo, Ezra Van Gelder, Lars Majlof, Omar El-Sissi
  • Patent number: 8394643
    Abstract: The present application relates to copolymers having at least one optionally substituted fluoranthene as a first monomer unit and at least one optionally substituted pyrrole as a second monomer unit. The copolymer may, for example, emit green light when exposed to a blue or ultraviolet radiation. Methods of making the copolymer are also disclosed, as well as methods and apparatuses for producing light and detecting nitroaromatics using the copolymer.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: March 12, 2013
    Assignee: Tongji University
    Inventors: Xingui Li, Dunyin Gu, Meirong Huang
  • Patent number: 8394644
    Abstract: A micro-fluidic osmotic pump capable of delivering a desired fluid at a predetermined destination comprising an inside fluid reservoir housing a compressible sac, a surrounding compartment having an external surface made up of a semi-permeable membrane and a fluid duct. The inside fluid reservoir houses a compressible sac containing a predetermined amount of a fluid that is desired to be pumped to a predetermined destination. The surrounding compartment holds a desired osmotic agent and its saturated solution in the remaining volume thereof. The surrounding compartment has an outer surface made up of a semi-permeable membrane that allows a predetermined second external fluid to permeate into the surrounding compartment. The fluid duct is substantially housed within the inside fluid reservoir and runs through openings and respectively provided through the inside fluid reservoir and the surrounding compartment.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: March 12, 2013
    Assignee: Honeywell International Inc.
    Inventors: Yuandong Gu, Wei Yang, Aravind Padmanabhan
  • Patent number: 8394645
    Abstract: A device and method is provided for performing a high throughput assay. The device includes a plate structure having a plate and a plurality of microfluidic structures positioned thereon. Each microfluidic structure defines a channel having an input and an output. At least one of the input and the output of the channel of each of the plurality of mircofluidic structures includes a first plurality of ports. In operation, the channels are filled with fluid and pressure gradients are generated between the fluids at the inputs and the fluids at the outputs of the channels. As a result, fluid flows through the channels toward the outputs.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: March 12, 2013
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: David J. Beebe, Ivar Meyvantsson
  • Patent number: 8394646
    Abstract: A method for quality control of species used in analytical or diagnostic or therapeutic procedures includes immobilization of a model of the malignancy to a solid support (121), contacting the solid support with species dissolved in liquid (122), measuring both the rate of formation of complex and absolute magnitude of number of complexes of model and species (123) and determining the quality of species by comparing the measured values with predetermined values.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: March 12, 2013
    Assignee: Ridgeview Instruments AB
    Inventor: Magnus Malmqvist
  • Patent number: 8394647
    Abstract: Methods and reagents are disclosed for reducing an amount of non-covalently bound polysaccharide on a support. The method comprises contacting a support comprising both covalently bound polysaccharide and non-covalently bound polysaccharide with an aqueous solution comprising an amount of a chaotropic agent effective to remove non-covalently bound polysaccharide from the support.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: March 12, 2013
    Assignee: Siemens Healthcare Diagnostics Inc.
    Inventors: Bhalchandra Lele, Pratap Singh, Asoke Chatterjee
  • Patent number: 8394648
    Abstract: This invention relates to a method for the fabrication of photonic biosensor arrays and applications of arrays produced by the method in the biomedical field.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: March 12, 2013
    Assignee: Attomarker Limited
    Inventors: Andrew Mark Shaw, Rouslan Vladimir Olkhov
  • Patent number: 8394649
    Abstract: A magnetoresistance effect device including a multilayer structure having a pair of ferromagnetic layers and a barrier layer positioned between them, wherein at least one ferromagnetic layer has at least the part contacting the barrier layer made amorphous and the barrier layer is an MgO layer having a highly oriented texture structure.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: March 12, 2013
    Assignees: Canaon Anelva Corporation, National Institute of Advanced Industrial Science and Technology
    Inventors: David D. Djayaprawira, Koji Tsunekawa, Motonobu Nagai, Hiroki Maehara, Shinji Yamagata, Naoki Watanabe, Shinji Yuasa
  • Patent number: 8394650
    Abstract: A laminated module or panel of solar cells and a laminating method for making same comprise a top layer of melt flowable optically transparent molecularly flexible thermoplastic and a rear sheet of melt flowable insulating molecularly flexible thermoplastic both melt flowing at a temperature between about 80° C. and 250° C. and having a low glass transition temperature. Solar cells are encapsulated by melt flowing the top layer and rear sheet, and electrical connections are provided between front and back contacts thereof. Light passing through the transparent top layer impinges upon the solar cells and the laminated module exhibits sufficient flexural modulus without cross-linking chemical curing. Electrical connections may be provided by melt flowable electrically conductive molecularly flexible thermoplastic adhesive or by metal strips or by both.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: March 12, 2013
    Assignee: Amerasia International Technology, Inc.
    Inventor: Kevin Kwong-Tai Chung
  • Patent number: 8394651
    Abstract: The present invention is generally directed to a method of suppressing the Auger rate in confined structures, comprising replacing an abrupt confinement potential with either a smooth confinement potential or a confinement potential of a certain size found by increasing the confinement potential width until the Auger recombination rate undergoes strong oscillations and establishes a periodic minima. In addition, the present invention provides for the design of structures with high quantum efficiency.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: March 12, 2013
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Alexander L. Efros, George E. Cragg
  • Patent number: 8394652
    Abstract: A light emitting element having a recess-protrusion structure on a substrate is provided. A semiconductor light emitting element 100 has a light emitting structure of a semiconductor 20 on a first main surface of a substrate 10. The first main surface of the substrate 10 has substrate protrusion portion 11, the bottom surface 14 of each protrusion is wider than the top surface 13 thereof in a cross-section, or the top surface 13 is included in the bottom surface 14 in a top view of the substrate. The bottom surface 14 has an approximately polygonal shape, and the top surface 13 has an approximately circular or polygonal shape with more sides than that of the bottom surface 14.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: March 12, 2013
    Assignee: Nichia Corporation
    Inventors: Shunsuke Minato, Junya Narita, Yohei Wakai, Yukio Narukawa, Motokazu Yamada
  • Patent number: 8394653
    Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate with a first block layer dividing an upper surface of the substrate into a plurality of epitaxial regions; forming a first semiconductor layer on the epitaxial regions; forming a second block layer partly covering the first semiconductor layer; forming a lighting structure on an uncovered portion of the first semiconductor layer; removing the first and the second block layers thereby defining clearances at the bottom surfaces of the first semiconductor layer and the lighting structure; and permeating etching solution into the first and second clearances to etch the first semiconductor layer and the lighting structure, thereby to form each of the first semiconductor layer and the lighting structure with an inverted frustum-shaped structure.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: March 12, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Ya-Wen Lin, Chia-Hung Huang, Shun-Kuei Yang
  • Patent number: 8394654
    Abstract: A method of forming a phosphor coating layer on a light emitting diode (LED) chip using electrophoresis includes separating phosphor particles in a suspension according to a particle size, and coating the phosphor particles on a surface of the LED chip by sequentially depositing the separated phosphor particles on the surface of the LED chip according to the particle size. An apparatus to form a phosphor coating layer on an LED chip includes an electrophoresis bath to accommodate a suspension containing phosphor particles separated into layers according to a particle size, and electrodes disposed inside the electrophoresis bath. The electrodes may include a cathode electrode on which the LED chip may be arranged, and an anode electrode.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: March 12, 2013
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventor: Yevgeni Aliyev
  • Patent number: 8394655
    Abstract: A photoelectric conversion device with an excellent photoelectric conversion characteristic with a silicon semiconductor material effectively utilized. The photoelectric conversion device includes a first unit cell including a first electrode, a first impurity semiconductor layer, a single crystal semiconductor layer, and a second impurity semiconductor layer; and a second unit cell including a third impurity semiconductor layer, a non-single-crystal semiconductor layer, a fourth impurity semiconductor layer, and a second electrode. The second and third impurity semiconductor layers are in contact with each other so that the first and second unit cells are connected in series, and an insulating layer is provided for a surface of the first electrode and bonded to a supporting substrate.
    Type: Grant
    Filed: November 4, 2008
    Date of Patent: March 12, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8394656
    Abstract: MEMS devices (such as interferometric modulators) may be fabricated using a sacrificial layer that contains a heat vaporizable polymer to form a gap between a moveable layer and a substrate. One embodiment provides a method of making a MEMS device that includes depositing a polymer layer over a substrate, forming an electrically conductive layer over the polymer layer, and vaporizing at least a portion of the polymer layer to form a cavity between the substrate and the electrically conductive layer.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: March 12, 2013
    Assignee: Qualcomm MEMS Technologies, Inc.
    Inventors: Chun-Ming Wang, Jeffrey Lan, Teruo Sasagawa
  • Patent number: 8394657
    Abstract: A biosensor using a nanodot and a method of manufacturing the same are provided. A silicon nanowire can be formed by a CMOS process to reduce manufacturing costs. In addition, an electrically charged nanodot is coupled to a target molecule to be detected, in order to readily change conductivity of the silicon nanowire, thereby making it possible to implement a biosensor capable of providing good sensitivity and being manufactured at a low cost.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: March 12, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Tae Youb Kim, Chil Seong Ah, Chang Geun Ahn, Han Young Yu, Jong Heon Yang, Moon Gyu Jang
  • Patent number: 8394658
    Abstract: Disclosed are methods of forming multi-doped junctions, which utilize a nanoparticle ink to form an ink pattern on a surface of a substrate. From the ink pattern, a densified film ink pattern can be formed. The disclosed methods may allow in situ controlling of dopant diffusion profiles.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: March 12, 2013
    Assignee: Innovalight, Inc.
    Inventors: Giuseppe Scardera, Dmitry Poplavskyy, Michael Burrows, Sunil Shah
  • Patent number: 8394659
    Abstract: Methods for forming Cu—In—Ga—N (CIGN) layers for use in TFPV solar panels are described using reactive PVD deposition in a nitrogen containing atmosphere. In some embodiments, the CIGN layers can be used as an absorber layer and eliminate the need of a selenization step. In some embodiments, the CIGN layers can be used as a protective layer to decrease the sensitivity of the CIG layer to oxygen or moisture before the selenization step. In some embodiments, the CIGN layers can be used as an adhesion layer to improve the adhesion between the back contact layer and the absorber layer.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: March 12, 2013
    Assignee: Intermolecular, Inc.
    Inventors: Guowen Ding, Minh Huu Le, Guizhen Zhang
  • Patent number: 8394660
    Abstract: Devices having features deposited on two sides of a device substrate and methods for making the same. The devices are useful, for example, as the components in a macroelectronic system. In a preferred embodiment, the devices are photosensors having a plurality of electrodes patterned on a first side of the device and an electromagnetic interference filter patterned on a second side of the device. The method facilitates the fabrication of two-sided devices through the use of an immobilizing layer deposited on top of devices patterned on a first side of a device substrate; flipping the device substrate; processing the second side of the device substrate to produce patterned features on the second side of the device substrate; and releasing the devices having patterned elements on two sides of each device.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: March 12, 2013
    Assignee: University of Washington its Center for Commercialization
    Inventors: Samuel Kim, Babak Amirparviz
  • Patent number: 8394661
    Abstract: A structuring device is for structuring a plate-like element.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: March 12, 2013
    Assignee: InnoLas Systems GmbH
    Inventor: Richard Grundmueller
  • Patent number: 8394662
    Abstract: A method for forming a thin film photovoltaic device. The method includes providing a transparent substrate comprising a surface region. A first electrode layer is formed overlying the surface region. A copper layer is formed overlying the first electrode layer and an indium layer is formed overlying the copper layer to form a multi-layered structure. The method subjects at least the multi-layered structure to a thermal treatment process in an environment containing a sulfur bearing species to form a copper indium disulfide material. The copper indium disulfide material comprising a copper-to-indium atomic ratio ranging from about 1.2:1 to about 2:1 and a thickness of substantially copper sulfide material. The thickness of the copper sulfide material is removed to expose a surface region having a copper poor surface comprising a copper to indium atomic ratio of less than about 0.95:1.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: March 12, 2013
    Assignee: Stion Corporation
    Inventor: Howard W. H. Lee
  • Patent number: 8394663
    Abstract: Embodiments of the present invention involve photovoltaic (PV) cells comprising a semiconducting nanorod-nanocrystal-polymer hybrid layer, as well as methods for fabricating the same. In PV cells according to this invention, the nanocrystals may serve both as the light-absorbing material and as the heterojunctions at which excited electron-hole pairs split.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: March 12, 2013
    Assignee: Nanoco Technologies, Ltd.
    Inventors: James Harris, Nigel Pickett
  • Patent number: 8394664
    Abstract: A method for forming nanotube electrical devices, arrays of nanotube electrical devices, and device structures and arrays of device structures formed by the methods. Various methods of the present invention allow creation of semiconducting and/or conducting devices from readily grown SWNT carpets rather than requiring the preparation of a patterned growth channel and takes advantage of the self-controlling nature of these carpet heights to ensure a known and controlled channel length for reliable electronic properties as compared to the prior methods.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: March 12, 2013
    Assignee: William Marsh Rice University
    Inventors: Nolan Walker Nicholas, W. Carter Kittrell, Myung Jong Kim, Howard K. Schmidt
  • Patent number: 8394665
    Abstract: A method of manufacturing an organic thin film transistor, the method comprising: depositing a source and drain electrode; forming a thin self-assembled layer of material on the source and drain electrodes, the thin self-assembled layer of material comprising a dopant moiety for chemically doping an organic semi-conductive material by accepting or donating charge and a separate attachment moiety bonded to the dopant moiety and selectively bonded to the source and drain electrodes; and depositing a solution comprising a solvent and an organic semi-conductive material in a channel region between the source and drain electrode.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: March 12, 2013
    Assignees: Cambridge Display Technology Limited, Panasonic Corporation
    Inventors: Sadayoshi Hotta, Jonathan Halls, Gregory Whiting
  • Patent number: 8394666
    Abstract: Disclosed herein are organic memory devices and methods for fabricating such devices. The organic memory devices comprise a first electrode, a second electrode and an organic active layer extending between the first and second electrodes wherein the organic active layer is formed from one or more electrically conductive organic materials that contain heteroatoms and which are configured in such a manner as that the heteroatoms are available for linking or complexing metal atoms within the organic active layer. The metal ions may then be reduced to form metal filaments within the organic active layer to form a low resistance state and the metal filaments may, in turn, be oxidized to form a high resistance state and thereby function as memory devices.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: March 12, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won Jae Joo, Tae Lim Choi, Jae Ho Lee
  • Patent number: 8394667
    Abstract: Some embodiments include methods of forming memory cells. Chalcogenide is formed over a plurality of bottom electrodes, and top electrode material is formed over the chalcogenide. Sacrificial material is formed over the top electrode material. A plurality of memory cell structures is formed by etching through the sacrificial material, top electrode material and chalcogenide. Each of the memory cell structures has a cap of the sacrificial material thereover. The etching forms polymeric residue over the sacrificial material caps, and damages chalcogenide along sidewalls of the structures. The sacrificial material is removed with an HF-containing solution, and such removes the polymeric residue off of the memory cell structures. After the sacrificial material is removed, the sidewalls of the structures are treated with one or both of H2O2 and HNO3 to remove damaged chalcogenide from the sidewalls of the memory cell structures.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: March 12, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Jun Liu, Jerome Imonigie
  • Patent number: 8394668
    Abstract: Oxide thin film, electronic devices including the oxide thin film and methods of manufacturing the oxide thin film, the methods including (A) applying an oxide precursor solution comprising at least one of zinc (Zn), indium (In) and tin (Sn) on a substrate, (B) heat-treating the oxide precursor solution to form an oxide layer, and (C) repeating the steps (A) and (B) to form a plurality of the oxide layers.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: March 12, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Baek Seon, Myung-Kwan Ryu, Kyung-Bae Park, Sang-Yoon Lee, Bon-Won Koo
  • Patent number: 8394669
    Abstract: A resistance variable element (100) used in a through-hole cross-point structure memory device, according to the present invention, and a resistance variable memory device including the resistance variable element, includes a substrate (7) and an interlayer insulating layer (3) formed on the substrate, and have a configuration in which a through-hole (4) is formed to penetrate the interlayer insulating layer, a first resistance variable layer (2) comprising transition metal oxide is formed outside the through-hole, a second resistance variable layer (5) comprising transition metal oxide is formed inside the through-hole, the first resistance variable layer is different in resistivity from the second resistance variable layer, and the first resistance variable layer and the second resistance variable layer are in contact with each other only in an opening (20) of the through-hole which is closer to the substrate.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: March 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Koji Arita, Takumi Mikawa, Atsushi Himeno, Yoshio Kawashima, Kenji Tominaga
  • Patent number: 8394670
    Abstract: A steering device. The steering device includes an n-type impurity region comprising a zinc oxide material and a p-type impurity region comprising a silicon germanium material. A pn junction region formed from the zinc oxide material and the silicon germanium material. The steering device is a serially coupled to a resistive switching device to provide rectification for the resistive switching device to form a non-volatile memory device.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: March 12, 2013
    Assignee: Crossbar, Inc.
    Inventor: Scott Brad Herner
  • Patent number: 8394671
    Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: March 12, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
  • Patent number: 8394672
    Abstract: A semiconductor chip device includes a first semiconductor chip adapted to be stacked with a second semiconductor chip wherein the second semiconductor chip includes a side and first and second conductor structures projecting from the side. The first semiconductor chip includes a first edge, a first conductor pad, a first conductor pillar positioned on but laterally offset from the first conductor pad toward the first edge and that has a first lateral dimension and is adapted to couple to one of the first and second conductor structures, a second conductor pad positioned nearer the first edge than the first conductor pad, and a second conductor pillar positioned on but laterally offset from the second conductor pad and that has a second lateral dimension larger than the first lateral dimension and is adapted to couple to the other of the first and second conductor structures.
    Type: Grant
    Filed: August 14, 2010
    Date of Patent: March 12, 2013
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Michael Z. Su, Gamal Refai-Ahmed, Bryan Black
  • Patent number: 8394673
    Abstract: A method of manufacturing a semiconductor device is disclosed. One embodiment includes placing multiple semiconductor chips onto a carrier, each of the semiconductor chips having a first face and a second face opposite to the first face. An encapsulation material is applied over the multiple semiconductor chips and the carrier to form an encapsulating body having a first face facing the carrier and a second face opposite to the first face. A redistribution layer is applied over the multiple semiconductor chips and the first face of the encapsulating body. An array of external contact elements are applied to the second face of the encapsulating body.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: March 12, 2013
    Assignee: Infineon Technologies AG
    Inventors: Gerhard Josef Poeppel, Irmgard Escher-Poeppel
  • Patent number: 8394675
    Abstract: A method of manufacturing an LED package includes mounting a large panel frame/substrate (LPF/S) having a substantially square shape to a ring. The LPF/S includes a plurality of die pads and a corresponding plurality of leads arranged in a matrix pattern. Each of the die pads includes a planar chip attach surface. An LED chip is attached to the planar chip attach surface of each of the die pads. An encapsulant material is applied overlaying the LED chips and at least a part of the LPF/S. Each die pad and corresponding leads are separated from the LPF/S to form individual LED packages. The steps of attaching the LED chips and applying the encapsulant material are performed while the LPF/S is mounted to the ring.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: March 12, 2013
    Assignee: Carsem (M) Sdn. Bhd.
    Inventors: Yong Lam Wai, Chan Boon Meng, Phang Hon Keat
  • Patent number: 8394676
    Abstract: A marking method is provided for putting markings on the surface of a packaged semiconductor device. The semiconductor device includes a semiconductor chip and a resin package for covering the semiconductor chip. The method includes the steps of forming a groove in the obverse surface of the resin package, and filling the groove with a resin that is visually distinguishable from the resin package.
    Type: Grant
    Filed: January 4, 2010
    Date of Patent: March 12, 2013
    Assignee: Rohm Co., Ltd.
    Inventor: Hideaki Yamaji
  • Patent number: 8394677
    Abstract: A method of fabricating a semiconductor device according to one embodiment includes preparing a wafer having a plurality of chip areas, each chip area to become semiconductor chip, bonding the first side of the wafer to a support substrate through a removable adhesive, dividing the wafer into individually separate semiconductor chips, applying adhesive tape to the second side of the separate semiconductor chips, the second side being opposite to the first side bonded to the support substrate, and the adhesive tape being softer than the support substrate, removing the support substrate from the semiconductor chips, and picking up the separate semiconductor chips that are on the adhesive tape.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: March 12, 2013
    Assignee: Elpida Memory, Inc.
    Inventor: Shinichi Sakurada
  • Patent number: 8394678
    Abstract: A plurality of chip sealing bodies stacked on a wiring substrate with a connection terminal. The chip sealing body includes a semiconductor chip having a semiconductor integrated circuit, a pad and a conductive connecting material, and a resin sealing the semiconductor chip. The chip sealing body is shaped into a cubic form in which a portion of the conductive connecting material except an end portion located on an external device side and all surfaces of semiconductor chip is sealed by the resin and the end portion of the conductive connecting material located on the external device side is exposed from the cubic form. A conductive bonding wire connects the end portions of the conductive connecting materials and the connection terminal respectively. A resin sealing material seals the plurality of chip sealing bodies, the conductive bonding wire, and the wiring substrate.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: March 12, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Akinori Shiraishi, Mitsuhiro Aizawa
  • Patent number: 8394679
    Abstract: A structure and method for cold weld compression bonding using a metallic nano-structured gasket is provided. This structure and method allows a hermetic package to be formed at lower pressures and temperatures than are possible using bulk or conventional thin-film gasket materials.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: March 12, 2013
    Assignee: Stellarray, Inc.
    Inventors: Mark F Eaton, Curtis Nathan Potter, Andrew Miner
  • Patent number: 8394680
    Abstract: In a layout for a semiconductor device, each active region comprises a first active region, a right active region on the right side of the first active region, a left active region on the left side of the first active region, an upper active region on the upper side of the first active region and a lower active region on the lower side of the first active region, wherein the first active region, the right active region, the left active region, the upper active region and the lower active region each have an inclined portion having a bit-line contact region; and first and second portions having a storage node contact region, first and second ends formed on left and right ends of the inclined portion at a predetermined tilt angle with respect to the inclined portion, the active region being intersected by two word lines and one bit line.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: March 12, 2013
    Assignee: Hynix Semiconductor Inc
    Inventor: Ho Hyuk Lee
  • Patent number: 8394681
    Abstract: A symmetrical circuit is disclosed (FIG. 4). The circuit includes a first transistor (220) having a first channel in a substantial shape of a parallelogram (FIG. 5A) with acute angles. The first transistor has a first current path (506) oriented in a first crystal direction (520). A first control gate (362) overlies the first channel. A second transistor (222) is connected to the first transistor and has a second channel in the substantial shape of a parallelogram with acute angles. The second transistor has a second current path (502) oriented parallel to the first current path. A second control gate (360) overlies the second channel.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: March 12, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Ashesh Parikh, Anand Seshadri
  • Patent number: 8394682
    Abstract: Some embodiments include methods of forming graphene-containing switches. A bottom electrode may be formed over a base, and a first electrically conductive structure may be formed to extend upwardly from the bottom electrode. Dielectric material may be formed along a sidewall of the first electrically conductive structure, while leaving a portion of the bottom electrode exposed. A graphene structure may be formed to be electrically coupled with the exposed portion of the bottom electrode. A second electrically conductive structure may be formed on an opposing side of the graphene structure from the first electrically conductive structure. A top electrode may be formed over the graphene structure and electrically coupled with the second electrically conductive structure. The first and second electrically conductive structures may be configured to provide an electric field across the graphene structure.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: March 12, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Gurtej S. Sandhu
  • Patent number: 8394683
    Abstract: Some embodiments include methods of forming semiconductor constructions. Alternating layers of n-type doped material and p-type doped material may be formed. The alternating layers may be patterned into a plurality of vertical columns that are spaced from one another by openings. The openings may be lined with tunnel dielectric, charge-storage material and blocking dielectric. Alternating layers of insulative material and conductive control gate material may be formed within the lined openings. Some embodiments include methods of forming NAND unit cells. Columns of alternating n-type material and p-type material may be formed. The columns may be lined with a layer of tunnel dielectric, a layer of charge-storage material, and a layer of blocking dielectric. Alternating layers of insulative material and conductive control gate material may be formed between the lined columns. Some embodiments include semiconductor constructions, and some embodiments include NAND unit cells.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: March 12, 2013
    Assignee: Micron Technology, Inc.
    Inventors: D. V. Nirmal Ramaswamy, Gurtej S. Sandhu
  • Patent number: 8394684
    Abstract: Techniques are discloses to apply an external stress onto the source/drain semiconductor fin sidewall areas and latch the same onto the semiconductor fin before releasing the sidewalls for subsequent salicidation and contact formation. In particular, the present disclosure provides methods in which selected portions of a semiconductor are subjected to an amorphizing ion implantation which disorients the crystal structure of the selected portions of the semiconductor fins, relative to portions of the semiconductor fin that is beneath a gate stack and encapsulated with various liners. At least one stress liner is formed and then stress memorization occurs by performing a stress latching annealing. During this anneal, recrystallization of the disoriented crystal structure occurs. The at least one stress liner is removed and thereafter merging of the semiconductor fins in the source/drain regions is performed.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: March 12, 2013
    Assignee: International Business Machines Corporation
    Inventors: Sivananda K. Kanakasabapathy, Hemanth Jagannathan, Sanjay Mehta