Abstract: According to one embodiment, there is provided a fusion memory including a first memory cell array formed of a NAND cell unit and a second memory cell array formed of a DRAM cell on a semiconductor substrate. The NAND cell unit is formed of a non-volatile memory cell having a two-layer gate structure in which a first gate and a second gate are stacked, and a selective transistor connecting the first and second gates of the non-volatile memory cell. The DRAM cell is formed of a cell transistor having a structure same as the structure of the selective transistor, and a MOS capacitor having a structure same as the structure of the non-volatile memory cell or the selective transistor.

Abstract: A memory erasing method and a driving circuit thereof are introduced, when cells are selected to be erased, the method includes setting gates of cells which are not selected to be erased and are located at a selected block, drains of all the cells in a selected bank, and the gate of the unselected cells to be floating; supplying a positive voltage to all the sources in a selected bank and their shared P well and N well; and supplying a negative voltage to the gates of the cells located in a selected block and selected to be erased. Accordingly, a positive coupling voltage from P wells is received whenever gates are floating, so as to inhibit erasure of unselected blocks and thereby streamline decoding, thus making it easy to attain further expansion of blocks or banks with a small layout area and partition of sectors in the blocks.

Abstract: Systems and processes may use a first memory, a second memory, and a memory controller. The second memory is at least as large as a block of the first memory. Data is received and stored in the second memory for further writing to the second memory.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control unit. The memory cell array includes a plurality of memory cells arranged in a matrix. The control unit erases data of the memory cells. The control unit interrupts the erase operation of the memory cells and holds an erase condition before the interrupt in accordance with a first command during the erase operation, and resumes the erase operation based on the held erase condition in accordance with a second command.

Abstract: A nonvolatile semiconductor memory device includes a semiconductor substrate and memory transistors, each of which has a laminate formed by alternately laminating insulating films and conductive films on the semiconductor substrate, a silicon pillar going through the laminate, a tunnel insulating film arranged on the surface of the silicon pillar facing the laminate, a charge accumulating layer arranged on the surface of the tunnel insulating film facing the laminate, and a block insulating film arranged on the surface of the charge accumulating layer facing the laminate and in contact with the conductive film. During a data deletion operation, a voltage is applied on the conductive film so that the potential of the silicon pillar with respect to the conductive film decreases as the cross-sectional area of the silicon pillar decreases.

Abstract: A method of reading a nonvolatile memory device comprises applying a read voltage to a memory cell array to read selected memory cells, counting a number of the selected memory cells that have a threshold voltage higher or lower than the read voltage, and comparing the counted number with a reference value to determine a number of bits stored in the selected memory cells.

Abstract: Methods, devices, and systems associated with charge storage structures in semiconductor devices are described herein. In one or more embodiments, a method of forming nanodots includes forming at least a portion of a charge storage structure over a material by reacting a single-source precursor and a reactant, where the single-source precursor includes a metal and a semiconductor.

Abstract: A method and system for extending the life span of a flash memory device. The flash memory device is dynamically configurable to store data in the single bit per cell (SBC) storage mode or the multiple bit per cell (MBC) mode. In the MBC storage mode, the cell can have one of multiple possible states, where each state is defined by respective threshold voltage ranges. In the SBC mode, the cell can have states with threshold voltages corresponding to states of the MBC storage mode which are non-adjacent to each other to improve reliability characteristics of the cell.

Abstract: A memory system includes a controller and a memory part including a memory cell array including memory cells, word lines, bit lines including bit line pairs each composed of an even bit line and an odd bit line adjacent to each other, and sense amplifiers provided to the bit line pairs and configured to detect data in selected memory cells connected to a selected word line. When reading data is performed from first memory cells to which writing data is performed first in memory cell pairs each including two adjacent memory cells respectively connected to one of the even bit lines and one of the odd bit lines, the controller controls the memory part so as to change a read level voltage applied to the selected word line depending on a data write state of second memory cells in the memory cell pairs to which writing data is performed later.

Abstract: In one embodiment, the method includes receiving a request to read data stored in a first memory cell associated with a first word line, and performing a first read operation on at least one memory cell associated with a second word line in response to the request. The second word line follows the first word line in a word line programming order, and the first read operation is performed over a first time period. The method further includes performing a second read operation on the first memory cell based on output from the first read operation. The second read operation is performed for a second time period, and the first time period is shorter than the second time period if output from performing the first read operation indicates the first memory cell is not coupled.

Abstract: A dual function memory device architecture compatible with asynchronous operation and synchronous serial operation. The dual function memory device architecture includes one set of physical ports having two different functional assignments. Coupled between the physical ports and core circuits of the memory device are asynchronous and synchronous input and output signal paths or circuits. The signal paths include shared or dedicated buffers coupled to the ports, asynchronous and synchronous command decoders, a network of switches, and a mode detector. The mode detector determines the operating mode of the dual function memory device from a port, and provides the appropriate switch selection signal. The network of switches routes the input or output signals through the asynchronous or synchronous circuits in response to the switch selection signal. The appropriate command decoder interprets the input signals and provides common control logic with the necessary signals for initiating the corresponding operation.

Abstract: A multi-level memory apparatus includes two or more current paths configured to pass currents having different levels, a memory cell selectively coupled to the two or more current paths, and a cell current copy unit configured to copy a cell current flowing through the memory cell.

Abstract: A data storing circuit includes: a storage unit configured to store a multi-bit data and a validity signal representing validity of the data; and a decision unit configured to determine validity of the multi-bit data by comparing one-bit data of the multi-bit data with the validity signal.

Abstract: Apparatuses and method for adjusting a path delay of a command path are disclosed. In an example apparatus, a command path configured to provide a command from an input to an output includes an adjustable delay. The adjustable delay is configured to add delay to the command path delay, wherein the delay of the adjustable delay is based at least in part on a phase relationship between a feedback signal responsive to the command propagating through the command path and a clock signal. An example method includes configuring a command path to add delay to a command path delay to provide an internal write command signal to perform a write operation on write data corresponding to the internal write command, and propagating the write data corresponding to the internal write command through a data path without further delaying the write data to match the command path delay.

Abstract: A nonvolatile memory device including a plurality of memory cells arranged at a region where a word line and a bit line cross each other, a voltage generator configured to generate a program voltage to apply to the word line by increasing the program voltage by an increment whenever a program loop is repeated, a current sensing check unit configured to compare a number of failed memory cells among the memory cells to first and second reference values, and a control logic configured to control the voltage generator to change the increment according to the comparison result of the current sensing check unit.

Abstract: A semiconductor device includes a bit line connected to memory cells, a negative bias voltage generation circuit generating a negative bias voltage that is to be applied to the bit line during writing, and a negative bias reference voltage generation unit generating a negative bias reference voltage based on a resistance ratio between a first resistor and a second resistor.

Abstract: A reading method of a memory is provided. The memory has a turn on window. The reading method comprises the following steps. A reading voltage is provided. The reading voltage is shown if the reading voltage is located in the turn on window. The reading voltage is updated by moving a predetermined distance if the reading voltage is not located in the turn on window. The predetermined distance is cut by half before the step of updating the reading voltage is performed again.

Abstract: A latency control circuit includes a clock delay configured to output a plurality of serial delay signals obtained by serially delaying an input clock signal with the same intervals, a deviation information generating unit configured to generate a deviation information on the basis of a delay value, which the clock signal undergoes in a chip, and latency information, a clock selector configured to output a plurality of clock selection signals based on the plurality of serial delay signals and the deviation information, a command signal processing unit configured to generate a read signal based on an input command signal, and output a variable delay duplication signal by variably delaying the read signal, and a latency shifter configured to output a latency signal by combining the plurality of clock selection signals with the variable delay duplication signal.

Abstract: Embodiments of a memory are disclosed that may reduce the likelihood of a miss-read while reading a weak data storage cell. The memory may include a number of data storage cells, a column multiplexer, a first sense amplifier and a second sense amplifier, and an output circuit. The gain level of the first sense amplifier may be higher than the gain level of the second sense amplifier. The output circuit may include a multiplexer and the multiplexer may be operable to controllably select one of the outputs of the first and second sense amplifiers and pass the value of the selected sense amplifier. The output circuit may include a node that couples the outputs of the first and second sense amplifiers and the outputs of the first and second sense amplifiers may be able to be set to a high impedance state.

Abstract: A method for estimating channel characteristics of a nonvolatile memory device including a plurality of memory cells includes the steps of: calculating first threshold voltage distributions of the memory cells programmed according to input data, based on the input data and a physical structure of the memory cells; calculating second threshold voltage distributions of the memory cells, based on output data and the physical structure of the memory cells; and analyzing the relation between the first and second threshold voltage distributions, using a mask.

Abstract: A static random-access memory (SRAM) in an integrated circuit with circuitry for timing the enabling of sense amplifiers. The memory includes read/write SRAM cells, along with word-line tracking transistors arranged in one or more rows along a side of the read/write cells, and read-tracking transistors arranged in a column along a side of the read/write cells. A reference word line extends over the word-line tracking transistors, with its far end from the driver connected to pass transistors in the read-tracking transistors. The read-tracking transistors are preset to a known data state that, when accessed responsive to the reference word line, discharges a reference bit line, which in turn drives a sense amplifier enable signal.

Abstract: A memory system includes first to third memory devices each having an input terminal for receiving a token signal and an output terminal for transmitting the token signal, wherein the input terminal of each of the first to third memory devices are connected to the output terminal of another memory device through a ring topology, and the first to third memory devices substantially simultaneously perform an operation of consuming a peak current in response to any one of a plurality of token signals.

Abstract: A system includes a control chip and a plurality of command terminals receiving a plurality of command signals, respectively; a command decoder coupled to the command terminals, the command decoder being configured to output an internal command in response to the command signals; and a layer address buffer configured to output a layer address each time the command decoder outputs a row command as the internal command and outputs a column command as the internal command; and a plurality of core chips stacked with one another, each of the core chips being configured to receive the, row command and the layer address output together with the row command, to receive the column command and the layer address output together with the column command, and to free from receiving the command signals.

Abstract: A mixer drum driving apparatus includes a mixer drum carried on a frame of a mixer truck in a frontward tilted condition to be free to rotate, and a drive source configured to drive the mixer drum to rotate. The drive source includes a motor which is disposed in a space between a rear portion of the mixer drum and a rear portion of the frame in order to drive the mixer drum to rotate.

Abstract: A mixer drum driving device includes a mixer drum, a hydraulic motor, a hydraulic pump, an auxiliary hydraulic pump for rotating the mixer drum for mixing by supplying pressure oil to the hydraulic motor independently of the hydraulic pump, and a direct-current brush motor for driving and rotating the auxiliary hydraulic pump. In the case of rotating the mixer drum for mixing, the mixer drum is driven and rotated by driving only the auxiliary hydraulic pump by the direct-current brush motor.

Abstract: The present invention relates to an electrode paste manufacturing system that includes, a twin screw extrusion mixer, a mohno pump that is connected at an inlet thereof to an outlet of the twin screw extrusion mixer, a deaerating tank that is connected to an outlet of the mohno pump, and a vacuum pump that is connected at an inlet thereof to the deaerating tank. The vacuum pump is configured such that a conduit system on the deaerating tank side of an airtight line formed at a contact portion between a rotor and a stator of the mohno pump is a closed system with the airtight line being a boundary.

Abstract: A continuous kneading device is provided with an upper trunk (1) to which a powder supply tube (3) through which quantified powder is supplied is connected and in which the powder is blended with a fluid, and a lower trunk (2) concentrically connected to the bottom of the upper trunk (1). The continuous kneading device continuously kneads the powder and the fluid by a first rotating kneading plate (10) built into the upper trunk (1) and a second rotating kneading plate (11) built into the lower trunk (2), wherein surfaces of the base metals of the first and second rotating kneading plates (10, 11) are covered with a coating material (50) for reducing friction when the powder and the fluid are kneaded together.

Abstract: A system for processing material has a power supply and a machine having a hopper for receiving and passing material to an auger. The auger has a shaft with an axis about which it rotates, a helical flighting mounted to the shaft, pins mounted to the helical flighting, and paddles mounted to the shaft. The radial outer edge of the helical flighting is crenelated with periodic notches that form rectangular blades on the helical flighting. The pins are rotationally and angularly aligned with leading edges of the rectangular blades. The system may include a vehicle, such as a trailer, having first and second compartments separated by a partition. The power supply is located in the first compartment and has a power supply member extending though the partition. The machine is located in the second compartment and coupled to the power supply member.

Abstract: To generate homogenized super-micro bubbles of nano-scale in a simple structure and at a low cost, a super-micro bubble generator has a cylindrical casing provided with an opening for the introduction of a liquid at one end and an outlet for delivery of the liquid at the other end, and the cylindrical casing includes: a flow speed increasing part for increasing the flow speed of the liquid introduced from the introduction opening; a gas suction part for drawing gas from the outside into the casing, wherein the pressure is decreased by a liquid flow whose flow speed is increased in the flow speed increasing part; and a super-micro bubble-containing liquid producing part for shearing, by the liquid flow whose flow speed is increased in the flow speed increasing part, the gas that is sucked by the gas suction part and generating a liquid including super-micro bubbles, in this order, from the introduction opening to the delivery opening.

Abstract: A planetary mixer includes frame-shaped blades configured to undergo planetary motion within a tank having a generally cylindrical inner surface and a plate-shaped bottom surface including corners formed with a curved face throughout an entire circumference of the bottom surface. Each of the blades has a vertical side portion extending along the inner surface of the tank and a bottom side portion extending along the bottom surface of the tank and connected at generally right angles to lower ends of the vertical side portion to form blade corners each formed with a curved face.

Abstract: Described herein are implementations of various technologies for a method and apparatus for a method and apparatus for displaying sonar images. In one implementation, sonar images that are currently being recorded may be displayed on a regular pane. Further, condensed sonar images that had previously been recorded and that are currently being recorded may be displayed on a preview pane, while recording the sonar images.

Abstract: A portable sonar imaging system includes a portable electronic device, a sonic transducer, and a portable sonar data preprocessing device. The portable sonar data preprocessing device includes a transducer adapter for connecting to a sonic transducer and further includes a portable sonar data preprocessing device interface for communicating with the portable electronic device. The portable sonar data preprocessing device receives analog sonar data from the sonic transducer, converts the analog sonar data to digital sonar data, and provides the digital sonar data to a portable electronic device interface of the portable electronic device through the portable sonar data preprocessing device interface. In turn, the portable electronic device generates a graphical image based on the digital sonar data and displays the graphical image on a display screen of the portable electronic device.

Abstract: A steerable seismic energy source includes at least one float. The floatation device includes a device for changing buoyancy thereof. A frame is coupled to the at least one float. At least one seismic energy source is suspended from the frame. At least one steering device is coupled to the floatation device or the frame. The at least one steering device includes at least one control surface and a control surface actuator coupled to the control surface. The actuator is configured to rotate the control surface to generate hydrodynamic lift at least in a vertical direction.

Abstract: Methods and apparatus for determining slowness of wavefronts. An example apparatus includes one or more sources spaced from a receiver. The one or more sources are to transmit one or more signals and the receiver is to receive at least a portion of the one or more signals. The apparatus includes a processor to process waveform data associated with the one or more signals by stacking waveforms of the waveform data based on to linear moveout and sinusoidal moveout.

Abstract: The present invention provides a technique to separate compressional seismic waves from shear seismic waves and to determine their direction of propagation to enhance the seismic monitoring oil and gas reservoirs and the seismic monitoring of hydrofracturing in oil and gas wells. The invention utilizes various combinations of multi-component linear seismic sensors, multi-component rotational seismic sensors, and pressure sensors. Sensors are jointly deployed in arrays of shallow monitoring wells to avoid the complicating effects of the free surface of the earth. The emplacement of sensors in the shallow monitoring wells may be permanent. The method has a wide range of application in oil and gas exploration and production. This abstract is not intended to be used to interpret or limit the claims of this invention.

Abstract: Systems and methods for asynchronously acquiring seismic data are described, one system comprising one or more seismic sources, a plurality of sensor modules each comprising a seismic sensor, an A/D converter for generating digitized seismic data, a digital signal processor (DSP), and a sensor module clock; a seismic data recording station; and a seismic data transmission sub-system comprising a high precision clock, the sub-system allowing transmission of at least some of the digitized seismic data to the recording station, wherein each sensor module is configured to periodically receive from the sub-system an amount of the drift of its clock relative to the high precision clock. This abstract is provided to comply with rules requiring an abstract to ascertain the subject matter of the disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: A sonar system using frequency bursts. A sonar system for use with a vessel may include a sonar module having a transmitting element configured to generate a transmit signal, where the transmit signal comprises one or more bursts, and where at least one burst comprises a first portion having a first frequency and a second portion having a second frequency different than the first frequency. The sonar system may also include a transducer array in communication with the sonar module, where the transducer array is configured to (i) receive the transmit signal from the transmitting element, (ii) produce one or more sonar beams based on the first frequency and the second frequency, and (iii) receive one or more sonar return signals from an underwater environment.

Abstract: A sonar module using multiple receiving elements. A sonar module for use with a vessel may include a housing positioned on the vessel. The sonar module may also include one or more transmitting elements positioned inside the housing and configured to send at least one transmit signal to a transducer array. The sonar module may further include a first receiving element, a second receiving element, a third receiving element, and a fourth receiving element positioned inside the housing, where the first receiving element is configured to receive a first sonar data from the transducer array, the second receiving element is configured to receive a second sonar data from the transducer array, the third receiving element is configured to receive a third sonar data from the transducer array, and the fourth receiving element is configured to receive a fourth sonar data from the transducer array.

Abstract: An alarm system with a detecting device. The detecting device includes an ultrasonic sound wave transmitter and receiver. The transmitter transmits an ultrasonic sound, an object reflects the ultrasonic sound, and the receiver receives the ultrasonic sound. A distance is determined between the object and the detecting device and is stored. The detecting device continually determines the distance using the ultrasonic sound waves and if a different distance is detected, the detecting device triggers an alarm.

Abstract: Provided are a method and apparatus for transmitting sound waves in water. The method for transmitting sound waves in water includes generating a sound wave signal, and transmitting the sound wave signal in water, generating a compensation signal for preventing distortion due to water vibration in an audible frequency band, and simultaneously transmitting the compensation signal and the sound wave signal in water. Accordingly, an apparatus for receiving sound signals is not required, and direct contact between a human body and an apparatus for transmitting sound signals is not required, thereby improving convenience of use. In addition, even when a human body is constantly moving, a superior contact condition may be provided, and therefore sound waves may be more effectively transmitted to a user.

Abstract: Provided is a capacitive transducer having a wide frequency band width and an improved transmitting and receiving sensitivity, the capacitive transducer including an element including a plurality of cells: each of the plurality of cells including: a first electrode; a vibrating film including a second electrode, the second electrode being opposed to the first electrode with a gap; and a supporting portion that supports the vibrating film, in which the element includes a first cell and a second cell as the cell, the first cell including the vibrating film having a first spring constant, the second cell including the vibrating film having a second spring constant smaller than the first spring constant; and a distance between the first electrode and the second electrode of the first cell is smaller than a distance between the first electrode and the second electrode of the second cell.

Abstract: A radio-controlled wristwatch that determines whether or not illuminance of light irradiating a solar cell is high, using plural criteria but without directly measuring voltage or current. The wristwatch includes: a solar cell; a control circuit which stops operation under a predetermined condition; and an illuminance detection circuit which indicates illuminance of light irradiating the solar cell being higher than a given threshold value. The wristwatch switches the given threshold value between a first and a second value, larger than the first value, starts the control circuit in a stop state when a signal indicating that the illuminance is higher than the first value is output, receives a satellite signal containing time information from a satellite when a signal indicating that the illuminance is higher than the second value is output, and displays time corresponding to the time information contained in the received satellite signal.

Abstract: A test taking pacing device includes a presentation screen and a plurality of selectors for operating the pacing device. The pacing device is configured to operate in a watch mode and a test mode having a plurality of test mode sections. In the watch mode, the time of day is displayed on the presentation screen. In the test mode and for each test mode section, a title representing the name of a test section, a total time for completing the test section, and a countdown timer are displayed on the presentation screen. The pacing device is further configured to selectively start and pause the countdown timer in each test mode section, and to select between the various test mode sections.

Abstract: Push button for a timepiece for correcting the time display associated with a decompression valve within a single control device. It essentially includes a first push button return spring (10) followed by a second spring (13) arranged to bend and act as a valve spring.

Abstract: A thermally assisted write head having a plasmonic heating device. The plasmonic heating device has a plasmonic antenna located at an air bearing surface of the thermally assisted write head. The plasmonic antenna is constructed of an alloy that is sufficiently hard to withstand the processes such as ion milling and chemical mechanical polishing used to construct the plasmonic antenna. The plasmonic antenna is preferably constructed of AuX, where X is Cu, Ni, Ta, Ti, Zr or Pt having a concentration less than 5 atomic percent.

Abstract: A super-resolution optical recording medium (10) of the present invention includes: a medium information region (1) on which medium identification information is recorded; a content region (3) on which content information is recorded; and a blank region (2) provided between the medium information region (1) and the content region (3) and in which at least two tracks are provided so as to connect a train of prepits in the medium information region (1) and a train of prepits in the content region (3). No information is recorded on the blank region (2). With this arrangement, the present invention provides a super-resolution optical recording medium in which a region on which medium identification information is recorded and a region on which content information is recorded are different in track pitch and in which a reproduction error hardly occurs when reproduction shifts from the region on which the medium identification information is recorded to the region on which the content information is recorded.

Abstract: An optical information device is provided with a first scattering medium (9), a second scattering medium (10), a third scattering medium (11); a diffraction element (4) which generates a plurality of light beams; an objective lens (6) which guides, to the first scattering medium (9) and to the third scattering medium (11) out of the first scattering medium (9), the second scattering medium (10), and the third scattering medium (11), two light beams out of the plurality of the light beams; and an arithmetic circuit (17) which detects a gap interval between the first scattering medium (9) and the third scattering medium (11), and an information medium (12), based on a change in an amount of reflected light from the first scattering medium (9) and from the third scattering medium (11).

Abstract: A recording apparatus, which records information in an optical recording medium, includes: a mode-lock laser unit including a saturable absorber section that applies a bias voltage, a gain section that feeds a gain current, a semiconductor laser that emits laser light used to record the information on the optical recording medium, and an external resonator; an optical modulation unit performing amplification modulation on the laser light emitted from the mode-lock laser unit; a reference signal generation unit generating a master clock signal and supplying a signal synchronized with the master clock signal to the gain section of the semiconductor laser; a recording signal generation unit generating a recoding signal based on the master clock signal; and a driving circuit generating a driving pulse used to drive the optical modulation unit based on the recording signal.

Abstract: A machine readable information storage medium, a reproducing method and apparatus which reproduces data from the storage medium, and a recording method and apparatus for recording data on the storage medium. The information storage medium includes a control area which stores within a data structure information usable by the recording or reproducing apparatus to record or reproduce the data on or from the storage medium. The information stored within the data structure includes a version corresponding to a specification, a revision number of recording speed, and an extended part version field.

Abstract: A machine readable information storage medium, a reproducing method and apparatus which reproduces data from the storage medium, and a recording method and apparatus for recording data on the storage medium. The information storage medium includes a control area which stores within a data structure information usable by the recording or reproducing apparatus to record or reproduce the data on or from the storage medium. The information stored within the data structure includes a version corresponding to a specification, a revision number of recording speed, and an extended part version field.