Abstract: A P-type Metal-Oxide-Semiconductor Field Effect Transistor (PMOSFET) includes a gate, a first source/drain region connected to the gate, and a second source/drain region on an opposite side of the gate than the first source/drain region. A first Schottky diode includes a first anode connected to the first source/drain region, and a first cathode connected to a body of the PMOSFET. A second Schottky diode includes a second anode connected to the second source/drain region, and a second cathode connected to the body of the PMOSFET.

Abstract: This invention relates to radiation hardened charge pumps for electronic circuitry.

Abstract: Some embodiments of the present disclosure relate to a sensor interface module having a linearization module that increase a size of a linear region of a current output from a high-side current source. The disclosed sensor interface module has a reference voltage source configured to generate a reference signal. An output driver stage having a high-side current source and a low-side current source is connected in series at an output node of the sensor interface module. A closed control loop configured to receive the reference signal and to generate a digital control signal that drives the high-side current source. A linearization module configured to operate the low-side current source to approximate a nonlinearity of the high-side current source and to use the approximated nonlinearity to generate a compensation function that mitigates nonlinearities in the high side current source.

Abstract: An integrated circuit includes a first internal voltage generation unit configured to generate a first voltage and output the first voltage through an internal voltage terminal in an active operation period, a second internal voltage generation unit configured to generate a second voltage and output the second voltage through the internal voltage terminal in an initial section of a standby operation period, and a third internal voltage generation unit configured to generate a third voltage and output the third voltage through the internal voltage terminal in the remaining section of the standby operation period.

Abstract: A semiconductor integrated circuit includes a first internal voltage generator including a PMOS and a first comparator, and a second internal voltage generator including an NMOS, a second comparator, and a voltage pump generator configured to provide a pumping power voltage to the second comparator. A power control circuit switchably enables an output from the first internal voltage generator during a power-on of the semiconductor integrated circuit and enables an output from the second internal voltage generator after the power-on.

Abstract: A circuit arrangement includes a first semiconductor device having a load path and a number of second semiconductor devices. Each second semiconductor device has a control terminal and a load path between a first load terminal and a second load terminal. The second semiconductor devices have their load paths connected in series and connected in series with the load path of the first semiconductor device. Each of the second semiconductor devices has a load terminal of one of the first semiconductor device and of one of the second semiconductor devices associated thereto and a voltage limiting element coupled between the control terminal of one of the second semiconductor devices and the load terminal associated with that one of the second semiconductor devices.

Abstract: This invention discloses a double Through Silicon Via (TSV) structure, including a first die unit, a first signal path, a second signal path, a receiving unit and a second die unit. The first and the second signal paths respectively include a driving unit and a TSV unit. Each driving unit includes a first end, a second end and a third end. The invention divides the signal paths of the conventional double TSV into two different signal paths by two driving units and the receiving unit having OR gate or NOR gate, to avoid generating the problem of signal degradation from the TSV unit with short defect. The invention further disposes a first switch unit, a second switch unit, a first exchange unit, a second exchange unit, a first VDD keeper and a second VDD keeper, to avoid generating the problems of open defect and leakage current.

Abstract: According to one embodiment, a semiconductor device includes chips and a first selection circuit. Each of the chips has at least first and second vias for transmitting at least first and second address signals, these chips are stacked to be electrically connected via the first and second vias. The first selection circuit is provided in each chip, includes a logic circuit that selects a chip based on at least the first and second address signals, and supplies a result of operating the first and second address signals to the subsequent chip.

Abstract: A method includes demodulating a load modulated signal at an initiator device based at least partially on a phase adjusted comparison value corresponding to the load modulated signal.

Abstract: An amplifier provides a first amplifier circuit (16), a second amplifier circuit (17), a first hybrid-coupler circuit (18) and a termination (3). The hybrid-coupler circuit (18) provides an output terminal (13) and an insulation terminal (12). In this context, the termination (3) is connected to the insulation terminal (12) of the hybrid-coupler circuit (18). The termination (3) comprises a first capacitor (34) and/or an inductance (35), which is disposed directly at the insulation terminal (12) of the hybrid-coupler circuit (18).

Abstract: A switch mode power supply converter and a parallel amplifier are disclosed. The switch mode power supply converter is coupled to a modulated power supply output and the parallel amplifier has a parallel amplifier output coupled to the modulated power supply output. Further, the parallel amplifier has a group of output stages, such that each output stage is directly coupled to the parallel amplifier output and each output stage receives a separate supply voltage.

Abstract: A power amplifier circuit, comprising: an amplifier for receiving an input signal to be amplified; a power input for coupling the amplifier to a power supply; and a transformer for providing the amplified signal from the amplifier to a load, comprising a primary inductor and a secondary inductor. The power amplifier circuit is characterized by: a first capacitor coupled in parallel with the primary inductor; and a second capacitor coupled in parallel with the secondary inductor; wherein at least one of the first and second capacitors has a variable capacitance.

Abstract: A pop-free single-ended output class-D amplifier includes: an input signal generator for generating an input signal; a power supply for supplying input power; a reference voltage generator for generating a reference voltage; a gain-adjustable stage for generating an amplified signal according to the reference voltage and adjusting a gain of the single-ended output class-D amplifier; a pulse width modulation module for outputting a pulse width modulation signal according to the reference voltage, the amplified signal, and the input power; a low-pass filter for low-pass filtering the pulse width modulation signal to generate an output voltage; and a logic controller for generating at least one control signal to control the reference voltage generator, the gain-adjustable stage, and the pulse width modulation module according to the input power, the reference voltage, and the pulse width modulation signal.

Abstract: A generator for use with an electrosurgical device is provided. The generator has a gain stage electrically disposed between a first voltage rail and a second voltage rail, wherein the gain stage includes an input and an output. A voltage source operably coupled to the gain stage input and configured to provide an input signal thereto responsive to a drive control signal is also provided. The generator also has one or more sensors configured to sense an operational parameter of the amplifier and to provide a sensor signal corresponding thereto and a controller adapted to receive the sensor signal(s) and in response thereto provide a drive control signal to the voltage source.

Abstract: According to an embodiment, a chip card is provided comprising a signal source configured to generate a signal to be transmitted via radio, a p-channel field effect transistor and being coupled with its source terminal to an upper supply potential and with its drain terminal to a common node; an n-channel field effect transistor and being coupled with its drain terminal to the common node and with its source terminal to a lower supply potential; an operational amplifier having a positive input terminal, a negative input terminal and an output terminal, wherein the positive input terminal is coupled to the common node, the negative input terminal is coupled to the signal source and the output terminal is coupled to the gate terminal of the p-channel field effect transistor and to the gate terminal of the n-channel field effect transistor; and an antenna coupled to the common node.

Abstract: A highly reliable circuit is realized using the transistors having a lower withstand voltage. There are provided a differential pair including a first and a second transistor which respectively receive input signals having mutually reversed phases; a third and a fourth transistor respectively cascode-coupled to the first and the second transistor, and having the same conductivity type as the first and the second transistor; a first and a second output terminal coupled to respective drains of the third and the fourth transistor; and a voltage divider circuit which divides an intermediate potential between respective potentials of the first and the second output terminal and supplies the divided potential to gates of the third and the fourth transistor.

Abstract: Embodiments of the present disclosure may provide a relaxation oscillator with improved performance against phase noise error. The phase noise error may be reduced from sources whose power is greater at lower frequencies. To reduce the noise error, the relaxation oscillator may include chopping in the charging current driver; chopping in the trigger level generator; and/or chopping in the currents that feed the cells. A chopped amplifier may be provided to perform chopping of the input signals.

Abstract: A decision feedback equalizer is disclosed. The decision feedback equalizer comprises an amplifier circuit and a latch. The amplifier circuit is configured to receive an input signal, a decision feedback signal and a control signal, and is configured to adjust its driving capability according to the decision feedback signal and the control signal to provide an amplified signal of the input signal. The latch is configured to latch the amplified signal as an output signal.

Abstract: An input/output sense amplifier includes: a data input unit configured to amplify data using a driving voltage and to output the amplified data, and a latch unit configured to latch and output an output signal of the data input unit to an output terminal.

Abstract: A circuit for providing signal amplification with reduced fixed pattern noise. In an embodiment, the circuit includes an amplifier and a plurality of legs coupled in parallel with one another between a first node for an input of the amplifier and a second node for an output of the amplifier. Control logic selects a first combination of the plurality of legs for a first configuration of the circuit to provide a first loop gain with the amplifier. In another embodiment, the control logic further selects a second combination of the plurality of legs for a second configuration of the circuit to provide a second loop gain with the amplifier, wherein the first loop gain is substantially equal to the second loop gain.

Abstract: A temperature compensation circuit is adapted to be used in an electronic device including a processing circuit. The temperature compensation circuit includes a thermistor, a compensation capacitor and a compensation diode. The thermistor has two ends, one of which is adapted to be electrically connected to the processing circuit. The compensation capacitor has two ends, one of which is electrically connected to the other one of the two ends of the thermistor. The compensation diode has an anode electrically connected to the other one of the two ends of the compensation capacitor, and a cathode to be grounded. The impedance of the thermistor varies with temperature so as to compensate and stabilize an output of the electronic device.

Abstract: A Doherty amplifier having a main amplifier branch and one or more peak amplifier branches, where the functionality and structure of the cascade of the main output matching network, the main offset line, and the quarter-wave transformer of the main amplifier branch of a conventional Doherty amplifier are subsumed into the main output matching network of the main amplifier branch, and the functionality and structure of each cascade of the peak output matching network and the peak offset line of each peak amplifier branch of a conventional Doherty amplifier are subsumed into the peak output matching network of the corresponding peak amplifier branch. Furthermore, the output quarter-wave transformer can be replaced by a wideband node matching network that does not have to perform frequency inversion.

Abstract: According to one embodiment, a circuit comprises a Capacitive Trans-Impedance Amplifier (CTIA) configured to receive a current pulse at an input and convert the current pulse to a voltage step. The voltage step is directed to a first signal path and a second signal path. When the voltage step exceeds a first threshold, the first signal path directs an enable pulse to the second signal path. The second signal path generates an output pulse when the voltage step exceeds a second threshold and the enable pulse is enabled. The second signal path comprises a first, a second, and a third amplifier to increase detection of the voltage step by the second signal path.

Abstract: A system and method for operating a power amplifier comprising the steps of determining a first impedance generated by a first amplifier component of the power amplifier, determining a second impedance generated by a second amplifier component of the power amplifier, and, adjusting the first impedance or the second impedance to an optimal impedance condition by altering a current ratio of a current delivered by the first amplifier component and a current delivered by the second amplifier component.

Abstract: In accordance with an embodiment, a system includes a first amplifier and a first bandpass filter having an input coupled in series with an output of the first amplifier, and an output configured to be coupled to a load. The bandpass filter has a lower input impedance at an in-band center frequency than at out-of-band frequencies, and the first amplifier is configured to receive a pulse width modulated waveform filtered according to a first transfer function that attenuates sidebands of the pulse width modulated waveform.

Abstract: A synthesizer architecture, responsive to a low noise reference signal from a discrete oscillator, provides a continuous periodic output with a period that is a fractional multiple of the low noise reference signal. One exemplary embodiment includes a phase detector providing a control signal to a selected one of a plurality of integrated voltage controlled oscillators (VCO), wherein the phase detector is a sub-harmonic continuous time sampling phase detector. Another exemplary embodiment includes a continuous fractional divider input to the phase detector in response to an output of the selected VCO. Yet another exemplary embodiment comprises an injection locked ring oscillator responsive to the low noise narrow band variable reference signal with a fractional output period.

Abstract: A method and apparatus is disclosed herein for testing of multiple ring oscillators. In one embodiment, the apparatus comprises at least one ring oscillator structure having a ring oscillator having an inverter chain with an odd number of inverters connected back-to-back and operable to produce an oscillatory output, and a test structure coupled to provide either an observability chain input or a test input to the ring oscillator and to receive the oscillatory output as a feedback from the ring oscillator.

Abstract: A semiconductor device package having reduced form factor and a method for forming said semiconductor device are disclosed. In an embodiment, an active die is embedded within a cavity in the core layer of the package substrate, wherein an in-situ electromagnetic shield is formed on the sidewalls of the cavity. In another embodiment, a crystal oscillator is at least partially embedded within the core layer of the package substrate. In another embodiment, a package having a component embedded in the core layer is mounted on a PCB, and a crystal oscillator generating a clock frequency for the package is mounted on the PCB. By embedding components within the core or removing components from the package to be mounted directly on the PCB, the x, y, and z dimensions of a package may be reduced. In addition, in-situ electromagnetic shield may reduce EM noise emitted from the active die.

Abstract: In an example, a chip-scale atomic clock physics package is provided. The physics package includes a body defining a cavity having a base surface and one or more side walls. The cavity includes a first step surface and a second step surface defined in the one or more side walls. A first scaffold mounted to the base surface in the cavity. One or more spacers defining an aperture therethrough are mounted to the second step surface in the cavity. A second scaffold is mounted to a first surface of the one or more spacers spans across the aperture of the one or more spacers. A third scaffold is mounted to a second surface of the one or more spacers in the cavity and spans across the aperture of the one or more spacers. Other components of the physics package are mounted to the first, second, and third scaffold.

Abstract: Resistor bias circuitry is included in components of an XTAL oscillator system to reduce 1/f noise. An XTAL oscillator includes a resistor bias circuit attached to the XTAL core. A common mode feedback OP amp connected to the XTAL core also includes a resistor bias circuit. An XTAL oscillator chain includes an XTAL core, common mode feedback OP amp, common mode logic buffer (CML BF), and differential to CMOS converter (D2C) each with resistor bias circuitry.

Abstract: According to one embodiment, a switching unit switches between a first state in which the current source is connected to a first capacitance element and a ground electric potential is connected to a second capacitance element and a second state in which a current source is connected to the second capacitance element and the ground electric potential is connected to the first capacitance element. A comparison unit compares a voltage charged in the first capacitance element and a reference voltage with each other in the first state and compares a voltage charged in the second capacitance element and the reference voltage with each other in the second state. A generation unit generates a periodical pulse based on a comparison result acquired by the comparison unit. The switching unit alternately switches between the first state and the second state based on the comparison result acquired by the comparison unit.

Abstract: The present invention is related to a filtering device with slotted ground structure, comprising a first substrate, a second substrate and a pair of differential signal lines, in which a ground plane having slotted ground structure is provided between the first substrate and the second substrate. Each of the two differential signal lines is symmetric to each other and comprises a first line segment being horizontally provided on the top surface of the first substrate and a second line segment being horizontally provided on the bottom surface of the second substrate, respectively. The first line segment is connected to the second line segment through a vertically disposed conductive via. Thereby, a common-mode noise within a specific frequency band may be suppressed effectively, so as to avoid interference a differential-mode signal transmitted on the differential signal lines, due to the slotted ground structure etched on the ground plane.

Abstract: A signal transmission circuit may include a main driving unit configured to drive a first signal transmission line with given driving force in response to a first input signal, and a crosstalk cancellation unit configured to differentiate a signal transferred through a second signal transmission line, which is adjacent to the first signal transmission line, and incorporate a differentiated value into the first signal transmission line.

Abstract: A switch is disclosed for selecting a port. The switch includes a dielectric layer, a first circuit, and a second circuit. The first and second circuits are disposed on the dielectric layer and electrically coupled to each other through the dielectric layer. The first circuit includes a set of ports. The switch further includes a control port for receiving a control signal and a plurality of switching elements. The control signal selects at least one of the set of ports to be connected to the second circuit by setting operational states of the plurality of switching elements.

Abstract: A switching circuit is provided. The switching circuit includes at least one Surface Acoustic Wave (SAW) filter, a Single-Pole n Throw (SPnT) switch connected to an input port of each of the at least one SAW filter, and a Dual-Pole n Throw (DPnT) switch connected to an output port of each of the at least one SAW filter.

Abstract: Disclosed herein is a thin film type common mode filter including: a base substrate made of an insulating material; a first insulating layer formed on the base substrate; a coil-shaped internal electrode formed on the first insulating layer; a second insulating layer formed on the internal electrode; an external electrode terminal having a vertical section connected to a side surface of the internal electrode and a horizontal section extended from an upper end of the vertical section toward a horizontal direction to thereby form a parallel surface spaced apart from the internal electrode by a predetermined distance; and a ferrite resin layer formed between the horizontal section of the external electrode terminal and the internal electrode.

Abstract: In a filter, a plurality of coils include a plurality of line conductor layers that are each provided on an insulator layer, a plurality of via hole conductors that extend from one end of the line conductor layers in the y-axis direction to the negative direction side of the z-axis direction, and are electrically connected to a plurality of capacitor conductor layers, and a plurality of via hole conductors that extend from the other end of the line conductor layers in the y-axis direction to the negative direction side of the z-axis direction, and are electrically connected to a ground conductor layer. The distance between the via hole conductor layers connected to the ground conductor layer differs from the distance between the via hole conductor layers connected to the capacitor conductor layers.

Abstract: A filter assembly is provided. The filter assembly includes a printed circuit board (PCB) including a plurality of electronic components, a base disposed under the PCB, and an inductor coupled to the base, the inductor including a core and a coil to which current is applied, wherein the PCB has a through-hole through which at least one portion of the coil pass.

Abstract: An electromagnetic interference filter for various electronic devices such as implantable medical devices is provided. A plurality of signal electrodes can be configured in an array, where each signal electrode extends vertically from a top surface to a bottom surface of the filter such that the signal electrodes are flush with the top and bottom surface. Ground or common electrodes can have a parallel arrangement and be interposed between the signal electrodes. The ground electrodes can be grounded internally, externally, or both internally and externally. Dielectric material can be disposed between signal electrodes and ground electrodes to act as an insulator between adjacent electrodes.

Abstract: Systems and methods for manufacturing a chip comprising a MEMS-based radio frequency filter arranged in an integrated circuit are provided. In one aspect, the systems and methods provide for a chip including electronic elements formed on a semiconductor material substrate. The chip further includes a stack of interconnection layers including layers of conductor material separated by layers of dielectric material. A radio frequency filter is formed within the stack of interconnection layers by applying gaseous HF to the interconnection layers. The radio frequency filter includes a plurality of mechanically decoupled resonator elements.

Abstract: A suspended line resonator and a tunable filter comprising multiple suspended line resonators. A microstrip resonator and a tunable filter comprising multiple microstrip resonators. A suspended substrate resonator and a tunable filter comprising multiple suspended substrate resonators.

Abstract: The differential output of a Programmable Gain Amplifier (PGA) is loaded by the input differential gate capacitance of a plurality of Analog to Digital converters (ADC) comparators and the differential metal layer traces to interconnect these comparators to the PGA. The differential capacitive load presented to the PGA is quite large and reduces the bandwidth of this interconnect between the PGA and ADC. To overcome the performance degradation due to the differential capacitive load, an active negative-capacitor circuit cancels the effect of the large input capacitance of the ADC comparators. This cancellation extends the gain characteristics of the interconnect between the PGA's output and the inputs of the first stage of the comparators. The active negative-capacitance is comprised of a cross pair NMOS with a capacitor connecting their sources where each NMOS is biased by a current source.

Abstract: A method of compensating for loss of a high-speed broadband signal may include receiving a high-speed broadband signal. The method may also include at least partially compensating for a low-frequency loss associated with a low-frequency component of the high-speed broadband signal. The compensation for the low-frequency loss may be based on a transfer function that may include a pole with a pole-frequency associated with the low-frequency component of the high-speed broadband signal.

Abstract: A circuit breaker having a movable contact arm for opening and closing the circuit which is controlled separately by a circuit breaker mechanism for circuit protection and by a switch lever mechanism which does not require actuation of the circuit breaker mechanism to function. The switch lever may be activated by a solenoid or other suitable means, and various interlocking mechanical states exist among the elements that provide added safety features.

Abstract: An electromagnetic relay including at least one contact-set support in which a plurality of contact springs are fixed at the base end and, in pairs, form normally open and/or normally closed contacts, wherein at least one actuator acts on each active contact spring, the actuator being movably driven in the longitudinal direction thereof by a magnet system and having actuating surfaces for acting on the respective contact spring to be actuated, the actuating surfaces assigned to each of the active contact springs forming an angle with the direction of actuation of the actuator.

Abstract: An electromagnetic contactor has a pair of fixed contacts disposed maintaining a predetermined interval and a movable contact disposed to be capable of connecting to and separating from the pair of fixed contacts; and an electromagnet unit that drives the movable contact. The electromagnet unit includes a magnetic yoke enclosing a plunger drive portion; a movable plunger in which a leading end is protruding through an aperture formed in the magnetic yoke, and urged by a return spring; and an annular permanent magnet enclosing a peripheral flange portion formed on a protruding end side of the movable plunger, and magnetized in a moving direction of the movable plunger.

Abstract: An electromagnetic relay including an electromagnet, a movable contact actuated by the electromagnet, and a fixed contact disposed opposite to the movable contact and capable of contacting and separating from the movable contact. The electromagnetic relay further includes a backstop for stopping movement of the movable contact in a direction separating from the fixed contact, and a backstop positioner for setting the backstop at a position for defining a predetermined contact gap between the fixed contact and the movable contact. In a state where movement of the movable contact is stopped by the backstop, different-sized contact gaps are defined between the fixed contact and the movable contact, depending on the position of the backstop set by the backstop positioner.

Abstract: An electromagnetic contactor has a contact device including a pair of fixed contacts disposed maintaining a predetermined distance and a movable contact disposed to be capable of contacting to and separating from the pair of fixed contacts. The pair of fixed contacts each includes a support conductor portion supported by an upper plate of a contact housing case, and a contact conductor portion connected to an end portion of the support conductor portion. The contact conductor portion includes a contact plate portion formed with a contact portion, and a connecting plate portion formed on an outer end portion of the contact plate portion and extending to the upper plate side. The movable contact is mounted onto a connecting shaft connected to a drive portion through a contact spring on an end portion on the upper plate side, and disposed to face the contact portion of the pair of fixed contacts.

Abstract: An electromagnetic actuator device has a coil unit (28, 58) enclosing a first yoke section (16, 56) of a stationary yoke unit (10, 54), an armature unit (14, 64) movably guided relative to the yoke unit (10, 54), by energisation to interact with a positioning partner on the output side of the armature unit (14, 64) and permanent magnetic agents (22, 36, 68) coupled into a magnetic flux circuit of the yoke unit (10, 54) wherein de-energisation of the coil unit (28, 58) a permanent magnetic flux circuit through the yoke unit (10, 54) and a section of the armature unit (14, 64) that is free of permanent magnetic flux and energisation displaces the permanent magnetic flux, out of the section, wherein the armature unit (14), by spring force is pre-loaded in a direction opposed to permanent magnetic retaining force of the armature unit (14, 64) and the positioning partner is a combustion engine unit.

Abstract: A magnetic assembly for use in a housing of an electronic device can include a first and a second magnet and a magnetic shield. The magnetic shield can reduce magnetic flux density from the first and the second magnets that can appear on the outside of the housing. A magnetic hinge assembly can include magnets configured to correlate with the first and second magnets. The magnetic hinge can magnetically attach to the housing by cooperating with the first and second magnets with magnets that can be included in the magnetic hinge.