Patents Issued in April 1, 2014
  • Patent number: 8686355
    Abstract: A detection system assembly is provided. The detection system assembly includes a detector system including a housing having a sample port configured to receive a sample of an unknown substance, a detector assembly in flow communication with the sample port, and a pump in flow communication with the detector assembly. The detection system assembly further includes a dryer cartridge removably coupled to an outer surface of the housing of the detector system. The dryer cartridge is in flow communication with the pump and the detector assembly.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: April 1, 2014
    Assignee: Morpho Detection, LLC
    Inventors: Michael Edgar Patterson, Matthew Edward Knapp
  • Patent number: 8686356
    Abstract: Apparatus and methods are provided that enable the interaction of low energy electrons and positrons with sample ions to facilitate electron capture dissociation (EGO) and positron capture dissociation (PGO), respectively, within multipole ion guide structures. The apparatus and methods described herein allow EGO (and PCO) to be performed within multipole ion guides, either alone, or in combination with conventional ion fragmentation methods.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: April 1, 2014
    Assignee: PerkinElmer Health Sciences, Inc.
    Inventors: Craig M. Whitehouse, David G. Welkie, Gholamreza Javahery, Lisa Cousins, Sergey Rakov
  • Patent number: 8686358
    Abstract: Methods and apparatus are provided herein for time-resolved analysis of the effect of a perturbation (e.g., a light or voltage pulse) on a sample. By operating in the time domain, the provided method enables sub-microsecond time-resolved measurement of transient, or time-varying, forces acting on a cantilever.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: April 1, 2014
    Assignee: University of Washington through its Center for Commercialization
    Inventors: David Ginger, Rajiv Giridharagopal, David Moore, Glennis Rayermann, Obadiah Reid
  • Patent number: 8686359
    Abstract: The present invention relates to methods and systems for 4D ultrafast electron microscopy (UEM)—in situ imaging with ultrafast time resolution in TEM. Single electron imaging is used as a component of the 4D UEM technique to provide high spatial and temporal resolution unavailable using conventional techniques. Other embodiments of the present invention relate to methods and systems for convergent beam UEM, focusing the electron beams onto the specimen to measure structural characteristics in three dimensions as a function of time. Additionally, embodiments provide not only 4D imaging of specimens, but characterization of electron energy, performing time resolved electron energy loss spectroscopy (EELS).
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: April 1, 2014
    Assignee: California Institute of Technology
    Inventor: Ahmed H. Zewail
  • Patent number: 8686360
    Abstract: As sample sizes have decreased to microscopic levels, it has become desirable to establish a method for thin film processing and observation with a high level of positional accuracy, especially for materials which are vulnerable to electron beam irradiation. The technological problem is to judge a point at which to end FIB processing and perform control so that the portion to be observed ends up in a central portion of the thin film. The present invention enables display of structure in cross-section by setting a strip-like processing region in an inclined portion of a sample cross-section and enlarging the display of the strip-like processing region on a processing monitor in a short-side direction. It is then possible to check the cross-sectional structure without additional use of an electron beam. Since it is possible to check the processed section without using an electron beam, electron beam-generated damage or deformation to the processed section is avoided.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: April 1, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventor: Tsuyoshi Ohnishi
  • Patent number: 8686361
    Abstract: A method for manufacturing a radiation detection apparatus is provided. The method comprising: forming a set of columnar crystals capable of converting radiation into visible light on a base; forming a supporting layer that supports the set of columnar crystals; separating the set of columnar crystals supported by the supporting layer from the base; preparing a sensor panel having a photoelectric conversion unit; and adhering a surface of the set of columnar crystals, that surface having been in contact with the base, to the sensor panel using an adhesive material, such that the set of columnar crystals covers the photoelectric conversion unit.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: April 1, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keiichi Nomura, Satoshi Okada, Kazumi Nagano, Yohei Ishida, Tomoaki Ichimura, Yoshito Sasaki
  • Patent number: 8686362
    Abstract: A millimeter wavelength (MMW) measurement system for remote detection of object characteristics and methods for detecting such characteristics. The MMW measurement system comprises a front-end and an optional signal conditioning component. The MMW front-end includes an oscillator, a transceiver portion, and an antenna for focusing a detection component comprising micrometer level wavelength electromagnetic radiation onto the object. A portion of the electromagnetic radiation reflected by the object is received by the MMW measurement system, which is indicative of a displacement of the object. The MMW system may be configured to detect micrometer level displacement of the object disposed tens of meters from the MMW measurement system. In various embodiments the object may be a natural object, including a human, and the displacement may be indicative of a heart rate and/or a respiratory function.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: April 1, 2014
    Assignee: UChicago Argonne, LLC
    Inventors: Sasan Bakhtiari, Nachappa Gopalsami, Thomas W. Elmer, Apostolos C. Raptis
  • Patent number: 8686363
    Abstract: A hyperspectral stimulated emission depletion (“STED”) microscope system for high-resolution imaging of samples labeled with multiple fluorophores (e.g., two to ten fluorophores). The hyperspectral STED microscope includes a light source, optical systems configured for generating an excitation light beam and a depletion light beam, optical systems configured for focusing the excitation and depletion light beams on a sample, and systems for collecting and processing data generated by interaction of the excitation and depletion light beams with the sample. Hyperspectral STED data may be analyzed using multivariate curve resolution analysis techniques to deconvolute emission from the multiple fluorophores. The hyperspectral STED microscope described herein can be used for multi-color, subdiffraction imaging of samples (e.g., materials and biological materials) and for analyzing a tissue by Förster Resonance Energy Transfer (“FRET”).
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: April 1, 2014
    Assignee: Sandia Corporation
    Inventors: Jerilyn A. Timlin, Jesse S. Aaron
  • Patent number: 8686364
    Abstract: Methods and systems for real time, in situ monitoring of fluids, and particularly the determination of both the energy content and contaminants in a gas or oil transmission facility, are provided. The system may include two separate scanning sources to scan two different, but overlapping, NIR ranges, or may involve two separate scans from a single scanning spectroscopy source. The first scan ranges from approximately 1550 nm up through 1800 nm and a second scan concurrently scans at a high resolution across a band from approximately 1560-1610 nm, the wavelength of interest for hydrogen sulfide (though similar scans are contemplated in alternative wavelength ranges for alternative contaminants). The second scan may provide very narrow (0.005 nm) step resolution over just the wavelength of interest for the contaminant and may scan at a substantially higher power level.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: April 1, 2014
    Assignee: JP3 Measurement, LLC
    Inventors: Joseph Paul Little, III, Matthew R. Thomas
  • Patent number: 8686365
    Abstract: Optical imaging structures and methods are disclosed. One structure may be implemented as an imaging pixel having multiple photodetectors. The photodetectors may detect different wavelengths of incident radiation, and may be operated simultaneously or at separate times. An imager may include an imaging array of pixels of the type described. Methods of operating such structures are also described.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: April 1, 2014
    Assignee: Infrared Newco, Inc.
    Inventors: Conor S. Rafferty, Anders Ingvar Aberg, Tirunelveli Subramaniam Sriram, Bryan D. Ackland, Clifford A. King
  • Patent number: 8686366
    Abstract: A method and apparatus for remotely detecting, locating, and identifying chemicals and chemical compounds through optically opaque materials. Electromagnetic radiation in the Terahertz range emitted from an antenna array is modulated to excite target molecules. The apparatus then stops the excitation energy and the molecules emit an electromagnetic signature detectable by the device at standoff distances.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: April 1, 2014
    Inventor: Richard Graziano
  • Patent number: 8686367
    Abstract: An apparatus includes a photodiode, a first and second storage transistor, a first and second transfer transistor, and a first and second output transistor. The first transfer transistor selectively transfers a first portion of the image charge from the photodiode to the first storage transistor for storing over multiple accumulation periods. The first output transistor selectively transfers a first sum of the first portion of the image charge to a readout node. The second transfer transistor selectively transfers a second portion of the image charge from the photodiode to the second storage transistor for storing over the multiple accumulation periods. The second output transistor selectively transfers a second sum of the second portion of the image charge to the readout node.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: April 1, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventor: Ashish A. Shah
  • Patent number: 8686368
    Abstract: A high resolution single photon emission computed tomography (SPECT) imaging system comprising: a rotating ring for surrounding anatomy which is to be imaged; at least one camera mount movably mounted to the rotating ring so that the camera mount can be moved radially relative to the axis of rotation of the rotating ring; and at least one gamma camera carried on the at least one camera mount, wherein the at least one gamma camera is focused on a single SPECT focal point; whereby, when the rotating ring is rotated about the anatomy which is to be imaged and the at least one camera mount is moved radially on the rotating ring, the single SPECT focal point of the at least one gamma camera carried by a camera mount follows a spiral pattern through the anatomy, whereby to produce a scan of the anatomy.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: April 1, 2014
    Assignee: NeuroLogica Corp.
    Inventors: Andrew Tybinkowski, Eric Bailey, Lidia Nemirovsky, Daniel Allis
  • Patent number: 8686369
    Abstract: The present invention relates to imaging devices. Technical solutions—creation of highly manufacturable assemblage of flat panel x-ray detectors, and providing high quality images. The flat panel x-ray detector comprises a light-blocking split housing consisting of a bottom and top parts; in the housing sequentially along the incident radiation pathway are installed an elastic radiotransparent layer, x-ray screen on the substrate and sensors being fastened to the mounting base. Sensors are fastened on the mounting base with a possibility to be removed with a possibility to be removed by means of additionally set on the sensor substrates intermediate elements. To fix the screen it is additionally introduced a bar inside which the edge of said screen substrate is fixed, and the bar is fastened to mounting base with a possibility to be removed.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: April 1, 2014
    Assignee: Zakrytoe akcionernoe obshchestvo “Impul's”
    Inventors: Vol'demar Osval'dovich Reboni, Yury Arnol'dovich Veip, Vitaly Valer'evich Jurenja, Yury Gennad'evich Leont'ev
  • Patent number: 8686370
    Abstract: A method is disclosed for in-situ monitoring of an EUV mirror to determine a degree of optical degradation. The method may comprise the steps/acts of irradiating at least a portion of the mirror with light having a wavelength outside the EUV spectrum, measuring at least a portion of the light after the light has reflected from the mirror, and using the measurement and a pre-determined relationship between mirror degradation and light reflectivity to estimate a degree of multi-layer mirror degradation. Also disclosed is a method for preparing a near-normal incidence, EUV mirror which may comprise the steps/acts of providing a metallic substrate, diamond turning a surface of the substrate, depositing at least one intermediate material overlying the surface using a physical vapor deposition technique, and depositing a multi-layer mirror coating overlying the intermediate material.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: April 1, 2014
    Assignee: Cymer, LLC
    Inventors: Norbert R. Bowering, Oleh V. Khodykin
  • Patent number: 8686371
    Abstract: This is a way interrogating an object using retro-reflection of non-visible light. It uses e.g. IR transmitted toward the object from a distance and covertly detects the retro-reflection. Highly reflective passive non-visible light retroreflectors on the object reflects and refracts light back toward the light transmitter, with the returned light being very nearly parallel to the light from a narrow beam light transmitter.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: April 1, 2014
    Assignee: Tia Systems, Inc.
    Inventors: Robert Bernath, Richard Stoltz, Jeff Bullington
  • Patent number: 8686372
    Abstract: Spatial acquisition of measurement data over a cross section of a high-energy, high-intensity radiation beam bundle without impairment of measuring accuracy due to saturation or degradation of detectors occurs by imaging an entire cross section of the beam bundle on a shading element, the cross section being separated successively into partial beam bundles having reduced cross sections and reduced intensity through movement of at least one opening, whereby measurement values of the partial beam bundles passing the opening are associated temporally and spatially with positions of the opening.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: April 1, 2014
    Assignee: USHIO Denki Kabushiki Kaisha
    Inventors: Thomas Missalla, Max Christian Schuermann, Denis Bolshukhin, Boris Tkachenko
  • Patent number: 8686373
    Abstract: An interactive display device is disclosed. The interactive display device comprises: a housing, a user interface surface which is coupled with the housing, a display panel which is disposed under the user interface surface, an area light detector which is disposed under the display panel and configured to detect invisible light reflected by an object which is on or adjacent to the user interface surface, a plane light guide plate which is disposed under the area light detector, and an invisible light source which is disposed at the side of the plane light guide plate. The interactive display device has small size and better appearance, and thus is easy to be transported and more competitive.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: April 1, 2014
    Assignee: Beijing Irtouch Systems Co., Ltd
    Inventors: Xinlin Ye, Zhenzhong Zou, Jianjun Liu, Xinbin Liu
  • Patent number: 8686374
    Abstract: The present invention provides a drawing apparatus including a generation device configured to generate drawing data, a blanking device configured to blank a beam, and a blanking controller includes a first storage device, a second storage device, and a third storage device configured to respectively store the drawing data generated by the generation device, and being configured to control operations of the first storage device, the second storage device, and the third storage device so that an operation of storing the drawing data generated by the generation device in a selected one of the first storage device and the second storage device, and an operation of reading out the drawing data stored in the other of the first storage device and the second storage device, and storing the readout drawing data in the third storage device are executed in parallel.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: April 1, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shinji Ohishi
  • Patent number: 8686375
    Abstract: An active detector and methods for detecting molecules, including large molecules such as proteins and oligonucleotides, at or near room temperature based on the generation of electrons via field emission (FE) and/or secondary electron emission (SEE). The detector comprises a semiconductor membrane having an external surface that is contacted by one or more molecules, and an internal surface having a thin metallic layer or other type of electron emitting layer. The kinetic energy of molecules contacting the semiconductor membrane is transferred through the membrane and induces the emission of electrons from the emitting layer. An electron detector, which optionally includes means for electron amplification, is positioned to detect the emitted electrons.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: April 1, 2014
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Robert H. Blick, Lloyd M. Smith, Michael Westphall, Hua Qin
  • Patent number: 8686376
    Abstract: A system for detecting a plurality of analytes in a sample includes an aperture array and a lens array for generating and focusing a plurality of excitation sub-beams on different sub-regions of a substrate. These sub-regions can be provided with different binding sites for binding different analytes in the sample. By detecting the different luminescent responses in a detector, the presence or amount of different analytes can be determined simultaneously. Alternatively or in addition, collection of the luminescence radiation can be performed using the lens array for directly collecting the luminescence response and for guiding the collected luminescence response to corresponding apertures. The excitation sub-beams may be focused at the side of the substrate opposite of the lens array, and an immersion fluid is provided between the lens array and the substrate to increase the collection efficiency of the luminescence radiation.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: April 1, 2014
    Assignee: Koninklijke Philips N.V.
    Inventors: Reinhold Wimberger-Friedl, Peter Dirksen, Marius Iosif Boamfa, Erik Martinus Hubertus Petrus Van Dijk
  • Patent number: 8686377
    Abstract: A single crystal synthetic CVD diamond material comprising: a growth sector; and a plurality of point defects of one or more type within the growth sector, wherein at least one type of point defect is preferentially aligned within the growth sector, wherein at least 60% of said at least one type of point defect shows said preferential alignment, and wherein the at least one type of point defect is a negatively charged nitrogen-vacancy defect (NV?).
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: April 1, 2014
    Assignee: Element Six Limited
    Inventors: Daniel James Twitchen, Matthew Lee Markham
  • Patent number: 8686378
    Abstract: A charged particle beam drawing apparatus includes an electrostatic lens including an electrode member and configured to project the plurality of charged particle beams onto the substrate via the electrode member. In the electrode member are formed a plurality of first openings via which the plurality of charged particle beams pass, and a plurality of second openings different from the plurality of first openings, a total area of the plurality of second openings being not smaller than a total area of the plurality of first openings.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: April 1, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shigeru Terashima
  • Patent number: 8686379
    Abstract: Systems for preparing solid samples for microscopic examination in cross section or planametric orientation. The sample preparation systems include a sample support, an excitation beam to remove material from the surface of the sample, and a beam shield that protects the sample from the excitation beam, where sequential vertical adjustment of the beam shield permits the selective exposure of a series of substantially planar sample surfaces.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: April 1, 2014
    Inventor: Joseph C. Robinson
  • Patent number: 8686380
    Abstract: The present invention provides a charged particle beam apparatus that keeps the degree of vacuum in the vicinity of the electron source to ultra-high vacuum such as 10?8 to 10?9 Pa even in the state where electron beams are emitted using a non-evaporable getter pump and is not affected by dropout foreign particles. The present invention includes a vacuum vessel in which a charged particle source (electron source, ion source, etc.) is disposed and a non-evaporable getter pump disposed at a position that does not directly face electron beams and includes a structure that makes the non-evaporable getter pump upward with respect to a horizontal direction to drop out foreign particles into a bottom in a groove, so that the foreign particles dropped out from the non-evaporable getter pump do not face an electron optical system.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: April 1, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Souichi Katagiri, Takashi Ohshima, Sho Takami, Makoto Ezumi, Takashi Doi, Yuji Kasai
  • Patent number: 8686381
    Abstract: A source-collector module (SOCOMO) for generating a laser-produced plasma (LPP) that emits EUV radiation, and a grazing-incidence collector (GIC) mirror arranged relative to the LPP and having an input end and an output end. The LPP is formed using an LPP target system having a light source portion and a target portion, wherein a pulsed laser beam from the light source portion irradiates Sn vapor from a Sn vapor source of the target portion. The GIC mirror is arranged relative to the LPP to receive the EUV radiation at its input end and focus the received EUV radiation at an intermediate focus adjacent the output end. A radiation collection enhancement device may be used to increase the amount of EUV radiation provided to the intermediate focus. An EUV lithography system that utilizes the SOCOMO is also disclosed.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: April 1, 2014
    Assignee: Media Lario S.R.L.
    Inventors: Richard Levesque, Natale M. Ceglio, Giovanni Nocerino, Fabio Zocchi
  • Patent number: 8686382
    Abstract: In an opto-isolator, a nontransparent hollow tube having a smooth inner surface with mirror-like qualities is used as the optical waveguide for coupling optical signals between the transmitter module and the receiver module and for providing electrical transient isolation.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: April 1, 2014
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Nikolaus W. Schunk, Joerg Meier
  • Patent number: 8686383
    Abstract: In order to enable high accuracy positioning and strong pressing of a substrate, the present invention provides a substrate holding apparatus including: a rotating bed having an inclined surface supporting a lower side of an outer circumferential side surface of the substrate, which bed rotates on a normal line of the substrate as the rotation axis together with the substrate; a position restriction unit rotating together with the rotating bed and restricting the substrate in a predetermined position on the rotating bed by pressing a plurality of points on the circumference on an upper side of the outer circumferential side surface of the substrate prior to the rotation; and a pressing unit rotating together with the rotating bed and pressing the substrate against the inclined surface by pressing a plurality of points on the upper side of the outer circumferential side surface of the substrate during the rotation.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: April 1, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Kazuhiro Zama, Koichi Asami, Yusuke Miyazaki
  • Patent number: 8686384
    Abstract: According to one embodiment, a memory device includes a nanomaterial assembly layer, a first electrode layer and a second electrode layer. The nanomaterial assembly layer is formed of an assembly of a plurality of micro conductors via gaps between the micro conductors. The first electrode layer is provided on the nanomaterial assembly layer. The second electrode layer is provided on the first electrode layer.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: April 1, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji A{dot over (o)}yama, Kazuhiko Yamamoto, Satoshi Ishikawa, Shigeto Oshino
  • Patent number: 8686385
    Abstract: The PCRAM device includes a semiconductor substrate including a switching device; an interlayer insulating layer having a heating electrode contact hole exposing the switching device, a heating electrode formed to be extended along a side of the interlayer insulating layer in the heating electrode contact hole, wherein the heating electrode has a width gradually increased toward a bottom of the heating electrode and is in contact with the switching device, first and second phase-change layers formed within the heating electrode contact hole that includes the heating electrode, and a phase-change separation layer formed in the heating electrode contact hole between the first and second phase-change layers.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: April 1, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jin Seok Yang, Ha Chang Jung
  • Patent number: 8686386
    Abstract: Embodiments of the invention include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. The electrical properties of the current limiting component are configured to lower the current flow through the variable resistance layer during the logic state programming steps by adding a fixed series resistance in the resistive switching memory element of the nonvolatile memory device. In some embodiments, the current limiting component comprises a varistor that is a current limiting material disposed within a resistive switching memory element in a nonvolatile resistive switching memory device.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: April 1, 2014
    Assignees: SanDisk 3D LLC, Kabushiki Kaisha Toshiba
    Inventors: Mihir Tendulkar, Imran Hashim, Yun Wang
  • Patent number: 8686387
    Abstract: A semiconductor memory device includes a cell array layer having a memory cell. The memory cell has a current control device, a variable resistance device and a metal layer for silicide. A method for manufacturing the semiconductor memory device includes: forming the metal layer for silicide on a semiconductor layer for forming the current control device and a variable resistance device layer; selectively removing the variable resistance device layer and the metal layer through first etching; forming a first protective layer to cover at least a side surface of the metal layer exposed by the first etching; selectively removing a part of the semiconductor layer, through second etching; and forming a second protective layer to cover the variable resistance device layer, the metal layer for silicide, and the semiconductor layer.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: April 1, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Jun Nishimura
  • Patent number: 8686388
    Abstract: A resistive sense memory cell includes a layer of crystalline praseodymium calcium manganese oxide and a layer of amorphous praseodymium calcium manganese oxide disposed on the layer of crystalline praseodymium calcium manganese oxide forming a resistive sense memory stack. A first and second electrode are separated by the resistive sense memory stack. The resistive sense memory cell can further include an oxygen diffusion barrier layer separating the layer of crystalline praseodymium calcium manganese oxide from the layer of amorphous praseodymium calcium manganese oxide a layer. Methods include depositing an amorphous praseodymium calcium manganese oxide disposed on the layer of crystalline praseodymium calcium manganese oxide forming a resistive sense memory stack.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: April 1, 2014
    Assignee: Seagater Technology LLC
    Inventors: Andreas Roelofs, Markus Siegert, Venugopalan Vaithyanathan, Wei Tian, Yongchul Ahn, Muralikrishnan Balakrishnan, Olle Heinonen
  • Patent number: 8686389
    Abstract: Provided are resistive random access memory (ReRAM) cells having diffusion barrier layers formed from various materials, such as beryllium oxide or titanium silicon nitrides. Resistive switching layers used in ReRAM cells often need to have at least one inert interface such that substantially no materials pass through this interface. The other (reactive) interface may be used to introduce and remove defects from the resistive switching layers causing the switching. While some electrode materials, such as platinum and doped polysilicon, may form inert interfaces, these materials are often difficult to integrate. To expand electrode material options, a diffusion barrier layer is disposed between an electrode and a resistive switching layer and forms the inert interface with the resistive switching layer. In some embodiments, tantalum nitride and titanium nitride may be used for electrodes separated by such diffusion barrier layers.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: April 1, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Yun Wang, Imran Hashim
  • Patent number: 8686390
    Abstract: Provided is a nonvolatile memory element achieving a stable resistance change and miniaturization, and a method of manufacturing the same. The nonvolatile memory element includes: a first electrode formed above a substrate; an interlayer insulating layer formed above the substrate including the first electrode and having a memory cell hole reaching the first electrode; a barrier layer formed in the memory cell hole and composed of a semiconductor layer or an insulating layer connected to the first electrode; a second electrode formed in the memory cell hole and connected to the barrier layer; a variable resistance layer formed on the second electrode and having a stacked structure whose resistance value changes based on electric signals; and a third electrode connected to the variable resistance layer and formed on the interlayer insulating layer to cover the memory cell hole.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: April 1, 2014
    Assignee: Panasonic Corporation
    Inventor: Takeshi Takagi
  • Patent number: 8686391
    Abstract: A method of manufacturing an electrode is provided that includes providing a pillar of a first phase change material atop a conductive structure of a dielectric layer; or the inverted structure; forming an insulating material atop dielectric layer and adjacent the pillar, wherein an upper surface of the first insulating material is coplanar with an upper surface of the pillar; recessing the upper surface of the pillar below the upper surface of the insulating material to provide a recessed cavity; and forming a second phase change material atop the recessed cavity and the upper surface of the insulating material, wherein the second phase change material has a greater phase resistivity than the first phase change material.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: April 1, 2014
    Assignee: International Business Machines Corporation
    Inventors: Alejandro G. Schrott, Chung H. Lam, Eric A. Joseph, Matthew J. Breitwisch, Roger W. Cheek
  • Patent number: 8686392
    Abstract: The semiconductor device includes a memory cell including a plurality of magnetoresistive elements disposed therein, and a peripheral circuit region disposed around the memory cell region. The magnetoresistive element includes a magnetization fixed layer, a magnetization free layer, and a tunneling insulation layer. The semiconductor device includes, above the magnetoresistive elements, a plurality of first wires extending in the direction along the main surface. In the peripheral circuit region, there is disposed a multilayer structure of lamination of a layer equal in material to the magnetization free layer, a layer equal in material to the tunneling insulation layer, and a layer equal in material to the magnetization fixed layer so as to overlap a second wire formed of the same layer as the first wire in plan view. The multilayer structure does not overlap both of a pair of adjacent second wires in plan view in the peripheral circuit region.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: April 1, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Keisuke Tsukamoto
  • Patent number: 8686393
    Abstract: An integrated circuit device may include a semiconductor substrate including an active region and a transistor in the active region. The transistor may include first and second spaced apart source/drain regions in the active region of the semiconductor substrate, and a semiconductor channel region between the first and second source/drain regions. The semiconductor channel region may include a plurality of channel trenches therein between the first and second source/drain regions. A gate insulating layer may be provided on the channel region including sidewalls of the plurality of channel trenches, and a gate electrode may be provided on the gate insulating layer so that the gate insulating layer is between the gate electrode and the semiconductor channel region including the plurality of channel trenches. Related methods are also discussed.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: April 1, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jihyung Yu, Daewon Ha, Song yi Kim
  • Patent number: 8686394
    Abstract: Some embodiments include methods of forming semiconductor constructions. Carbon-containing material is formed over oxygen-sensitive material. The carbon-containing material and oxygen-sensitive material together form a structure having a sidewall that extends along both the carbon-containing material and the oxygen-sensitive material. First protective material is formed along the sidewall. The first protective material extends across an interface of the carbon-containing material and the oxygen-sensitive material, and does not extend to a top region of the carbon-containing material. Second protective material is formed across the top of the carbon-containing material, with the second protective material having a common composition to the first protective material. The second protective material is etched to expose an upper surface of the carbon-containing material. Some embodiments include semiconductor constructions, memory arrays and methods of forming memory arrays.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: April 1, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Fabio Pellizzer, Cinzia Perrone
  • Patent number: 8686395
    Abstract: A bond type flip-chip light-emitting structure and method of manufacturing the same. Firstly, form a positive electrode and a negative electrode on an epitaxy layer. Next, deposit an insulation layer on parts of the positive electrode and negative electrode, to expose respectively a positive electrode via hole and a negative electrode via hole. Then, form a bonded metal layer on the insulation layer, the positive electrode via hole, and the negative electrode via hole, so that the positive electrode and the negative electrode are on a same plane by means of the bonded metal layer. Finally, on a substrate, bond the first metal layer and the second metal layer onto the corresponding first bonded metal unit and the second bonded metal unit of the bonded metal layer, to form into shape, thus realizing a bond type flip-chip light-emitting structure.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: April 1, 2014
    Assignee: Chang Gung University
    Inventors: Liann-Be Chang, Chen Xu, Kun Xu, Yunyun Zhang, How-Wen Chien
  • Patent number: 8686396
    Abstract: An ultra-violet light-emitting device and method for fabricating an ultraviolet light emitting device, 12, (LED or an LD) with an AlInGaN multiple-quantum-well active region, 10, exhibiting stable cw-powers. The device includes a non c-plane template with an ultraviolet light-emitting structure thereon. The template includes a first buffer layer, 321, on a substrate, 100, then a second buffer layer, 421, on the first preferably with a strain-relieving layer, 302, in both buffer layers. Next there is a semiconductor layer having a first type of conductivity, 500, followed by a layer providing a quantum-well region, 600. Another semiconductor layer, 700, having a second type of conductivity is applied next. Two metal contacts, 980 and 990, are applied to this construction, one to the semiconductor layer having the first type of conductivity and the other to the semiconductor layer having the second type of conductivity, to complete the light emitting device.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: April 1, 2014
    Assignee: Nitek, Inc.
    Inventor: Asif Khan
  • Patent number: 8686397
    Abstract: A light emitting diode structure of (Al,Ga,In)N thin films grown on a gallium nitride (GaN) semipolar substrate by metal organic chemical vapor deposition (MOCVD) that exhibits reduced droop. The device structure includes a quantum well (QW) active region of two or more periods, n-type superlattice layers (n-SLs) located below the QW active region, and p-type superlattice layers (p-SLs) above the QW active region. The present invention also encompasses a method of fabricating such a device.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: April 1, 2014
    Assignee: The Regents of the University of California
    Inventors: Shuji Nakamura, Steven P. DenBaars, Shinichi Tanaka, Daniel F. Feezell, Yuji Zhao, Chih-Chien Pan
  • Patent number: 8686398
    Abstract: A semiconductor light emitting device includes a first conductivity-type first semiconductor layer, a second conductivity-type second semiconductor layer, a semiconductor light emitting layer, and first and second electrodes. The semiconductor light emitting layer is provided between the first semiconductor layer and the second semiconductor layer, and includes a multiple quantum well structure. The quantum well structure includes well layers and barrier layers each laminated alternately, each of the well layers being not less than 6 nm and not more than 10 nm. The first and second electrodes are electrically connected to the first and second semiconductor layers such that current flows in a direction substantially vertical to the main surface.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: April 1, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Tanaka, Yoko Motojima
  • Patent number: 8686399
    Abstract: Disclosed are a growth substrate and a light emitting device. The light emitting device includes a silicon substrate, a first buffer layer disposed on the silicon substrate and having an exposing portions of the silicon substrate, a second buffer layer covering the first buffer layer and the exposed portions of the silicon substrate, wherein the second buffer layer is formed of a material causing a eutectic reaction with the silicon substrate, a third buffer layer disposed on the second buffer layer, and a light emitting structure disposed on the third buffer layer, and the second buffer layer includes voids.
    Type: Grant
    Filed: May 22, 2013
    Date of Patent: April 1, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Jeong Sik Lee
  • Patent number: 8686400
    Abstract: Disclosed herein is a light emitting device including a light emitting structure including a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer including at least one combination of a well layer of a first composition formed of a nitride-semiconductor material having first electronic energy and a barrier layer of a second composition formed of a nitride-semiconductor material having higher electronic energy than the first electronic energy, and an interface layer disposed between the second conductivity-type semiconductor layer and the active layer or between the first conductivity-type semiconductor layer and the active layer. The interface layer includes first, second and third layers having different energy bandgaps, the energy bandgaps of the first and second layers are greater than the energy bandgap of the barrier layer, and the energy bandgap of the third layer is less than the energy bandgap of the barrier layer.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: April 1, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Yong Tae Moon
  • Patent number: 8686401
    Abstract: Provided is a compact ultraviolet irradiation apparatus which is capable of emitting ultraviolet radiation with high efficiency. This ultraviolet irradiation apparatus includes, in a vessel, a semiconductor multi-layered film element and an electron beam irradiation source for irradiating the semiconductor multi-layered film element with an electron beam, the vessel being hermetically sealed to have a negative internal pressure and having an ultraviolet transmitting window. Furthermore, the semiconductor multi-layered film element includes an active layer having a single quantum well structure or a multi quantum well structure of InxAlyGa1-x-yN (0?x<1, 0<y?1, x+y?1), and the active layer of the semiconductor multi-layered film element is irradiated with an electron beam from the electron beam irradiation source. This allows the semiconductor multi-layered film element to emit ultraviolet radiation out of the vessel through the ultraviolet transmitting window.
    Type: Grant
    Filed: May 30, 2011
    Date of Patent: April 1, 2014
    Assignees: Kyoto University, Ushio Denki Kabushiki Kaisha
    Inventors: Yoichi Kawakami, Mitsuru Funato, Takao Oto, Ryan Ganipan Banal, Masanori Yamaguchi, Ken Kataoka, Hiroshige Hata
  • Patent number: 8686402
    Abstract: A TFET includes a source region (110, 210), a drain region (120, 220), a channel region (130, 230) between the source region and the drain region, and a gate region (140, 240) adjacent to the channel region. The source region contains a first compound semiconductor including a first Group III material and a first Group V material, and the channel region contains a second compound semiconductor including a second Group III material and a second Group V material. The drain region may contain a third compound semiconductor including a third Group III material and a third Group V material.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: April 1, 2014
    Inventors: Niti Goel, William Tsai, Jack Kavalieros
  • Patent number: 8686403
    Abstract: Disclosed is an organic light emitting device comprising a first electrode, two or more organic compound layers, and a second electrode, wherein the first electrode comprises a conductive layer and an n-type organic compound layer which is in contact with the conductive layer, one of the organic compound layers interposed between the n-type organic compound layer of the first electrode and the second electrode is a p-type organic compound layer forming an NP junction together with the n-type organic compound layer of the first electrode, energy levels of the layers satisfy the following Expressions (1) and (2), and one or more layers interposed between the p-type organic compound layer and the second electrode are n-doped with alkali earth metal: 0 eV<EnL?EF1?4 eV??(1) EpH?EnL?1 eV??(2) where EF1 is a Fermi energy level of the conductive layer of the first electrode, EnL is an LUMO (lowest unoccupied molecular orbital) energy level of the n-type organic compound layer of the first electrode, and EpH i
    Type: Grant
    Filed: January 19, 2009
    Date of Patent: April 1, 2014
    Assignee: LG Chem Ltd.
    Inventors: Min-Soo Kang, Se-Hwan Son, Jeoung-Kwen Noh
  • Patent number: 8686404
    Abstract: Electrodes in an organic thin film transistor based on single component organic semiconductors may be chemically modified to realize ambipolar transport. Electronic circuits may be assembled which include at least two such organic thin film transistors wherein at least one transistor is configured as a pmos transistor and at least on other transistor is configured as a nmos transistor.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: April 1, 2014
    Assignee: The Trustees of the University of Pennsylvania
    Inventors: Cherie Kagan, Sangameshwar Rao Saudari
  • Patent number: 8686405
    Abstract: A micromachine is generally formed using a semiconductor substrate such as a silicon wafer. One of the objects of the present invention is to realize further reduction in cost by integrating a minute structure and a semiconductor element controlling the minute structure over one insulating surface in one step. A minute structure has a structure in which a first layer formed into a frame-shape are provided over an insulating surface, a space is formed inside the frame, and a second layer is formed to cross over the first layer. Such a minute structure and a thin film transistor can be integrated over one insulating surface in one step.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: April 1, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mayumi Yamaguchi, Konami Izumi