Abstract: According to one embodiment, an optical coupling device is provided. A first photodiode receives an optical signal generated by a light emitting element and converts the optical signal into a first electrical signal. A first inverting amplifier is provided with a first feedback resistor and a first operating amplifier connected in parallel with each other. The input end is connected to a cathode of the first photodiode. A first signal which is obtained by inverting the first electrical signal is output from the output end. A second inverting amplifier is provided with a second feedback resistor and a second operating amplifier connected in parallel with each other. The input end of the second inverting amplifier is connected to a cathode of a second photodiode. The second inverting amplifier outputs a second signal from the output end. A comparator receives the first and second signals and outputs a comparison amplified signal.

Abstract: A high density variable resistive random access memory device and a method of fabricating the same are provided. The device includes first word lines, each separated from each other by a width of first word line; bit lines, each separated from each other by a width of bit line; and second word lines, each located between two adjacent first word lines, wherein the widths of first word line and the bit line are substantially same, and the bit lines are located over the first and second word lines.

Abstract: Resistive random access memory (RRAM) using stacked dielectrics and a method for manufacturing the same are disclosed, where a setting power of only 4 ?W, an ultra-low reset power of 2 nW, good switching uniformity and excellent cycling endurance up to 5×109 cycles were achieved simultaneously. Such record high performances were reached in a Ni/GeOx/nano-crystal-TiO2/TaON/TaN RRAM device, where the excellent endurance is 4˜6 orders of magnitude larger than existing Flash memory. The very long endurance and low switching energy RRAM is not only satisfactory for portable SSD in a computer, but may also create new applications such as being used for a Data Center to replace high power consumption hard discs.

Abstract: A nonvolatile resistive memory element includes a host oxide formed from an interfacial oxide layer. The interfacial oxide layer is formed on the surface of a deposited electrode layer via in situ or post-deposition surface oxidation treatments.

Abstract: According to one embodiment, a semiconductor device includes a substrate and an interconnect region on the substrate. The interconnect region includes a first interconnect having a first contact portion whose plane shape is a ring-like plane shape, a second interconnect disposed below the first interconnect, and a contact electrode passing through the ling-like portion of the first contact portion and electrically connecting the first interconnect and the second interconnect.

Abstract: A nonvolatile memory cell includes first and second electrodes. Programmable material and a select device are received in series between and with the first and second electrodes. Current conductive material is in series between and with the programmable material and the select device. An array of vertically stacked tiers of such nonvolatile memory cells is disclosed. Methods of forming arrays of nonvolatile memory cells are disclosed.

Abstract: Semiconductor memory devices having strapping contacts are provided, the devices include cell regions and strapping regions between adjacent cell regions in a first direction. Active patterns, extending in the first direction throughout the cell regions and strapping regions, are spaced apart from one another in a second direction intersecting the first direction. First interconnection lines, extending in the first direction throughout the cell regions and strapping regions, are spaced apart from one another in the second direction while overlapping with the active patterns. Second interconnection lines, extending in the second direction, intersect the active patterns and first interconnection lines in the cell regions. The second interconnection lines are spaced apart from one another in the first direction. Memory cells are positioned at intersection portions of the first and second interconnection lines in the cell regions.

Abstract: A process is provided for etching a silicon-containing substrate to form nanowire arrays. In this process, one deposits nanoparticles and a metal film onto the substrate in such a way that the metal is present and touches silicon where etching is desired and is blocked from touching silicon or not present elsewhere. One submerges the metallized substrate into an etchant aqueous solution comprising HF and an oxidizing agent. In this way arrays of nanowires with controlled diameter and length are produced.

Abstract: A carbon doped short period superlattice is provided. A heterostructure includes a short period superlattice comprising a plurality of quantum wells alternating with a plurality of barriers. One or more of the quantum wells and/or the barriers includes a percolated carbon atomic plane.

Abstract: A composition comprising: at least one conjugated polymer, at least one second polymer comprising repeat units represented by: (I) optionally, —[CH2—CH(Ph-OH)]— and (II) —[CH2—CH(Ph-OR)]— wherein Ph is a phenyl ring and R comprises a fluorinated group, an alkyl group, an alkylsulfonic acid group, an alkylene oxide group, or a combination thereof is described. Other polymers can be used as second polymer including polymers comprising modified naphthol side groups. The composition can be used in hole injection and hole transport layers for organic electronic devices. Increased lifetime and better processability can be achieved. Versatility with useful OLED emitters can be achieved. Ink formulations can be adapted for ink jet printing. The conjugated polymer can be a polythiophene. Applications include OLEDs and OPVs.

Abstract: A method of preparing an organic light-emitting device having excellent sealing characteristics against external environment and flexibility.

Abstract: A thin-film semiconductor device for a display apparatus according to the present disclosure includes: a gate electrode above a substrate; a gate insulating film above the gate electrode; a semiconductor layer above the gate electrode; a first electrode above the semiconductor layer; a second electrode in a same layer as the first electrode; an interlayer insulating film covering the first electrode and the second electrode; a gate line above the interlayer insulating film; a first power supply line electrically connected to the second electrode and in a same layer as the second electrode; and a second power supply line in a same layer as the gate line. Furthermore, the gate electrode and the gate line are electrically connected via a first conductive portion, and the first power supply line and the second power supply line are electrically connected via a second conductive portion.

Abstract: An organic light emitting diode device and a method for manufacturing the same are disclosed. The organic light emitting diode device including a substrate, stacks disposed between a first electrode and a second electrode on the substrate, wherein the stacks including a first stack having a first blue layer and a second stack disposed on the first stack and having a second blue layer, and a first emission layer is formed at a partial region of the first stack, and a second emission layer is formed at a partial region of the second stack.

Abstract: A flexible display apparatus includes a flexible substrate having a bending area, and a non-bending area adjacent the bending area, and having a display area for realizing a visible image, a plurality of wirings at the bending area, and a plurality of insulating patterns between the flexible substrate and the plurality of wirings, wherein respective ones of the plurality of insulating patterns are separated by separate areas.

Abstract: A non-linear element, such as a diode, in which an oxide semiconductor is used and a rectification property is favorable is provided. In a thin film transistor including an oxide semiconductor in which the hydrogen concentration is less than or equal to 5×1019/cm3, the work function ?ms of a source electrode in contact with the oxide semiconductor, the work function ?md of a drain electrode in contact with the oxide semiconductor, and electron affinity ? of the oxide semiconductor satisfy ?ms??<?md. By electrically connecting a gate electrode and the drain electrode of the thin film transistor, a non-linear element with a more favorable rectification property can be achieved.

Abstract: A field effect transistor including a semiconductor layer including a composite oxide which contains In, Zn, and one or more elements X selected from the group consisting of Zr, Hf, Ge, Si, Ti, Mn, W, Mo, V, Cu, Ni, Co, Fe, Cr, Nb, Al, B, Sc, Y and lanthanoids in the following atomic ratios (1) to (3): In/(In+Zn)=0.2 to 0.8??(1) In/(In+X)=0.29 to 0.99??(2) Zn/(X+Zn)=0.29 to 0.99??(3).

Abstract: Disclosed is a semiconductor device which consumes low power and has high reliability and tolerance for electrostatic discharge. The semiconductor device includes, over a first substrate, a pixel portion and a driver circuit portion both of which have a thin film transistor having an oxide semiconductor layer. The semiconductor device further possesses a second substrate to which a first counter electrode layer and a second counter electrode layer are provided, and a liquid crystal layer is interposed between the first and second substrates. The first and second counter electrode layers are provided over the pixel portion and the driver circuit portion, respectively, and the second counter electrode layer has the same potential as the first counter electrode layer.

Abstract: An array substrate for a display device includes an insulation substrate, a gate line formed on the insulation substrate, a data line crossing the gate line to define a pixel area, a thin film transistor including a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode, a passivation layer covering the gate line, the data line and the thin film transistor and including a drain contact hole to expose the drain electrode, and a pixel electrode formed on the pixel area and being connected to the drain contact hole through the drain contact hole. Each of the data line, the source electrode and the drain electrode includes a lower layer having copper and an upper layer covering upper and side surfaces of the lower layer, and the upper layer is thinner than the lower layer.

Abstract: A thin film transistor substrate includes a base substrate, an active pattern, a gate insulation pattern and a gate electrode. The active pattern is disposed on the base substrate. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode. The gate insulation pattern and the gate electrode overlap with the channel. The gate insulation pattern is disposed between the channel and the gate electrode. The source electrode and the drain electrode each include a fluorine deposition layer.

Abstract: In a semiconductor device including a digital circuit portion and an analog circuit portion having a capacitor portion provided over a substrate, the capacitor portion is provided with a first wiring, a second wiring and a plurality of blocks each having a plurality of capacitor elements. Further, each the plurality of capacitor elements provided in each block has a semiconductor film having a first impurity region and a plurality of second impurity regions provided apart with the first impurity region interposed therebetween, and a conductive film provided over the first impurity region with an insulating film therebetween. A capacitor is formed from the first impurity region, the insulating film, and the conductive film.

Abstract: Gate electrodes, a gate insulating layer, and an oxide semiconductor layer are simultaneously formed to form a multilayer structure, so that an SOG film serves as an etching stopper on channel regions in forming source electrodes and drain electrodes. In the SOG film, channel isolation holes are formed in positions each of which is located between adjacent two of TFTs connected to a common one of the gate lines, and corresponds to the common gate line. The oxide semiconductor layer of the adjacent TFTs is divided in each channel isolation hole. Terminal sections of the gate lines are exposed in the terminal section exposing holes formed in positions each corresponding to a gate line end portion. The pixel electrode is made of a film identical to a film forming one layer included in the drain electrode.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a stacked structure, a semiconductor pillar, a memory layer and an outer insulating film. The stacked structure includes a plurality of electrode films and a plurality of interelectrode insulating films alternately stacked in a first direction. The semiconductor pillar pierces the stacked structure in the first direction. The memory layer is provided between the electrode films and the semiconductor pillar. The outer insulating film is provided between the electrode films and the memory layer. The device includes a first region and a second region. An outer diameter of the outer insulating film along a second direction perpendicular to the first direction in the first region is larger than that in the second region. A thickness of the outer insulating film along the second direction in the first region is thicker than that in the second region.

Abstract: A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.

Abstract: A light emitting element has a substrate of gallium oxides and a pn-junction formed on the substrate. The substrate is of gallium oxides represented by: (AlXInYGa(1-X-Y))2O3 where 0?x?1, 0?y?1 and 0?x+y?1. The pn-junction has first conductivity type substrate, and GaN system compound semiconductor thin film of second conductivity type opposite to the first conductivity type.

Abstract: An embodiment of the present invention discloses a light-emitting structure having a light output power of more than 4mW at 20 mA current. Another embodiment of the present invention discloses a method of making a light-emitting structure having a light output power of more than 4mW at 20 mA current, and a layer with a thickness of 0.5 ?m˜3?m.

Abstract: A method of fabricating a gallium nitride (GaN) thin layer, by which a high-quality GaN layer may be grown on a large-area substrate using an electrode layer suspended above a substrate, a GaN film structure fabricated using the method, and a semiconductor device including the GaN film structure. The method includes forming a sacrificial layer on a substrate, forming a first buffer layer on the sacrificial layer, forming an electrode layer on the first buffer layer, forming a second buffer layer on the electrode layer, partially etching the sacrificial layer to form at least two support members configured to support the first buffer layer and form at least one air cavity between the substrate and the first buffer layer, and forming a GaN thin layer on the second buffer layer.

Abstract: In a semiconductor light emitting element (1) having a sapphire substrate (100), and lower (210) and upper (220) semiconductor layers laminated on the sapphire substrate, the substrate includes a substrate top surface (113), a substrate bottom surface (114), first substrate side surfaces (111) and second substrate side surfaces (112); plural first (121a) and second (122a) cutouts are provided at a border between the first substrate side surface, the second substrate side surface and the substrate top surface; the lower semiconductor layer includes a lower semiconductor bottom surface, a lower semiconductor top surface (213), first lower semiconductor side surfaces (211) and second lower semiconductor side surfaces (212); plural first projecting portions (211a) and plural first depressing portions (211b) are provided on the first lower semiconductor side surface; and plural second protruding portions (212a) and second flat portions (212b) are provided on the second lower semiconductor side surface.

Abstract: An embodiment relates to a nanowire-containing LED device with optical feedback comprising a substrate, a nanowire protruding from a first side the substrate, an active region to produce light, a optical sensor and a electronic circuit, wherein the optical sensor is configured to detect at least a first portion of the light produced in the active region, and the electronic circuit is configured to control an electrical parameter that controls a light output of the active region. Yet, another embodiment relates to an image display having the nanowire-containing LED device with optical feedback.

Abstract: A multi-chip lighting module is disclosed for maximizing luminous flux output and thermal management. In one embodiment, a multi-chip module device comprises a substantially thermally dissipative substrate with a dark insulating layer deposited on a surface of the substrate. A plurality of light emitting devices is also provided. An electrically conductive layer is applied to a surface of the substrate, with the conductive layer comprising a plurality of chip carrier parts each having a surface for carrying at least one of the light emitting devices. Each light emitting device has a first and a second electrical terminal. A reflective layer is also provided that at least partially covers the conductive layer.

Abstract: A substrate includes a storage line, first and second gate lines and first and second pixel electrodes. The storage line extends along a first direction on the substrate. The first and second gate lines are substantially parallel with the storage line. The first pixel electrode is formed between the first gate line and the storage line. The second pixel electrode is formed between the second gate line and the storage line.

Abstract: An illuminating device according to the present invention includes at least a first nitride-based semiconductor light-emitting element and a second nitride-based semiconductor light-emitting element, in which: the first nitride-based semiconductor light-emitting element and the second nitride-based semiconductor light-emitting element each include a semiconductor chip; the semiconductor chip includes a nitride-based semiconductor multilayer structure 45 formed from an AlxInyGazN (x+y+z=1, x?0, y?0, z?0) semiconductor, and the nitride-based semiconductor multilayer structure 20 includes an active layer region 24 having an m-plane as an interface; the first nitride-based semiconductor light-emitting element and the second nitride-based semiconductor light-emitting element each emit polarized light from the active layer region 24; and, when the polarized light emitted from the first nitride-based semiconductor light-emitting element and the polarized light emitted from the second nitride-based semiconductor ligh

Abstract: A display panel and method of manufacture are described. In an embodiment, a display substrate includes a pixel area and a non-pixel area. An array of subpixels and corresponding array of bottom electrodes are in the pixel area. An array of micro LED devices are bonded to the array of bottom electrodes. One or more top electrode layers are formed in electrical contact with the array of micro LED devices. In one embodiment a redundant pair of micro LED devices are bonded to the array of bottom electrodes. In one embodiment, the array of micro LED devices are imaged to detect irregularities.

Abstract: A light-emitting diode includes a first electrode, a conductive substrate layer, a reflective layer, a first electrical semiconductor layer, a active layer, a second electrical semiconductor layer, and at least one second electrode. The conductive substrate layer is formed on the first electrode. The reflective layer is formed on the conductive substrate layer. The first electrical semiconductor layer is formed on the reflective layer. The active layer is formed on the first electrical semiconductor layer. The second electrical semiconductor layer is formed on the active layer. The at least one second electrode is formed on the second electrical semiconductor layer. At least one third electrode is additionally disposed under the second electrical semiconductor layer. At least one connection channel is disposed between the second electrode and the third electrode, so that the second electrode and the third electrode are electrically connected.

Abstract: The present invention provides an active matrix substrate and a display device that have sufficient resistance to a surge current without formation of a short ring and that enable narrowing of a picture-frame region. The present invention is an active matrix substrate on which a plurality of pixels are formed in a matrix shape. The active matrix substrate includes, on one principal surface side of the substrate: a terminal; a semiconductor element; wiring that is formed in a picture-frame region of the substrate and that connects the terminal and the semiconductor element; and an annular conductive portion formed through an insulation layer on at least one of an upper layer side and a lower layer side of the wiring. The wiring comprises a meander structure including a meander-shaped portion. A portion of the conductive portion is disposed along the meander-shaped portion.

Abstract: Disclosed is a light emitting device array. The light emitting device array comprises a light emitting device and a body comprises first and second lead frames electrically connected to the light emitting device and a substrate on which the light emitting device package is disposed, the substrate comprises a base layer and a metal layer disposed on the base layer and electrically connected to the light emitting device package, wherein the metal layer comprises first and second electrode patterns electrically connected to the first and second lead frames and a heat dissipation pattern insulated from at least one of the first or(and) second electrode patterns, absorbing heat generated from at least one of the base layer or(and) the light emitting device package and then dissipating the heat.

Abstract: Disclosed is an organic light emitting display device. The organic light emitting display device includes a plurality of pixels that include a pixel circuit connected to a gate line, a data line, and a high-level power line, and an emission cell formed between an anode electrode connected to the pixel circuit and a cathode electrode layer receiving low-level power. The organic light emitting display device includes a display panel including a plurality of first pad parts, second pad parts, and cathode connection parts, a plurality of first flexible circuit films respectively connected to the first pad parts to supply the low-level power to a low-level power pad of each of the first pad parts, and a plurality of second flexible circuit films respectively connected to the second pad parts to supply the high-level power to a high-level power pad of each of the second pad parts.

Abstract: Provided are a light emitting device and a method for manufacturing the same. The light emitting device comprises a first conductive type semiconductor layer, an active layer, a second conductive type semiconductor layer, and a light extraction layer. The active layer is formed on the first conductive type semiconductor layer. The second conductive type semiconductor layer is formed on the active layer. The light extraction layer is formed on the second conductive type semiconductor layer. The light extraction layer has a refractive index smaller than or equal to a refractive index of the second conductive type semiconductor layer.

Abstract: A light emitting device according to the embodiment includes a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer on the active layer, a current spreading layer on the second conductive semiconductor layer, a bonding layer on the current spreading layer, and a light extracting structure on the bonding layer.

Abstract: Disclosed are a light emitting device and a method of manufacturing the same. The light emitting device includes a support substrate, a reflective ohmic contact layer on the support substrate, a functional complex layer including a process assisting region and ohmic contact regions divided by the process assisting region on the reflective ohmic contact layer, and a light emitting semiconductor layer including a second conductive semiconductor layer, an active layer, and a first conductive semiconductor layer on each ohmic contact region.

Abstract: Disclosed is a light emitting device package. The light emitting device package includes a package body, a light emitting device installed in a cavity of the package body, an encapsulation layer to seal the light emitting device, and an electrode connected to the light emitting device. The package body includes a material having thermal conductivity lower than thermal conductivity of a material constituting the encapsulation layer.

Abstract: A high-efficiency light emitting diode including: a semiconductor stack positioned on a support substrate, including a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; an insulating layer disposed in an opening that divides the p-type compound semiconductor layer and active layer; a transparent electrode layer disposed on the insulating layer and the p-type compound semiconductor layer; a reflective insulating layer covering the transparent electrode layer, to reflect light from the active layer away from the support substrate; a p-electrode covering the reflective insulating layer; and an n-electrode is formed on top of the n-type compound semiconductor layer. The p-electrode is electrically connected to the transparent electrode layer through the insulating layer.

Abstract: A LED lamp is disclosed which has a plurality of light unit, each of the light unit has at least one flat metal lead for heat dissipation and the lower part of the metal lead is mounted on a heat sink for a further heat dissipation.

Abstract: An LED encapsulation resin body disclosed in the present application includes: a phosphor; a heat resistance material arranged on, or in the vicinity of, a surface of the phosphor; and a silicone resin in which the phosphor with the heat resistance material arranged thereon is dispersed.

Abstract: A light emitting device package is provided. The light emitting device package may include a main body having a cavity including side surfaces and a bottom, and a first reflective cup and a second reflective cup provided in the bottom of the cavity of the main body and separated from each other. A first light emitting device may be provided in the first reflective cup, and a second light emitting device may be provided in the second reflective cup.

Abstract: A transparent conductive electrode stack containing a work function adjusted zinc oxide is provided. Specifically, the transparent conductive electrode stack includes a layer of zinc oxide and a layer of a work function modifying material. The presence of the work function modifying material in the transparent conductive electrode stack shifts the work function of the layer of zinc oxide to a higher value for better hole injection into the OLED device as compared to a transparent conductive electrode that includes only a layer of zinc oxide and no work function modifying material.

Abstract: Provided are a surface treated phosphor having high dispersibility and remarkably improved moisture resistance without degradation in fluorescence properties, and a method of producing the surface treated phosphor.

Abstract: An optical proximity sensor module includes a substrate, a light emitter mounted on a first surface of the substrate, the light emitter being operable to emit light at a first wavelength, and a light detector mounted on the first surface of the substrate, the light detector being operable to detect light at the first wavelength. The module includes an optics member disposed substantially parallel to the substrate, and a separation member disposed between the substrate and the optics member. The separation member may surround the light emitter and the light detector, and may include a wall portion that extends from the substrate to the optics member and that separates the light emitter and the light detector from one another. The separation member may be composed, for example, of a non-transparent polymer material containing a pigment, such as carbon black.

Abstract: An organic light-emitting diode (1), comprising a layer stack (2) for emitting electromagnetic radiation (6). An electrically conductive first connection layer (4) is arranged on a first surface of the layer stack (2) and an electrically conductive second connection layer (5) at least predominantly transparent to a characteristic wavelength of the emittable electromagnetic radiation (6) is arranged on a second surface of the layer stack (2). The organic light-emitting diode is characterized by a conductive contact structure (7) arranged on the opposite side of the first connection layer (4) from the layer stack, which contact structure is connected electrically to the second connection layer (5) in the region of a plurality of openings (12) in the first connection layer (4). Also disclosed is a contact arrangement (15) for a two-dimensional, optically active element and to a method of producing organic light-emitting diodes (1).

Abstract: A submount for a light emitting device package includes a substrate. A first bond pad and a second bond pad are on a first surface of the substrate. The first bond pad includes a die attach region offset toward a first end of the substrate and configured to receive a light emitting diode thereon. The second bond pad includes a bonding region between the first bond pad and the second end of the substrate and a second bond pad extension that extends from the bonding region along a side of the substrate toward a corner of the substrate at the first end of the substrate. First and second solder pads are a the second surface of the substrate. The first solder pad is adjacent the first end of the substrate and contacts the second bond pad. The second solder pad is adjacent the second end of the substrate and contacts the first bond pad. Related LED packages and methods of forming LED packages are disclosed.

Abstract: A laminate leadless carrier package having a semiconductor chip mounted at the edge of a recess region in a substrate supporting the chip, the substrate having a plurality of conductive and dielectric layers, a wire bond coupled to the optoelectronic chip and a wire bond pad positioned on the top surface of the substrate. An encapsulation covers the laser chip, the wire bond, and at least a portion of the top surface of the substrate including the recess region. The encapsulation is an optically transparent molding compound. The package is arranged to be mounted as a side-looker and/or a top-looker.