Patents Issued in September 25, 2014
  • Publication number: 20140284572
    Abstract: Provided is an organic electroluminescence display device. The organic electroluminescence display device includes a bank that is provided so as to surround a central portion of a pixel electrode, an organic electroluminescence layer that is provided on the pixel electrode, a common electrode that is formed so as to extend from the organic electroluminescence layer to the bank, a color filter layer that overlaps the organic electroluminescence layer, a black matrix layer that overlaps the bank, a spacer that is provided on the black matrix layer, and a wiring that is provided on the black matrix layer so as to be placed on the spacer. The black matrix layer is disposed on the bank through the spacer. A convex portion is formed by the wiring being placed on the spacer, and the convex portion is electrically connected to the common electrode above the bank.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 25, 2014
    Applicant: Japan Display Inc.
    Inventors: Hiroshi OOOKA, Mitsuhide MIYAMOTO
  • Publication number: 20140284573
    Abstract: Compositions for use in hole transporting layers (HTLs) or hole injection layers (HILs) are provided, as well as methods of making the compositions and devices fabricated from the compositions. OLED devices can be made. The compositions comprise at least one conductive conjugated polymer, at least one semiconducting matrix component that is different from the conductive conjugated polymer, and an optional dopant, and are substantially free of an insulating matrix component.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 25, 2014
    Applicant: PLEXTRONICS, INC.
    Inventors: Christopher T. BROWN, Mathew K. MATHAI, Venkataramanan SESHADRI
  • Publication number: 20140284574
    Abstract: A display apparatus includes a pixel part disposed in a display area of a base substrate, including a switching element connected to a signal line, a pixel electrode connected to the switching element and a common electrode that overlaps the pixel electrode, a plurality of fan-out lines disposed in a peripheral area of the base substrate that are connected to the signal line of the display area, a plurality of pads disposed in the peripheral area of the base substrate that are respectively connected to end portions of the fan-out lines, an organic layer that covers the switching element of the display area and that extends from the display area to a portion of the fan-out lines, and an electrode pattern that overlaps the fan-out lines in a boundary portion of the organic layer.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 25, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Soon-Wook Hong, Seung-Sok Son, Yeon-Kyu Moon, Jae-Hyun Park, Kap-Soo Yoon, Jin-Won Lee
  • Publication number: 20140284575
    Abstract: To inhibit surface reflection of a display device. A display device which includes a reflective electrode layer 110; a partition 118 formed to surround the reflective electrode layer; a layer 120 containing a light-emitting organic compound and formed over the partition and the reflective electrode layer; a semi-transmissive electrode layer 122 formed over the layer containing the light-emitting organic compound; and a coloring layer 162 formed over the semi-transmissive electrode layer. The coloring layer overlaps with the reflective electrode layer and the partition. The partition does not overlap with the reflective electrode layer.
    Type: Application
    Filed: March 17, 2014
    Publication date: September 25, 2014
    Inventors: Nozomu SUGISAWA, Hisao IKEDA, Katsuhiro KIKUCHI, Manabu NIBOSHI, Satoshi INOUE, Yuto TSUKAMOTO, Shinichi KAWATO
  • Publication number: 20140284576
    Abstract: A display device that includes a reflective electrode; a transparent electrode; a partition; an EL layer formed over the partition and the transparent electrode; a semi-transmissive electrode formed over the EL layer; and a coloring layer over the semi-transmissive electrode. A light-emitting region is formed to overlap with the transparent electrode, the EL layer, the semi-transmissive electrode, and the coloring layer. A non-light-emitting region is formed to overlap with the transparent electrode, the partition, the EL layer, and the coloring layer. The non-light-emitting region is formed to surround the light-emitting region. The sum of the optical length of the transparent electrode and the optical length of the EL layer is adjusted to fulfil a condition of a microcavity intensifying light of the color of the coloring layer. The optical length of the partition in the non-light-emitting region is adjusted to weaken external light incident through the coloring layer.
    Type: Application
    Filed: March 17, 2014
    Publication date: September 25, 2014
    Inventors: Nozomu SUGISAWA, Hisao IKEDA, Katsuhiro KIKUCHI, Manabu NIBOSHI, Satoshi INOUE, Yuto TSUKAMOTO, Shinichi KAWATO
  • Publication number: 20140284577
    Abstract: Thin glasses having high refractive index (nd), a layer composite assembly made from these thin glasses, a method for the production of the thin glasses, and the uses of the thin glasses are provided. The thin glasses are processed in an in line manufacturing process and have the optical properties of a classical optical glass. The thin glasses are highly transparent, crystallization-resistant, chemically resistant and highly refractive. The viscosity/temperature behavior of the thin glasses is adjusted to the manufacturing process via in line flat glass methods.
    Type: Application
    Filed: March 18, 2014
    Publication date: September 25, 2014
    Applicant: Schott AG
    Inventors: Karl Mennemann, Uwe Kolberg, Holger Wegener, Monika Gierke, Ute Woelfel, Joerg Fechner
  • Publication number: 20140284578
    Abstract: An organic compound having a low HOMO level and a high hole-transport property is provided. The organic compound is represented by Formula (G1), where Ar1 represents a substituted or unsubstituted fluorenyl group, Ar2 represents a substituted or unsubstituted aryl group having 6 to 13 carbon atoms, and A1 represents any one of a substituted or unsubstituted dibenzofuranyl group and a substituted or unsubstituted dibenzothiophenyl group. The low HOMO level and the high hole-transport property of the organic compound allow the formation of an exciplex with another organic compound, which leads to a highly efficient light-emitting element in the presence of a phosphorescent compound due to the effective overlapping between the emission of the exciplex and the longest absorption band of the phosphorescent compound.
    Type: Application
    Filed: March 20, 2014
    Publication date: September 25, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kyoko Takeda, Satoshi Seo, Hiromi Seo, Tatsuyoshi Takahashi
  • Publication number: 20140284579
    Abstract: An organic EL display device has a pixel electrode and a common electrode, a first insulating layer that covers a thin-film transistor, a first wire provided on the first insulating layer to electrically connect the thin-film transistor and the pixel electrode, a second wire provided on the first insulating layer to be connected to a gate electrode of the thin-film transistor, and a conducting film formed on the first wire and the second wire from a material on which an oxide film is harder to be formed than those of the first wire and the second wire. At least one of the pixel electrode, the first wire, and the second wire and the conducting film are located to overlap above the first insulating layer in electrical insulation so that a capacitor that retains a control signal is formed between the first wire and the second wire.
    Type: Application
    Filed: March 21, 2014
    Publication date: September 25, 2014
    Applicant: Japan Display Inc.
    Inventors: Naoki TOKUDA, Mitsuhide MIYAMOTO
  • Publication number: 20140284580
    Abstract: Disclosed is a novel compound of Formula 1 and an organic electroluminescent device using the same. In Formula 1, X and Y independently represents a hydrogen, an aromatic or a hetero aromatic hydrocarbon having C5 to C10 carbons; X and Y may be the same or different; Ar1 to Ar2 each represent a hydrogen, an unsubstituted or substituted aromatic hydrocarbon having C4 to C12 carbons, or an unsubstituted or substituted condensed polycyclic aromatic hydrocarbon having C4 to C12 carbons; Ar1 to Ar2 can form a fused aromatic ring system with the adjacent aromatic hydrocarbons. The compound of Formula 1 is present in the electron injection or a transport material, or an exciton blocking layer in the organic light emitting device, and thereby improving the device stability, lowering the operational voltage.
    Type: Application
    Filed: March 21, 2014
    Publication date: September 25, 2014
    Applicant: E-RAY OPTOELECTRONICS TECHONOLOGY CO., LTD.
    Inventors: Banumathy Balaganesan, Heh-Lung Huang, Po-Wei Hsu, Fang-Shih Lin
  • Publication number: 20140284581
    Abstract: Disclosed herein are compounds represented by formula: where HT, ET, and R1-R6 are described herein. Compositions of said compounds along with organic light-emitting diode (OLED) devices related thereto are also disclosed.
    Type: Application
    Filed: March 21, 2014
    Publication date: September 25, 2014
    Applicant: NITTO DENKO CORPORATION
    Inventor: Shijun Zheng
  • Publication number: 20140284582
    Abstract: The phase difference plate for a circularly polarizing plate includes a first optically anisotropic layer; and a second optically anisotropic layer, in which the first and second optically anisotropic layers contain a liquid crystal compound that is helically aligned around a helical axis which is in a thickness direction of each of the layers, the liquid crystal compound has a same helix direction in the first optically anisotropic layer and in the second optically anisotropic layer, and a helix angle of the liquid crystal compound each in the first optically anisotropic layer and in the second optically anisotropic layer is in a predetermined range. The phase difference plate can sufficiently suppress the mixing of black with another color observed in the front direction when being stuck as a circularly polarizing plate on a display apparatus.
    Type: Application
    Filed: March 24, 2014
    Publication date: September 25, 2014
    Applicant: FUJIFILM Corporation
    Inventors: Yukito SAITOH, Hiroshi SATO, Mitsuyoshi ICHIHASHI
  • Publication number: 20140284583
    Abstract: The phase difference plate for a circularly polarizing plate including a first optically anisotropic layer, and a second optically anisotropic layer, in which the first optically anisotropic layer contains a liquid crystal compound helically aligned around a helical axis in its thickness direction, a helix angle of the liquid crystal compound in the first optically anisotropic layer is in a predetermined range, and an in-plane slow axis in a surface of the first optically anisotropic layer at the second optically anisotropic layer side is in parallel with an in-plane slow axis of the second optically anisotropic layer. The phase difference plate can sufficiently suppress the mixing of black with another color observed in the front direction when being stuck as a circularly polarizing plate on a display apparatus.
    Type: Application
    Filed: March 24, 2014
    Publication date: September 25, 2014
    Applicant: FUJIFILM CORPORATION
    Inventors: Yukito SAITOH, Hiroshi SATO, Mitsuyoshi ICHIHASHI
  • Publication number: 20140284584
    Abstract: Disclosed herein are compounds represented by the formula: where HT and n are defined herein. Compositions of said compounds along with organic light-emitting diode (OLED) devices related thereto are also disclosed.
    Type: Application
    Filed: March 25, 2014
    Publication date: September 25, 2014
    Applicant: NITTO DENKO CORPORATION
    Inventor: Shijun Zheng
  • Publication number: 20140284585
    Abstract: Phosphorescent materials and devices with improved device manufacturing, fabrication, stability, efficiency, and/or color is disclosed.
    Type: Application
    Filed: June 4, 2014
    Publication date: September 25, 2014
    Inventors: Raymond KWONG, Chuanjun XIA, Jason BROOKS, Bert ALLEYNE, Bin MA, James FIORDELISO, Yonggang WU
  • Publication number: 20140284586
    Abstract: It is a problem to provide an electric apparatus less in consumption power and long in life by the manufacture using the display device. An insulating bank is provided in a form surrounding the pixel portions on first electrodes over a substrate. The entire surface is applied, by a wet scheme (method), with an organic conductive film which has a thickness form of T2>T1>T3 under the influence of the insulating bank. Accordingly, the portion T3 has an increased resistance in a lateral direction, making possible to prevent against crosstalk. Due to a conductive polymer as a buffer layer, a display device can be provided which is low in drive voltage. Furthermore, because the portion T2 is increased in thickness, the electric-field concentration is relaxed at and around the pixel portion. This makes it possible to prevent the organic light-emitting element from deteriorating at around the pixel.
    Type: Application
    Filed: June 4, 2014
    Publication date: September 25, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi SEO, Shunpei YAMAZAKI
  • Publication number: 20140284587
    Abstract: The manufacturing method of the light-emitting device is provided in which an auxiliary electrode in contact with an electrode formed using a transparent conductive film of a light-emitting element is formed using a mask, and direct contact between the auxiliary electrode and an EL layer is prevented by oxidizing the auxiliary electrode. Further, the light-emitting device manufactured according to the method and the lighting device including the light-emitting device are provided.
    Type: Application
    Filed: June 5, 2014
    Publication date: September 25, 2014
    Inventors: Hisao Ikeda, Kohei Yokoyama, Satoshi Seo
  • Publication number: 20140284588
    Abstract: An organic electroluminescence display panel includes a thin-film transistor layer above a substrate. A planarizing film is above the thin-film transistor layer with contact holes being formed in the planarizing film. A bank is above the planarizing film. The bank includes openings arranged in rows and columns that define regions for forming organic electroluminescence elements. Each opening is between a pair of adjacent concaves in one of the columns. The concaves are formed in an upper surface of the bank and sunken into the contact holes. The upper surface of the bank has repellency. A light-emitting layer is formed in each opening by ejecting drops of an ink from nozzles of an inkjet head into the openings while moving the inkjet head relative to the substrate. The nozzles further eject drops of the ink into the concaves when above the concaves for ejecting the drops of the ink through every nozzle.
    Type: Application
    Filed: June 9, 2014
    Publication date: September 25, 2014
    Applicant: PANASONIC CORPORATION
    Inventor: Takayuki TAKEUCHI
  • Publication number: 20140284589
    Abstract: An electrode foil which has both the functions of a supporting base material and a reflective electrode and also has superior thermal conductivity; and an organic device using the same are provided. The electrode foil comprises a metal foil and a reflective layer provided directly on the metal foil.
    Type: Application
    Filed: June 10, 2014
    Publication date: September 25, 2014
    Inventors: Yoshinori MATSUURA, Nozomu KITAJIMA, Naohiko ABE
  • Publication number: 20140284590
    Abstract: When a large-screen organic EL display device is developed, the generation of a brightness unevenness is prevented between its screen central region and its screen outer circumferential region. Cost risk is decreased about the formation of a structure of preventing the generation of the brightness unevenness. Furthermore, an original protecting function for its organic EL elements is maintained. The color filter of the present invention comprises a transparent substrate, a colored layer that is a pixel region formed on the transparent substrate, and a non-pixel area formed around the colored layer, wherein a convex pillar is formed in at least one spot of the non-pixel area, and an auxiliary electrode layer on a top and a side of the convex pillar, and on the non-pixel area.
    Type: Application
    Filed: October 25, 2012
    Publication date: September 25, 2014
    Applicant: DAI NIPPON PRINTING CO., LTD.
    Inventors: Shinsuke Nakazawa, Kazuyuki Hino
  • Publication number: 20140284591
    Abstract: An organic electroluminescence (EL) display panel includes an anode electrode formed above a bank and formed opposite to a plurality of cathode electrodes, and a charge functional layer commonly formed for each of the organic light-emitting layers across a plurality of aperture areas formed in the bank. An end portion of the anode electrode and an end portion of the charge functional layer are provided above the bank located adjacent to a boundary between a display region and a peripheral region of a display region.
    Type: Application
    Filed: November 1, 2012
    Publication date: September 25, 2014
    Inventors: Shinya Ono, Kouhei Ebisuno
  • Publication number: 20140284592
    Abstract: According to one embodiment, a magnetoresistive effect element includes a first ferromagnetic layer, a tunnel barrier provided on the first ferromagnetic layer, and a second ferromagnetic layer provided on the tunnel barrier. The tunnel barrier includes a nonmagnetic mixture containing MgO and a metal oxide with a composition which forms, in a solid phase, a single phase with MgO.
    Type: Application
    Filed: August 8, 2013
    Publication date: September 25, 2014
    Inventors: Makoto NAGAMINE, Daisuke IKENO, Katsuya NISHIYAMA, Katsuaki NATORI, Koji YAMAKAWA
  • Publication number: 20140284593
    Abstract: According to one embodiment, a semiconductor device includes a substrate having an upper surface, a foundation insulating layer provided on the upper surface, and a thin film transistor. The thin film transistor includes a first gate electrode, first, second and third insulating layers, a semiconductor layer, and first and second conductive layers. The first gate electrode is provided on a portion of the foundation insulating layer. The first insulating layer covers the first gate electrode and the foundation insulating layer. The second insulating layer is provided on the first insulating layer, and has first, second and third portions. The semiconductor layer contacts the second insulating layer on the third portion, and has fourth, fifth portions and sixth portions. The first conductive layer contacts the fourth portion. The second conductive layer contacts the fifth portion. The third insulating layer covers a portion of the semiconductor layer.
    Type: Application
    Filed: February 5, 2014
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shintaro Nakano, Tomomasa Ueda, Ikuo Fujiwara, Hajime Yamaguchi
  • Publication number: 20140284594
    Abstract: According to one embodiment, a display device includes a substrate unit, a thin film transistor, a pixel electrode and a display layer. The substrate unit includes a substrate, a first insulating layer provided on the substrate, and a second insulating layer provided on the first insulating layer. The thin film transistor is provided on the substrate unit and includes a gate electrode provided on the second insulating layer, a semiconductor layer of an oxide separated from the gate electrode, a gate insulation layer provided between the gate electrode and the semiconductor layer, a first conductive portion, a second conductive portion, and a third insulating layer. The pixel electrode is connected to one selected from the first and second conductive portions. The display layer is configured to have a light emission or a change of optical characteristic occurring according to a charge supplied to the pixel electrode.
    Type: Application
    Filed: February 7, 2014
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shintaro NAKANO, Tomomasa Ueda, Kentaro Miura, Nobuyoshi Saito, Tatsunori Sakano, Yuya Maeda, Hajime Yamaguchi
  • Publication number: 20140284595
    Abstract: A semiconductor device for miniaturization is provided. The semiconductor device includes a semiconductor layer; a first electrode and a second electrode that are on the semiconductor layer and apart from each other over the semiconductor layer; a gate electrode over the semiconductor layer; and a gate insulating layer between the semiconductor layer and the gate electrode. The first and second electrodes comprise first conductive layers and second conductive layers. In a region overlapping with the semiconductor layer, the second conductive layers are positioned between the first conductive layers, and side surfaces of the second conductive layers are in contact with side surfaces of the first conductive layers. The second conductive layers have smaller thicknesses than those of the first conductive layers, and the top surface levels of the second conductive layers are lower than those of the first conductive layers.
    Type: Application
    Filed: March 11, 2014
    Publication date: September 25, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shinya SASAGAWA, Motomu KURATA, Taiga MURAOKA
  • Publication number: 20140284596
    Abstract: To provide an oxide semiconductor with a novel structure. Such an oxide semiconductor is composed of an aggregation of a plurality of InGaZnO4 crystals each of which is larger than or equal to 1 nm and smaller than or equal to 3 nm, and in the oxide semiconductor, the plurality of InGaZnO4 crystals have no orientation.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 25, 2014
    Inventors: Shunpei YAMAZAKI, Masahiro TAKAHASHI, Noboru KIMIZUKA
  • Publication number: 20140284597
    Abstract: To improve crystallinity of an oxide semiconductor. To provide a crystalline oxide semiconductor film in which a crystallized region extends to the interface with a base or the vicinity of the interface, and to provide a method for forming the oxide semiconductor film. An oxide semiconductor film containing indium, gallium, and zinc is formed, and the oxide semiconductor film is irradiated with an energy beam, thereby being heated. Note that the oxide semiconductor film includes a c-axis aligned crystal region or microcrystal.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 25, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akihisa SHIMOMURA, Takahisa ISHIYAMA, Masaki KOYAMA, Erumu KIKUCHI, Takuya HIROHASHI, Masashi OOTA
  • Publication number: 20140284598
    Abstract: A method of forming an ultraviolet (UV) photodetector includes forming an epitaxial semiconductor metal oxide layer on a substrate, wherein the forming includes using an O2 flow rate and applied RF plasma power which together provide a ratio of O• (oxygen radicals) to O+ of at least 1.5. Metal fingers are formed on a surface of the semiconductor metal oxide layer. The metal fingers can include a multi-layer stack including a metal having a 25° C. work function <4 eV positioned between an adhesion layer and an oxidation resistant metal capping layer. The semiconductor metal oxide layer can be Zn1-xMgxO wherein 0<x<1.
    Type: Application
    Filed: March 21, 2014
    Publication date: September 25, 2014
    Applicant: University of Central Florida Research Foundation, Inc.
    Inventors: R. CASEY BOUTWELL, MING WEI, WINSTON V. SCHOENFELD
  • Publication number: 20140284599
    Abstract: A first oxide insulating film is formed over a substrate. After a first oxide semiconductor film is formed over the first oxide insulating film, heat treatment is performed, so that hydrogen contained in the first oxide semiconductor film is released and part of oxygen contained in the first oxide insulating film is diffused into the first oxide semiconductor film. Thus, a second oxide semiconductor film with reduced hydrogen concentration and reduced oxygen defect is formed. Then, the second oxide semiconductor film is selectively etched to form a third oxide semiconductor film, and a second oxide insulating film is formed. The second oxide insulating film is selectively etched and a protective film covering an end portion of the third oxide semiconductor film is formed. Then, a pair of electrodes, a gate insulating film, and a gate electrode are formed over the third oxide semiconductor film and the protective film.
    Type: Application
    Filed: June 5, 2014
    Publication date: September 25, 2014
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20140284600
    Abstract: In order to reduce power consumption, an arithmetic circuit having a function of performing a logic operation processing based on an input signal, storing a potential set in accordance with the result of the logic operation processing as stored data, and outputting a signal with a value corresponding to the stored data as an output signal. The arithmetic circuit includes an arithmetic portion performing the logic operation processing, a first field-effect transistor controlling whether a first potential, which is the potential corresponding to the result of the logic operation processing is set, and a second field-effect transistor controlling whether the potential of the output signal data is set at a second potential which is a reference potential.
    Type: Application
    Filed: June 6, 2014
    Publication date: September 25, 2014
    Inventor: Kiyoshi Kato
  • Publication number: 20140284601
    Abstract: A thin film transistor including an oxide semiconductor with favorable electrical characteristics is provided. The thin film transistor includes a gate electrode provided over a substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode and on the gate insulating film, a metal oxide film provided on the oxide semiconductor film, and a metal film provided on the metal oxide film. The oxide semiconductor film is in contact with the metal oxide film, and includes a region whose concentration of metal is higher than that of any other region in the oxide semiconductor film (a high metal concentration region). In the high metal concentration region, the metal contained in the oxide semiconductor film may be present as a crystal grain or a microcrystal.
    Type: Application
    Filed: June 6, 2014
    Publication date: September 25, 2014
    Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
  • Publication number: 20140284602
    Abstract: A conventional DRAM needs to be refreshed at an interval of several tens of milliseconds to hold data, which results in large power consumption. In addition, a transistor therein is frequently turned on and off; thus, deterioration of the transistor is also a problem. These problems become significant as the memory capacity increases and transistor miniaturization advances. A transistor is provided which includes an oxide semiconductor and has a trench structure including a trench for a gate electrode and a trench for element isolation. Even when the distance between a source electrode and a drain electrode is decreased, the occurrence of a short-channel effect can be suppressed by setting the depth of the trench for the gate electrode as appropriate.
    Type: Application
    Filed: June 9, 2014
    Publication date: September 25, 2014
    Inventors: Shunpei YAMAZAKI, Hiromichi GODO
  • Publication number: 20140284603
    Abstract: A MEMS apparatus comprising composite vibrating unit and the manufacturing method thereof are disclosed. The vibrating unit includes a stiffness element on which a first material is disposed. A second material being a conductive material is disposed on the first material and is extended to the stiffness element to remove electric charge on first material. When a temperature is changed, a variation direction of a Young's modulus of the first material is opposite to a variation direction of a Young's modulus of the stiffness element. The unique attributes above allow vibrating unit of the MEMS apparatus such as resonator and gyroscope to have stable resonance frequency against the change of temperature.
    Type: Application
    Filed: January 8, 2014
    Publication date: September 25, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chung-Yuan Su, Chao-Ta Huang, Tzung-Ching Lee, Yu-Wen Hsu
  • Publication number: 20140284604
    Abstract: The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a front surface and a backside surface; integrated circuit features formed on the front surface of the semiconductor substrate; and a polycrystalline silicon layer disposed on the backside surface of the semiconductor substrate.
    Type: Application
    Filed: June 5, 2014
    Publication date: September 25, 2014
    Inventors: Chia-Hao Hsu, Chia-Chen Chen, Tzung-Chi Fu, Tzu-Wei Kao, Yu Chao Lin
  • Publication number: 20140284605
    Abstract: A TFT-PIN array substrate and an assembly structure for a flat-panel x-ray detector are provided to overcome the problem that the conventional scintillator substrate and TFT-PIN array substrate are neither penetrated by UV-light nor assembled by UV curable LOCA. The metal layer of the PIN photodiode of the TFT-PIN array substrate is perforated to have at least one hole, whereby UV-light can pass through the TFT-PIN array substrate to cure UV curable LOCA. Therefore, UV curable LOCA can be used as an adhesive layer in the assembly structure of a scintillator substrate and a TFT-PIN array substrate to promote the detective quantum efficiency and image quality of a flat-panel X-Ray detector.
    Type: Application
    Filed: May 2, 2013
    Publication date: September 25, 2014
    Applicant: National Chiao Tung University
    Inventors: PAO-YUN TANG, SHU-LIN HO, KEI-HSIUNG YANG
  • Publication number: 20140284606
    Abstract: A method for fabricating a pixel structure includes the following steps. A patterned semiconductor layer, an insulation layer, and a patterned metal layer are formed on a substrate sequentially. A first inter-layer dielectric (ILD) layer is formed to cover the patterned metal layer. A low temperature annealing process is performed after forming the first ILD layer. A hydrogen plasma treatment process is performed after the low temperature annealing process. A second ILD layer is formed to cover the first ILD layer after the hydrogen plasma treatment process. A third ILD layer is formed to cover the second ILD layer. A source electrode and a drain electrode are formed on the third ILD layer. A passivation layer is formed on the source electrode and the drain electrode. A pixel electrode is formed on the passivation layer. A pixel structure manufactured by the above-mentioned method is also provided.
    Type: Application
    Filed: May 29, 2013
    Publication date: September 25, 2014
    Inventors: Ssu-Hui Lu, Ming-Hsien Lee
  • Publication number: 20140284607
    Abstract: In this embodiment, a mask material is formed above a film to be processed, and a plurality of sacrifice films are formed above the mask material, each of the sacrifice films having a columnar shape. Then, a sidewall film is formed on a sidewall of the sacrifice films, and then the sacrifice films are removed. Thereafter, the sidewall films are caused to flow. In addition, a plurality of holes are formed in the mask material using the sidewall film as a mask. Then, isotropic etching is performed for the mask material to etch back the sidewall of the mask material with respect to a sidewall of the sidewall film by a first distance. Thereafter, a deposition layer is deposited inside the plurality of holes to close an opening of the plurality of holes with the deposition layer. Anisotropic etching is conducted to remove the deposition layer in the opening.
    Type: Application
    Filed: December 27, 2013
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki FUKUZUMI, Hideaki Aochi
  • Publication number: 20140284608
    Abstract: A laser annealing apparatus reduces laser annealing time and has a simple configuration. A laser annealing method is used to manufacture a display apparatus. The laser annealing apparatus includes a mounting unit, a substrate mounted on the mounting unit, first and second driving modules installed on the mounting unit and adjusting locations of first and second mark masks to be placed on a part of the substrate, first and second image modules that may obtain image data regarding the first and second mark masks to be location-adjusted by first and second driving modules, and a laser module that radiates a laser beam to the substrate and changes at least a part of an amorphous silicon layer of the substrate to crystalline silicon.
    Type: Application
    Filed: July 16, 2013
    Publication date: September 25, 2014
    Inventors: Cheol-Ho Park, Byung-Sul Kim, Jong-Hyun Yun, Hee-Geun Son
  • Publication number: 20140284609
    Abstract: A method of manufacturing an III-N substrate includes bonding a Si substrate to a support substrate, the Si substrate having a (111) growth surface facing away from the support substrate, thinning the Si substrate at the (111) growth surface to a thickness of 100 ?m or less, and forming III-N material on the (111) growth surface of the Si substrate after the Si substrate is thinned. The support substrate has a coefficient of thermal expansion more closely matched to that of the III-N material than the Si substrate. Other methods of manufacturing an III-N substrate are disclosed, as well as the corresponding wafer structures.
    Type: Application
    Filed: March 25, 2013
    Publication date: September 25, 2014
    Inventor: Martin Vielemeyer
  • Publication number: 20140284610
    Abstract: According to an embodiment, a semiconductor device includes a conductive substrate, a Schottky barrier diode, and a field-effect transistor. The Schottky barrier diode is mounted on the conductive substrate and includes an anode electrode and a cathode electrode. The anode electrode is electrically connected to the conductive substrate. The field-effect transistor is mounted on the conductive substrate and includes a source electrode, a drain electrode, and a gate electrode. The source electrode of the field-effect transistor is electrically connected to the cathode electrode of the Schottky barrier diode. The gate electrode of the field-effect transistor is electrically connected to the anode electrode of the Schottky barrier diode.
    Type: Application
    Filed: August 30, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira YOSHIOKA, Yasunobu SAITO, Hidetoshi FUJIMOTO, Takeshi UCHIHARA, Naoko YANASE, Toshiyuki NAKA, Tetsuya OHNO, Tasuku ONO
  • Publication number: 20140284611
    Abstract: According to one embodiment, a method for manufacturing a semiconductor light-emitting device includes growing a semiconductor film including a group III nitride semiconductor on a silicon substrate, dividing the grown semiconductor film into a plurality of sections by selectively removing the semiconductor film, forming an aluminum film to cover the semiconductor film, removing the aluminum film selectively, oxidizing the remained aluminum film, and removing the silicon substrate.
    Type: Application
    Filed: September 3, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuhiro AKIYAMA, Shuji ITONAGA
  • Publication number: 20140284612
    Abstract: A light emitting diode includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer stacked on a face of the substrate successively, a first electrode electrically connected to the first semiconductor layer, and a second electrode electrically connected to the second semiconductor layer. The first semiconductor layer is disposed adjacent to the substrate. A plurality of nanoscale holes are defined in the face of the substrate contacting the first semiconductor layer. A method for manufacturing the light emitting diode is also provided.
    Type: Application
    Filed: September 10, 2013
    Publication date: September 25, 2014
    Applicant: Hon Hai Precision Industry Co., Ltd.
    Inventor: CHIH-CHEN LAI
  • Publication number: 20140284613
    Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer, a gate electrode provided above the nitride semiconductor layer, a source electrode provided above the nitride semiconductor layer, a drain electrode provided above the nitride semiconductor layer at a side opposite to the source electrode with respect to the gate electrode, a first silicon nitride film provided above the nitride semiconductor layer between the drain electrode and the gate electrode, and a second silicon nitride film provided between the nitride semiconductor layer and the gate electrode, an atomic ratio of silicon to nitrogen in the second silicon nitride film being lower than an atomic ratio of silicon to nitrogen in the first silicon nitride film.
    Type: Application
    Filed: March 17, 2014
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Kuraguchi, Akira Yoshioka, Miki Yumoto, Hisashi Saito, Kohei Oasa, Toru Sugiyama
  • Publication number: 20140284614
    Abstract: Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.
    Type: Application
    Filed: June 9, 2014
    Publication date: September 25, 2014
    Inventors: Anton deVilliers, Erik Byers, Scott E. Sills
  • Publication number: 20140284615
    Abstract: A method for manufacturing a silicon carbide device includes providing a silicon carbide wafer and manufacturing a mask layer on top of the silicon carbide wafer. Further, the method includes structuring the mask layer at an edge of a silicon carbide device to be manufactured, so that the mask layer includes a bevel at the edge of the silicon carbide device to be manufactured. Additionally, the method includes etching the mask layer and the silicon carbide wafer by a mutual etching process, so that the bevel of the mask layer is reproduced at the edge of the silicon carbide device.
    Type: Application
    Filed: March 22, 2013
    Publication date: September 25, 2014
    Applicant: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Ralf Otremba, Jens Konrath
  • Publication number: 20140284616
    Abstract: A method for forming nanostructures includes bonding a flexible substrate to a crystalline semiconductor layer having a two-dimensional material formed on a side opposite the flexible substrate. The crystalline semiconductor layer is stressed in a first direction to initiate first cracks in the crystalline semiconductor layer. The first cracks are propagated through the crystalline semiconductor layer and through the two-dimensional material. The stress of the crystalline semiconductor layer is released to provide parallel structures including the two-dimensional material on the crystalline semiconductor layer.
    Type: Application
    Filed: August 14, 2013
    Publication date: September 25, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christos D. Dimitrakopoulos, Jeehwan Kim, Hongsik Park, Byungha Shin
  • Publication number: 20140284617
    Abstract: According to embodiments, a semiconductor device includes an insulating substrate, a first electrode plate disposed on the insulating substrate, a second electrode plate disposed on the insulating substrate, a third electrode plate disposed on the insulating substrate, a first semiconductor element disposed on the first electrode plate, a first electrode of the first semiconductor element being electrically connected to the first electrode plate, a second semiconductor element disposed on the second electrode plate, a first electrode of the second semiconductor element being electrically connected to the second electrode plate, a first bonding wire electrically connecting a second electrode of the first semiconductor element to the third electrode plate, and a second bonding wire electrically connecting a second electrode of the second semiconductor element to the third electrode plate.
    Type: Application
    Filed: September 3, 2013
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yoko SAKIYAMA
  • Publication number: 20140284618
    Abstract: An aspect of the present embodiment, there is provided a semiconductor device, including a first electrode, a first semiconductor layer having a first conductive type connected to the first electrode, a second semiconductor layer having a second conductive type contacted to the first semiconductor layer, a third semiconductor layer having the first conductive type, an impurity concentration of the third semiconductor layer being smaller than an impurity concentration of the second semiconductor layer, the third semiconductor layer contacting to the second semiconductor layer to be separated from the first semiconductor layer by the second semiconductor layer, a gate insulator provided on the second semiconductor layer, and the first semiconductor layer and the third semiconductor layer arranged at both sides of the second semiconductor layer, respectively, a gate electrode on the gate insulator; and a second electrode connected to the third semiconductor layer.
    Type: Application
    Filed: September 10, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Makoto Mizukami
  • Publication number: 20140284619
    Abstract: An SiC epitaxial wafer of an embodiment includes, an SiC substrate, and a p-type first SiC epitaxial layer that is formed on the SiC substrate and contains a p-type impurity and an n-type impurity. An element A and an element D being a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus) when the p-type impurity is the element A and the n-type impurity is the element D. The ratio of the concentration of the element D to the concentration of the element A in the combination(s) is higher than 0.33 but lower than 1.0.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Johji NISHIO, Tatsuo Shimizu, Chiharu Ota, Takashi Shinohe
  • Publication number: 20140284620
    Abstract: A semiconductor device of an embodiment includes an n-type SiC substrate, an n-type SiC layer formed on the SiC substrate; a p-type first SiC region formed in the surface of the SiC layer and contains a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D being a combination of Al, Ga, or In and N, and/or a combination of B and P, the ratio of the concentration of the element D to the concentration of the element A in the combination(s) being higher than 0.33 but lower than 0.995, the concentration of the element A forming part of the combination(s) being not lower than 1×1017 cm?3 and not higher than 1×1022 cm?3, a first electrode, and a second electrode.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Chiharu OTA, Tatsuo Shimizu, Johji Nishio, Takashi Shinohe
  • Publication number: 20140284621
    Abstract: A semiconductor device of an embodiment includes an n-type SiC impurity region containing a p-type impurity and an n-type impurity. Where the p-type impurity is an element A and the n-type impurity is an element D, the element A and the element D form a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus). The ratio of the concentration of the element A to the concentration of the element D in the above combination is higher than 0.40 but lower than 0.95, and the concentration of the element D forming the above combination is not lower than 1×1018 cm?3 and not higher than 1×1022 cm?3.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo SHIMIZU, Johji Nishio, Chiharu Ota, Takashi Shinohe