Abstract: In one embodiment, the present invention includes a method for forming a logic device, including forming an n-type semiconductor device over a silicon (Si) substrate that includes an indium gallium arsenide (InGaAs)-based stack including a first buffer layer, a second buffer layer formed over the first buffer layer, a first device layer formed over the second buffer layer. Further, the method may include forming a p-type semiconductor device over the Si substrate from the InGaAs-based stack and forming an isolation between the n-type semiconductor device and the p-type semiconductor device. Other embodiments are described and claimed.

Abstract: A semiconductor device including a heterostructure having at least one low-resistivity p-type GaSb quantum well is provided. The heterostructure includes a layer of In0.52Al0.48As on an InP substrate, where the In0.52Al0.48As is lattice matched to InP, followed by an AlAsxSb1-x buffer layer on the In0.52Al0.48As layer, an AlAsxSb1-x spacer layer on the AlAsxSb1-x buffer layer, a GaSb quantum well layer on the AlAsxSb1-x spacer layer, an AlAsxSb1-x barrier layer on the GaSb quantum well layer, an In0.2Al0.8Sb etch-stop layer on the AlAsxSb1-x barrier layer, and an InAs cap. The semiconductor device is suitable for use in low-power electronic devices such as field-effect transistors.

Abstract: According to one embodiment, a semiconductor light emitting element includes a first semiconductor layer of an n-type, a second semiconductor layer of a p-type, and a light emitting unit. The first semiconductor layer includes a nitride semiconductor. The second semiconductor layer includes a nitride semiconductor. The light emitting unit is provided between the first semiconductor layer and the second semiconductor layer. The light emitting unit includes a plurality of well layers stacked alternately with a plurality of barrier layers. The well layers include a first p-side well layer most proximal to the second semiconductor layer, and a second p-side well layer second most proximal to the second semiconductor layer. A localization energy of excitons of the first p-side well layer is smaller than a localization energy of excitons of the second p-side well layer.

Abstract: Type-switching transistors, electronic devices including the same, and methods of operating thereof are provided. A type-switching transistor may include a plurality of gates corresponding to a channel layer. The plurality of gates may include a first gate for switching a type of the transistor and a second gate for controlling ON/OFF characteristics of the channel layer. The first and second gates may be disposed on one side of the channel layer so that the channel layer is not disposed between the first and second gates.

Abstract: Disclosed is a white light-emitting organic electroluminescent device, which is excellent in stability of emission chromaticity over a long operation period, while having high electrical efficiency, long life, excellent storage stability and excellent color rendering properties. Also disclosed is an illuminating device using such an organic electroluminescent device. Specifically disclosed is an organic electroluminescent device having a light-emitting layer between an anode and a cathode, which is characterized by comprising a light-emitting layer A having a maximum emission wavelength of not more than 480 nm and containing a phosphorescent dopant having a maximum emission wavelength of not more than 480 nm, and a light-emitting layer B arranged between the light-emitting layer A and the anode, which has a maximum emission wavelength of not less than 510 nm and contains a phosphorescent dopant.

Abstract: The invention relates to an organic memory with an electrode and a counter-electrode, comprising at least one oxide layer, an electrically undoped organic layer and an electrically doped organic layer between the electrode and the counter-electrode, wherein the oxide layer is adjacent to the electrode and the undoped organic layer.

Abstract: In one aspect, an organic light-emitting display apparatus is provided including a first sub-pixel, a second sub-pixel, and a third sub-pixel that are each a different color, the apparatus including: a substrate; a first electrode disposed on the substrate; a second electrode disposed on the first electrode so as to face the first electrode; an organic emission layer disposed between the first electrode and the second electrode and comprising a first organic emission layer, a second organic emission layer, and a third organic emission layer; a hole transport layer disposed between the first electrode and the organic emission layer; and an electron accepting layer disposed between the first electrode and the second electrode. The organic light-emitting display apparatus has improved image quality and lifetime.

Abstract: The present invention provides a photovoltaic cell having a large short-circuit current density and a large photoelectric conversion efficiency.

Abstract: A method of making an electronic device comprising a double bank well-defining structure, which method comprises: providing an electronic substrate; depositing a first insulating material on the substrate to form a first insulating layer; depositing a second insulating material on the first insulating layer to form a second insulating layer; removing a portion of the second insulating layer to expose a portion of the first insulating layer and form a second well-defining bank; depositing a resist on the second insulating layer and on a portion of the exposed first insulating layer; removing the portion of the first insulating layer not covered by the resist, to expose a portion of the electronic substrate and form a first well-defining bank within the second well-defining bank; and removing the resist. The method can provide devices with reduced leakage currents.

Abstract: The invention relates to novel metal-organic materials for hole injection layers in organic electronic components. For example, in light-emitting components such as organic light diodes (OLED) or organic light-emitting electrochemical cells (OLEEC) or organic field effect transistors or organic solar cells or organic photo detectors. Luminescence (cd/m2), efficiency (cd/A), and service life (h) of organic electronic components such as from organic light diodes in particular are highly dependent on the exciton thickness in the light-emitting layer and on the quality of the charge carrier injection and are also limited by same, among other things. The invention relates to a hole injection layer consisting of quadratic planar mononuclear transition metal complexes such as copper 2+ complexes, for example, which are embedded into a hole-conducting matrix.

Abstract: An organic light-emitting display apparatus includes a substrate, a plurality of organic light-emitting diodes on the substrate, and a plurality of capacitors located next to at least one side of one of the organic light-emitting diodes. The capacitors are arranged inside trenches within the substrate.

Abstract: A organic EL display panel and similar are provided so as to constrain a gradual increase in contact resistance between a common electrode and a power supply layer. In a panel including a substrate, a pixel electrode, a power supply layer formed with separation from the pixel electrode, a resin partition layer having an aperture over the power supply layer and over the pixel electrode, an organic light-emitting layer, a functional layer in contact with the organic light-emitting layer in the aperture and electrically connected to the power supply layer, and a common electrode, an inorganic film is disposed between the functional layer and side walls of an opening for the aperture over the power supply layer in the resin partition layer.

Abstract: The present disclosure provides an organic light emitting diode (OLED) pixel structure and an OLED panel. The pixel structure comprises a plurality of colored light emitting zones arranged in parallel. The colored light emitting zone of each color is divided into a second zone, a first zone, and a third zone. A distance is set between the second zone and the first zone, and a distance is set between the second zone and the third zone. Anodes of the first zone, the second zone, and the third zone are connected with a first reference voltage by a thin film transistor (TFT), a cathode of the second zone is connected to a second reference voltage, a cathode of the first zone is connected to a first interface, and a cathode of the third zone is connected to a second interface.

Abstract: Laser pyrolysis reactor designs and corresponding reactant inlet nozzles are described to provide desirable particle quenching that is particularly suitable for the synthesis of elemental silicon particles. In particular, the nozzles can have a design to encourage nucleation and quenching with inert gas based on a significant flow of inert gas surrounding the reactant precursor flow and with a large inert entrainment flow effectively surrounding the reactant precursor and quench gas flows. Improved silicon nanoparticle inks are described that has silicon nanoparticles without any surface modification with organic compounds. The silicon ink properties can be engineered for particular printing applications, such as inkjet printing, gravure printing or screen printing. Appropriate processing methods are described to provide flexibility for ink designs without surface modifying the silicon nanoparticles.

Abstract: An organic light-emitting diode includes a substrate, a first electrode on the substrate, a second electrode facing the first electrode, an emission layer interposed between the first electrode and the second electrode, a hole transportation region between the first electrode and the emission layer, and an electron transportation region interposed between the emission layer and the second electrode. The hole transportation region includes a first compound represented by Formula 1 below, and at least one of the hole transportation region and the emission layer includes a second compound represented by Formula 100 below: wherein Ar101, Ar102, xa, xb, R101-R119, Ar50, Ar60, R51-R60 and p are further defined.

Abstract: A light emitting device includes a pixel defining layer including a plurality of pixel defining layer elements, on a substrate; a first electrode in a space defined by the substrate and the pixel defining layer; a light emitting layer in a space defined by the first electrode and the pixel defining layer; and a second electrode on the light emitting layer and the pixel defining layer. The second electrode includes a plurality of layers, and an insulating layer between the plurality of layers, overlapping the light emitting layer, and exposing a layer among the plurality of layers in an area corresponding to the pixel defining layer.

Abstract: An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a substrate, an organic light-emitting portion, a sealing member, and first and second connecting members. The organic light-emitting portion includes a first electrode positioned on the substrate, an organic light-emitting layer formed on the first electrode, and a second electrode formed on the organic light-emitting layer. The sealing member includes a first conductive layer positioned on the organic light-emitting portion and electrically connected to the second electrode, a second conductive layer electrically connected to the first electrode, and an insulating layer interposed between the first and second conductive layers. The first connecting member is connected to the first conductive layer to supply a first power source, and the second connecting member is connected to the second conductive layer to supply a second power source.

Abstract: An organic light emitting diode (OLED) display includes a pixel part on a substrate, the pixel part being configured to display an image, a peripheral part at a peripheral area of the pixel part, the peripheral part including a chip on film connection part, and a chip on film connected to the chip on film connection part, the chip on film connection part including a chip on film bonding part, the chip on film being attached to the chip on film bonding part, and an array test part separated from the chip on film bonding part, the array test part being contacted with a probe pin.

Abstract: The invention concerns apolymer of the formula (I): wherein: M1 is an optionally substituted dithienophthalimide formula (II): wherein: X is N or C—R, wherein R is H or a C1-C40 alkyl group, R2, at each occurrence, is independently selected from H, a C1-40 alkyl group, a C2-40 alkenyl group, a C1-40 haloalkyl group, and a monocyclicor polycyclic moiety, wherein: each of the C1-40 alkyl group, the C2-40 alkenyl group, and the C1-40 haloalkyl group can be optionally substituted with 1-10 substituents independently selected from a halogen, CN, —NO2, OH, NH2, —NH(C1-20 alkyl), N(C1-20 alkyl)2, —S(O)2OH, —CHO, —C(O)—C1-20 alkyl, —C(O)OH, —C(O)—OC1-20 alkyl, —C(O)NH2, —C(O)NH—C1-20 alkyl, —C(O)N(C1-20 alkyl)2, —OC1-20 alkyl, —SiH3, —SiH(C1-20 alkyl)2, —SiH2(C1-20 alkyl), and —Si(C1-20 alkyl)3; and the monocyclic or polycyclic moiety can be covalently bonded to the imide nitrogen via an optional linker, and can be optionally substituted with 1-5 substituentsindependently selected from a halogen, oxo, —CN, —NO2, OH,

Abstract: An organic ambipolar light emitting field effect transistor having an architecture with layers stacked one over the other, adapted to generate a diffused illumination is described.

Abstract: An organic light emitting diode display and a manufacturing method thereof, and more particularly, an organic light emitting diode display having improved light extraction efficiency by forming both a first electrode and a second electrode as reflective electrodes to guide generated light to the side of a pixel, and a manufacturing method thereof.

Abstract: It is an object to provide a semiconductor device having a new productive semiconductor material and a new structure. The semiconductor device includes a first conductive layer over a substrate, a first insulating layer which covers the first conductive layer, an oxide semiconductor layer over the first insulating layer that overlaps with part of the first conductive layer and has a crystal region in a surface part, second and third conductive layers formed in contact with the oxide semiconductor layer, an insulating layer which covers the oxide semiconductor layer and the second and third conductive layers, and a fourth conductive layer over the insulating layer that overlaps with part of the oxide semiconductor layer.

Abstract: It is an object to provide a method for manufacturing a highly reliable semiconductor device having a thin film transistor formed using an oxide semiconductor and having stable electric characteristics. The semiconductor device includes an oxide semiconductor film overlapping with a gate electrode with a gate insulating film interposed therebetween; and a source electrode and a drain electrode which are in contact with the oxide semiconductor film. The source electrode and the drain electrode include a mixture, metal compound, or alloy containing one or more of a metal with a low electronegativity such as titanium, magnesium, yttrium, aluminum, tungsten, and molybdenum. The concentration of hydrogen in the source electrode and the drain electrode is 1.2 times, preferably 5 times or more as high as that of hydrogen in the oxide semiconductor film.

Abstract: A metal oxide semiconductor structure and a production method thereof, the structure including: a substrate; a gate electrode, deposited on the substrate; a gate insulation layer, deposited over the gate electrode and the substrate; an IGZO layer, deposited on the gate insulation layer and functioning as a channel; a source electrode, deposited on the gate insulation layer and being at one side of the IGZO layer; a drain electrode, deposited on the gate insulation layer and being at another side of the IGZO layer; a first passivation layer, deposited over the source electrode, the IGZO layer, and the drain electrode; a second passivation layer, deposited over the first passivation layer; and an opaque resin layer, deposited over the source electrode, the second passivation layer, and the drain electrode.

Abstract: In an embodiment, an insulating film is formed over a flat surface; a mask is formed over the insulating film; a slimming process is performed on the mask; an etching process is performed on the insulating film using the mask; a conductive film covering the insulating film is formed; a polishing process is performed on the conductive film and the insulating film, so that the conductive film and the insulating film have equal thicknesses; the conductive film is etched, so that a source electrode and a drain electrode which are thinner than the conductive film are formed; an oxide semiconductor film is formed in contact with the insulating film, the source electrode, and the drain electrode; a gate insulating film covering the oxide semiconductor film is formed; and a gate electrode is formed in a region which is over the gate insulating film and overlaps with the insulating film.

Abstract: In a semiconductor device including a transistor using an oxide semiconductor film, stable electric characteristics can be provided and high reliability can be achieved. A structure of the semiconductor device, which achieves high-speed response and high-speed operation, is provided. In a semiconductor device including a transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in order and a sidewall insulating layer is provided on the side surface of the gate electrode layer, the sidewall insulating layer has an oxygen-excess regions, which is formed in such a manner that a first insulating film is formed and then is subjected to oxygen doping treatment, a second insulating is formed over the first insulating film, and a stacked layer of the first insulating film and the second insulating film are etched.

Abstract: A thin film transistor is provided. The thin film transistor includes a gate electrode, a gate insulating film, and an oxide semiconductor film, wherein at least a portion of the gate electrode includes a metal oxide. An electric device and a display device that include the thin film transistor are also provided in addition to a manufacture method.

Abstract: To provide an oxide semiconductor film including a low-resistance region, which can be applied to a transistor. To provide a transistor including the oxide semiconductor film, which can perform at high speed. To provide a high-performance semiconductor device including the transistor including the oxide semiconductor film, which can perform at high speed, with high yield. A film having a reducing property is formed over the oxide semiconductor film. Next, part of oxygen atoms are transferred from the oxide semiconductor film to the film having a reducing property. Next, an impurity is added to the oxide semiconductor film through the film having a reducing property and then, the film having a reducing property is removed, so that a low-resistance region is formed in the oxide semiconductor film.

Abstract: To give favorable electrical characteristics to a semiconductor device. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a pair of electrodes over the semiconductor layer and each electrically connected to the semiconductor layer, a gate electrode over the semiconductor layer, and a gate insulating layer between the semiconductor layer and the gate electrode. The insulating layer includes an island-shaped projecting portion. A top surface of the projecting portion of the insulating layer is in contact with a bottom surface of the semiconductor layer, and is positioned on an inner side of the semiconductor layer when seen from above. The pair of electrodes covers part of a top surface and part of side surfaces of the semiconductor layer. Furthermore, the gate electrode and the gate insulating layer cover side surfaces of the projecting portion of the insulating layer.

Abstract: The present invention provides a thin film or laminate which ensures switching capabilities by phase transition of Mott transition at room temperature. An embodiment of the present invention provides a manganese oxide thin film 2 formed on a plane of a substrate 1 and having a composition represented by a composition formula RMnO3 (where R is at least one trivalent rare earth element selected from lanthanoids), wherein an atomic layer containing an element R and not containing Mn and an atomic layer containing Mn and not containing the element R are alternately stacked along a direction perpendicular to the plane of the substrate, and the manganese oxide thin film has two nonequivalent crystal axes along an in-plane direction of the plane of the substrate. An aspect of the present invention also provides an oxide laminate having the manganese oxide thin film 2 of the above aspect to which strongly-correlated oxide thin film 3, 31 or 32 are formed contiguously.

Abstract: The invention relates to an electronic device for measuring and/or controlling a property of an analyte (100). The electronic device comprises: i) an electrode (Snsr) forming an interface with the analyte (100) in which the electrode (Snsr) is immersed in operational use, the interface having an interface temperature (T), and ii) a resistive heater (Htr) being thermally and capacitively coupled to the electrode (Snsr), the resistive heater (Htr) being configured for setting the interface temperature (T) by controlling a current through the resistive heater (Htr). The resistive heater (Htr) is provided with signal integrity protection for reducing the capacitive charging of the electrode (Snsr) by the resistive heater (Htr) if the current through the resistive heater (Htr) is modulated.

Abstract: A method of testing an integrated circuit (IC) chip and a related test structure are disclosed. A test structure includes a monitor chain proximate to at least one solder bump pad, the monitor chain including at least one metal via stack, each metal via stack extending from a lower metal layer in the IC chip to an upper metal layer in the IC chip, such that the monitor chain forms a continuous circuit proximate to the at least one solder bump pad, and where each metal via stack is positioned substantially under the solder bump. A method for testing to detect boundaries of safe effective modulus includes performing a stress test on an IC chip containing the test structure joined to a semiconductor package.

Abstract: In an example, the present invention includes an integrated system on chip device. The device has a self test block configured on the silicon photonics device and to be operable during a test operation, the self test block comprising a broad band source configured to emit electromagnetic radiation from 1200 nm to 1400 nm or 1500 to 1600 nm to a multiplexer device. In an example, a self test output is configured to a spectrum analyzer device external to the silicon photonics device.

Abstract: A memory device is provided, which includes a first conductive layer, a second conductive layer, and a memory layer interposed between the first conductive layer and the second conductive layer. The memory layer includes a first portion and a second portion, each of which includes at least a nanoparticle. The nanoparticle includes a conductive material coated with an organic film. The first portion is in contact with the first conductive layer and the second conductive layer, and a side surface of the first portion is surrounded by the second portion.

Abstract: A manufacturing method of a thin film transistor array panel includes: simultaneously forming a gate conductor and a first electrode on a substrate, using a non-peroxide-based etchant; forming a gate insulating layer on the gate conductor and the first electrode; forming a semiconductor, a source electrode, and a drain electrode on the gate insulating layer; forming a passivation layer on the semiconductor, the source electrode, and the drain electrode; and forming a second electrode layer on the passivation layer.

Abstract: The present invention provides a thin film transistor including a first drain electrode, a second drain electrode, a first source electrode, and a second source electrode, wherein the first drain electrode and the first source electrode jointly define a first U-shaped channel facing toward a first direction. Wherein the second drain electrode and the second source electrode jointly define a second U-shaped channel facing a second direction which is different to the first direction, wherein the bottom width of the second U-shaped channel is larger then the bottom width of the first U-shaped channel. The present invention further provides an array substrate of the thin film transistor, and a method for making the array substrate. By way of the forgoing, short-circuit between the source electrode and the drain electrode resulted from the cleaning agent residue located in the bottom of the U-shaped channel of the thin film transistor can be avoided.

Abstract: An array substrate of a liquid crystal display device and a method of fabricating the array substrate. A gate electrode of a thin film transistor of the array substrate is formed. The gate electrode has an edge region surrounding an interior region of the gate electrode and the edge region of the gate electrode is thicker than the interior region of the gate electrode. A semiconductor layer is formed over the gate electrode. A source electrode and a drain electrode of the thin film transistor are formed that define a channel region in the semiconductor layer. The channel region is located over the interior region of the gate electrode. Additionally, the gate electrode may be formed with a half-tone mask that results in the edge region of the gate electrode being thicker than the interior region of the gate electrode.

Abstract: An MOSFET includes a silicon carbide substrate, an active layer, a gate oxide film, and a gate electrode. The active layer includes a body region where an inversion layer is formed at a region in contact with the gate oxide film by application of voltage to the gate electrode. The body region includes a low concentration region arranged at a region where an inversion layer is formed, and containing impurities of low concentration, and a high concentration region adjacent to the low concentration region in the carrier mobile direction in the inversion layer, arranged in a region where the inversion layer is formed, and containing impurities higher in concentration than in the low concentration region.

Abstract: A Schottky barrier diode and a method of manufacturing the diode are provided. The diode includes an n? type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate and a plurality of p+ regions disposed within the n? type epitaxial layer. An n+ type epitaxial layer is disposed on the n? type epitaxial layer, a Schottky electrode is disposed on the n+ type epitaxial layer, and an ohmic electrode is disposed on a second surface of the n+ type silicon carbide substrate. The n+ type epitaxial layer includes a plurality of pillar parts disposed on the n? type epitaxial layer and a plurality of openings disposed between the pillar parts and that expose the p+ regions. Each of the pillar parts includes substantially straight parts that contact the n? type epitaxial layer and substantially curved parts that extend from the substantially straight parts.

Abstract: Provided are a technology that simply forms a particular crystal surface such as a {03-38} surface having high carrier mobility in trench sidewalls and a SiC semiconductor element where most of the trench sidewalls appropriate for a channel member are formed from {03-38} surfaces. A trench structure formed in a (0001) surface or an off-oriented surface of a (0001) surface with an offset angle 8° or lower of SiC is provided. The channel member is in the trench structure. At least 90% of the area of the channel member is a {03-38} surface or a surface that a {03-38} surface offset by an angle from ?8° to 8° in the <1-100> direction. Specifically, the trench sidewalls are finished to {03-38} surfaces by applying a thermal etching to a trench with (0001) surfaces of SiC. Thermal etching is conducted in a chlorine atmosphere above 800° C. with nitrogen gas as the carrier.

Abstract: This semiconductor device includes a silicon carbide layer of a first conductivity type having first and second principal surfaces and including an element region and a terminal region surrounding the element region on the first principal surface. The silicon carbide layer includes a first dopant layer of the first conductivity type contacting with the first principal surface and a second dopant layer of the first conductivity type located closer to the second principal surface than the first dopant layer is. The terminal region has, in its surface portion with a predetermined depth under the first principal surface, a terminal structure including respective portions of the first and second dopant layers and a ring region of a second conductivity type running through the first dopant layer to reach the second dopant layer. The dopant concentration of the first dopant layer is twice to five times as high as that of the second dopant layer 22.

Abstract: Provided are a quantum dot laser diode and a method of manufacturing the same. The method of manufacturing a quantum dot laser diode includes the steps of: forming a grating structure layer including a plurality of gratings on a substrate; forming a first lattice-matched layer on the grating structure layer; forming at least one quantum dot layer having at least one quantum dot on the first lattice-matched layer; forming a second lattice-matched layer on the quantum dot layer; forming a cladding layer on the second lattice-matched layer; and forming an ohmic contact layer on the cladding layer. Consequently, it is possible to obtain high gain at a desired wavelength without affecting the uniformity of quantum dots, so that the characteristics of a laser diode can be improved.

Abstract: An optical semiconductor package has a base material that includes a principal surface, an optical semiconductor element that is located on the principal surface of the base material to project or receive light, and an optical transparency sealing layer that seals the optical semiconductor element while covering the principal surface of the base material. An air gap having a shape surrounding an optical axis of the optical semiconductor element is provided in the optical transparency sealing layer such that the light is reflected by an interface of a portion corresponding to an inner circumferential surface of the air gap in an interface formed by the air gap and the optical transparency sealing layer.

Abstract: A luminous vehicle glazing containing: a first sheet having a first and a second main face; a peripheral light source, the emitting face facing an injection side, which is a side of the second face; a surface diffusion extractor, which extracts the guided light via the first and/or the second main face, or a volume diffusion extractor in the first sheet; a fluid-tight cap, which covers the peripheral light source and is impermeable to liquid water or water vapor, wherein the cap is a facial cap, faces the second face, joined by a fastening element, and associated with an interfacial sealing element.

Abstract: Embodiments of the invention pertain to a method and apparatus for sensing infrared (IR) radiation. In a specific embodiment, a night vision device can be fabricated by depositing a few layers of organic thin films. Embodiments of the subject device can operate at voltages in the range of 10-15 Volts and have lower manufacturing costs compared to conventional night vision devices. Embodiments of the device can incorporate an organic phototransistor in series with an organic light emitting device. In a specific embodiment, all electrodes are transparent to infrared light. An IR sensing layer can be incorporated with an OLED to provide IR-to-visible color up-conversion. Improved dark current characteristics can be achieved by incorporating a poor hole transport layer material as part of the IR sensing layer.

Abstract: An electroluminescent display comprising semiconductor nanocrystals, wherein the semiconductor nanocrystals are selected to emit light at a predetermined wavelength and are disposed in a predetermined pattern. In certain embodiments, semiconductor nanocrystals that emit light at different predetermined wavelengths are disposed in the display to create a predetermined multi-color pattern.

Abstract: The present invention provides a multichip LED and method of manufacture in which white light is produced. Specifically, a plurality of electrically interconnected LED chips (e.g., interconnected via red metal wire) is selected for conversion of light to white light. In a typical embodiment, the LED chips comprise: a blue LED chip, a red LED chip, a green LED chip, and a target LED chip whose light output is converted to white light. A wavelength of a light output by one or more of the plurality of chips will be measured. Based on the wavelength measurement, a conformal coating is applied to the one or more of the LED chips. The conformal coating has a phosphor ratio that is based on the wavelength. Moreover, the phosphor ratio is comprised of at least one of the following colors: yellow, green, or red. Using the conformal coating the light output of the target LED is then converted to white light.

Abstract: A technique of manufacturing a display device with high productivity is provided. In addition, a high-definition display device with high color purity is provided. By adjusting the optical path length between an electrode having a reflective property and a light-emitting layer by the central wavelength of a wavelength range of light passing through a color filter layer, the high-definition display device with high color purity is provided without performing selective deposition of light-emitting layers. In a light-emitting element, a plurality of light-emitting layers emitting light of different colors are stacked. The closer the light-emitting layer is to the electrode having a reflective property, the longer the wavelength of light emitted from the light-emitting layer is.

Abstract: An aggregation of semiconductor devices, comprising: a first layer comprising a first surface and a second surface; a second layer comprising a first region and a second region; and a plurality of semiconductor devices disposed between the first layer and the second region wherein a shape of the second region comprises a curve and a mark.

Abstract: The present invention is characterized in that a transistor with its L/W set to 10 or larger is employed, and that |VDS| of the transistor is set equal to or larger than 1 V and equal to or less than |VGS?Vth|. The transistor is used as a resistor so that the resistance of a light emitting element can be held by the transistor. This slows down an increase in internal resistance of the light emitting element and the resultant current value reduction. Accordingly, a change with time in light emission luminance is reduced and the reliability is improved.