Abstract: A containment system is disclosed, the containment system including a wall member with a plurality of corrugations, each corrugation extending horizontally along a length of the wall member. Each of a multiplicity of the corrugations has openings therein, and at least some of the openings in the corrugations at least partially align to form an upright keyway through the wall member. The system further includes a bracket that has a plurality of corrugation-receiving spaces therein. The wall member is positioned with corrugations in respective corrugation-receiving spaces. The system also includes a locking member received in the upright keyway of the wall member and positioned such that interaction between the locking member and portions of the bracket prevent the wall member from being pulled away from the bracket.

Abstract: A semiconductor device includes a first electrode on a substrate, a selection device pattern, a variable resistance layer pattern, a first protective layer pattern, a second protective layer pattern and a second electrode. The selection device pattern is wider, in a given direction, than the variable resistance layer pattern. The first protective layer pattern is formed on a first pair of opposite sides of the variable resistance layer pattern. The second protective layer pattern is formed on a second pair of opposite of the variable resistance layer pattern. The second electrode is disposed on the variable resistance layer pattern.

Abstract: A semiconductor device according to the present invention comprises a first pillar-shaped semiconductor layer, a gate insulating film formed around the first pillar-shaped semiconductor layer, a gate electrode made of a metal and formed around the gate insulating film, a gate line made of a metal and connected to the gate electrode, a second gate insulating film formed around an upper portion of the first pillar-shaped semiconductor layer, a first contact made of a second metal and formed around the second gate insulating film, a second contact which is made of a third metal and which connects an upper portion of the first contact to an upper portion of the first pillar-shaped semiconductor layer, a second diffusion layer formed in a lower portion of the first pillar-shaped semiconductor layer, a pillar-shaped resistance-changing layer formed on the second contact, a reset gate insulating film that surrounds the pillar-shaped resistance-changing layer, and a reset gate that surrounds the reset gate insulating

Abstract: A flexible and/or transparent nonvolatile memory device can be fabricated on flexible substrates, together with ductile materials or transparent conductive oxide materials, and layers with thicknesses that allow flexibility and transparency. The ductile materials can include Ti, Ni, Nb, or Zr. The transparent conductive materials can include indium tin oxide, zinc oxide or aluminum doped zinc oxide. The nonvolatile memory devices can include resistive switching memory, phase change memory, magnetoresistive random access memory, or spin-transfer torque random access memory.

Abstract: Provided is a three-dimensional resistance memory including a stack of layers. The stack of layers is encapsulated in a dielectric layer and is adjacent to at least one opening in the encapsulating dielectric layer. At least one L-shaped variable resistance spacer is disposed on at least a portion of the sidewall of the opening adjacent to the stack of layers. An electrode layer fills the remaining portion of the opening.

Abstract: A 3D semiconductor device and a method of manufacturing the same are provided. The method includes forming a first semiconductor layer including a common source node on a semiconductor substrate, forming a transistor region on the first semiconductor layer, wherein the transistor region includes a horizontal channel region substantially parallel to a surface of the semiconductor substrate, and source and drain regions branched from the horizontal channel region to a direction substantially perpendicular to the surface of the semiconductor substrate, processing the first semiconductor layer to locate the common source node corresponding to the source region, forming a gate in a space between the source region and the drain region, forming heating electrodes on the source region and the drain region, and forming resistance variable material layers on the exposed heating electrodes.

Abstract: Providing for one time programmable, multi-level cell two-terminal memory is described herein. In some embodiments, the one time programmable, multi-level cell memory can have a 1 diode 1 resistor configuration, per memory cell. A memory cell according to one or more disclosed embodiments can be programmed to one of a set of multiple logical bits, and can be configured to mitigate or avoid erasure. Accordingly, the memory cell can be employed as a single program, non-erasable memory. Expressed differently, the memory cell can be referred to as a write once read many (WORM) category of memory.

Abstract: A nanowire device of the present description may be produced with the incorporation of at least one hardmask during the fabrication of at least one nanowire transistor in order to assist in protecting an uppermost channel nanowire from damage that may result from fabrication processes, such as those used in a replacement metal gate process and/or the nanowire release process. The use of at least one hardmask may result in a substantially damage free uppermost channel nanowire in a multi-stacked nanowire transistor, which may improve the uniformity of the channel nanowires and the reliability of the overall multi-stacked nanowire transistor.

Abstract: A device includes a semiconductor substrate and a vertical nano-wire over the semiconductor substrate. The vertical nano-wire includes a bottom source/drain region, a channel region over the bottom source/drain region, and a top source/drain region over the channel region. A top Inter-Layer Dielectric (ILD) encircles the top source/drain region. The device further includes a bottom ILD encircling the bottom source/drain region, a gate electrode encircling the channel region, and a strain-applying layer having vertical portions on opposite sides of, and contacting opposite sidewalls of, the top ILD, the bottom ILD, and the gate electrode.

Abstract: Disclosed are a light emitting device, a method of fabricating the light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a first conductive semiconductor layer, an AlxInyGa1-x-yN layer (0<x?1 and 0<y?1) on the first conductive semiconductor layer, an active layer on the AlxInyGa1-x-yN layer, and a second conductive semiconductor layer on the active layer.

Abstract: A light emitting device package includes a package substrate, a light emitting device, a resin portion and a light scattering agent. The light emitting device is disposed on the package substrate and includes a plurality of light emitting nanostructures. The resin portion is disposed on the package substrate and seals the light emitting device. The light scattering agent is dispersed in the resin portion and includes a material having a refractive index greater than a refractive index of a material forming the resin portion.

Abstract: There is provided a semiconductor light emitting device including a first conductivity-type semiconductor base layer, a plurality of light emitting nanostructures disposed on the first conductivity-type semiconductor base layer to be spaced apart from one another, each light emitting nanostructure including a first conductivity-type semiconductor core, an active layer and a second conductivity-type semiconductor layer, and a filling layer including a refractive portion disposed between the light emitting nanostructures and a cover portion filled between the light emitting nanostructures and enclosing the refractive portion.

Abstract: A semiconductor light emitting element includes: an n-type semiconductor layer; a super lattice structure layer formed on the n-type semiconductor layer and including repeatedly-formed first semiconductor layers and second semiconductor layers having a composition with a band gap greater than that of the first semiconductor layer; an electron injection control layer including a first control layer formed on the second semiconductor layer of super lattice structure layer and a second control layer formed on the first control layer; and an MQW light emitting layer formed on the second control layer and including repeatedly-formed barrier layers and quantum well layers. The first control layer has a composition with a band gap smaller than that of the second semiconductor layer of super lattice structure layer. The second control layer has a composition and a thickness same as or smaller than those of the quantum well layer of the MQW light emitting layer.

Abstract: Photonic devices monolithically integrated with CMOS are disclosed, including sub-100 nm CMOS, with active layers comprising acceleration regions, light emission and absorption layers, and optional energy filtering regions. Light emission or absorption is controlled by an applied voltage to deposited films on a pre-defined CMOS active area of a substrate, such as bulk Si, bulk Ge, Thick-Film SOI, Thin-Film SOI, Thin-Film GOI.

Abstract: A light emitting diode including a first semiconductor layer, an active layer, and a second semiconductor layer is provided. The first semiconductor layer includes a first surface and a second surface. The active layer and the second semiconductor layer are stacked on the second surface in that order, and a surface of the second semiconductor layer away from the active layer is configured as the light emitting surface. A first electrode is electrically connected with and covers the first surface of the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer. A number of three-dimensional nano-structures are located both on the first surface and second surface, and a cross section of each of the three-dimensional nano-structure is M-shaped.

Abstract: Manipulation of the passivation ligands of colloidal quantum dots and use in QD electronics. A multi-step electrostatic process is described which creates bare QDs, followed by the formation of QD superlattice via electric and thermal stimulus. Colloidal QDs with original long ligands (i.e. oleic acid) are atomized, and loaded into a special designed tank to be washed, followed by another atomization step before entering the doping station. The final step is the deposition of bare QDs onto substrate and growth of QD superlattice. The method permits the formation of various photonic devices, such as single junction and tandem solar cells based on bare QD superlattice, photodetectors, and LEDs. The devices include a piezoelectric substrate with an electrode, and at least one layer of bare quantum dots comprising group IV-VI elements on the electrode, where the bare quantum dots have been stripped of outer-layer ligands.

Abstract: Provided is a graphene switching device including: a graphene layer formed on a substrate; a plurality of semiconductor nanowires on the substrate; a first electrode connected to a second end of the graphene layer; a second electrode on the substrate to face the first electrode so as to be connected to the plurality of semiconductor nanowires; a gate insulating layer on the substrate to cover the graphene layer; and a gate electrode on the gate insulating layer. The gate electrode and the plurality of semiconductor nanowires face each other with the graphene layer therebetween. At least one of the plurality of semiconductor nanowires is connected to at least one of the second electrode, the graphene layer, and the other of the plurality of semiconductor nanowires.

Abstract: A novel emitter compound having the formula Os(L1)(L2)(L3) and a novel method of making such compounds are disclosed. In the formula Os(L1)(L2)(L3), each of L1, L2, and L3 is independently a bidentate ligand. The method includes (a) reacting a precursor of ligand L1 with an osmium precursor to form a first intermediate product that has the ligand L1 coordinated to the osmium, wherein the osmium precursor has the formula OsHx(PR3)y, wherein x is an integer from 2 to 6 and y is an integer from 2 to 5, and R is selected from the group consisting of aryl, alkyl and cycloalkyl; (b) reacting the first intermediate product with a reducing agent to form a Os(II) second intermediate product; (c) reacting the second intermediate product with a coordinating solvent to form a third intermediate product; and (d) reacting a mixture of ligands L2 and L3 with said third intermediate product.

Abstract: A method and apparatus for an OLED display system is presented. A substrate is provided and a display is provided on the substrate. At least one sensor is also provided on the substrate. A barrier is provided on the substrate between the display and said the least one sensor, the barrier blocking emissions from the display from being sensed by the at least one sensor.

Abstract: The present invention provides a method for manufacturing an organic electroluminescence device and an organic electroluminescence device manufactured with the same. The method includes (1) providing a substrate (20); (2) forming a first electrode (21) on the substrate (20); (3) forming a gate insulation layer (22) on the first electrode (21) and the substrate (20); (4) forming a second electrode (23) on the gate insulation layer (22), where the second electrode (23) includes a second metal layer (224) and a transparent conductive layer (222); (5) forming an oxide semiconductor layer (24) on the second electrode (23) and the gate insulation layer (22); (6) forming an organic planarization layer (25) on the oxide semiconductor layer (24) and the second electrode (23); (7) with the organic planarization layer (25) serving as a mask, etching the second metal layer (224) of the second electrode (23) to expose the transparent conductive layer (222) so as to form a transparent electrode (26).

Abstract: The present disclosure relates to an organic light-emitting diode (OLED) device and the method for manufacturing the same. The OLED device includes an OLED substrate, on the inner surface of which a plurality of OLEDs are arranged; and a package substrate arranged opposite to the inner surface of the OLED substrate, wherein the OLED substrate and the package substrate are welded and hermetically connected together through a metal solder located therebetween, so that the OLEDs are hermetically packaged between the OLED substrate and the package substrate. In this OLED device, the OLED substrate and the package substrate are hermetically connected together by using the metal solder, so that water and the oxygen can be prevented from entering a sealed area from the exterior, thus prolonging the service life of the OLED device.

Abstract: A thin film transistor substrate and an organic light-emitting diode (OLED) display are disclosed. In one aspect, the OLED includes a thin film transistor substrate. The thin film transistor substrate includes a substrate, a source electrode formed over the substrate, a drain electrode formed over the substrate and spaced apart from the source electrode, an oxide semiconductor layer, and a gate electrode. The oxide semiconductor layer includes a source area at least partially overlapping the source electrode, a drain area at least partially overlapping the drain electrode, and a channel area formed between the source area and the drain area. The gate electrode, which is insulated from the oxide semiconductor layer, has a first width at a first end thereof, a second width at a second end opposite to the first end thereof and the first width is different from the second width.

Abstract: An organic light emitting display device having a display substrate; a display element layer formed on the display substrate and including a plurality of pixels, a thin film encapsulation layer which covers and protects the display substrate and the display element layer; a function film disposed on the thin film encapsulation layer, a first adhesive layer disposed between the thin film encapsulation layer and the functional film, a window attached onto the functional film which protects the display element layer, and a second adhesive layer disposed between the functional film and the window, in which the first adhesive layer and the second adhesive are formed by deposition, a surface processing is performed, and facing surfaces are adhered with each other.

Abstract: An organic light-emitting component includes a substrate on which a functional layer stack is applied, the stack including a first electrode, an organic functional layer stack thereover including an organic light-emitting layer and a translucent second electrode thereover, and a translucent halogen-containing thin-film encapsulation arrangement over the translucent second electrode, wherein a translucent protective layer having a refractive index of more than 1.6 is arranged directly on the translucent second electrode between the translucent second electrode and the thin-film encapsulation arrangement.

Abstract: A method for producing a conductive substrate including at least an anchor layer and a pattern of conductive thin metal lines on a bare substrate is provided. The method includes the steps of: forming a porous anchor layer mainly composed of an inorganic compound on the bare substrate; forming the pattern of thin metal lines containing metal nanoparticles and a metal complex on the anchor layer; and performing thermal annealing of the pattern of thin metal lines by irradiation of flash light.

Abstract: An illumination device including a light-emitting panel, a touch panel, and a control module is provided. The light-emitting panel includes a light-emitting layer configured to emit a light beam. The touch panel is overlaid on the light-emitting panel, and includes a first ouch electrode. The control module is electrically connected to the light-emitting panel and the touch panel. The light-emitting layer further includes a light-emitting material, and the width of the light-emitting material is greater than half of the width of the first touch electrode.

Abstract: A compound having the structure of Formula 1, as well as, a first device and a formulation including the same are disclosed. In the structure of Formula 1: R5 is and (a) at least one of R1-R4 is or (b) R1 is In addition, R1, R2, R3, R4, A1, A2, A3, A4, A5, A6, A7, A8, A9, A10, B1, B2, B3, B4, B5, B6, B7, B8, B9, B10, Y1, Y2, Y3, Y4, Y5, Y6, Y7, Y8, Z1, Z2, Z3, Z4, Z5, Z6, Z7, and Z8, are each independently selected from a variety of substituents, where adjacent A, B, Y, and Z groups are, optionally, joined to form a fused ring structure. Finally, X includes an acceptor group selected from —CmF2m+1, —SimF2m+1, —NCO, —NCS, —OCN, —SCN, —OCmF2m+1, and —SCmF2m+1.

Abstract: An integrated circuit (IC) for driving a flexible display includes a first layer including spatially non-repetitive features, the first layer deposited on a flexible substrate, the spatially non-repetitive features not substantially regularly repeating in both of two orthogonal directions (x,y) in the plane of the substrate. The IC further includes a second layer including spatially repetitive features with the second layer being deposited on said first layer. The first and second layers are aligned to one another so as to allow electrical coupling between said non-repetitive and said repetitive features, and wherein distortion compensation is applied during deposition of said repetitive features to enable said alignment.

Abstract: An organic light emitting display device includes a first substrate, a thin film transistor disposed on the first substrate, a first electrode electrically coupled to the thin film transistor, a pixel defining layer disposed on the first substrate and the first electrode to define unit pixels, a plurality of organic light emitting structure disposed on the first electrode, where in the organic light emitting structure includes a first organic light emitting structure, a second organic light emitting structure and a third light emitting structure, a second electrode which covers the first through third organic light emitting structures and the pixel defining layer; a metamaterial layer disposed on the second electrode corresponding to the organic light emitting structures, an encapsulation member which covers the second electrode and the metamaterial layer, and a second substrate disposed on the encapsulation member opposite to the first substrate.

Abstract: Disclosed is an organic light emitting display (OLED) device that may include first and second pixels on a substrate, each including a TFT region and a display region, the display region of each of the first and second pixels including a first electrode, an emission layer and a second electrode; a color filter layer in the display region of the second pixel; and a reflection preventing layer in the first and second pixels, substantially excluding the display region of the second pixel.

Abstract: An organic light emitting diode display device includes a substrate including a display and non-display regions at a periphery of the display region with red, green, blue and white pixel regions as one pixel group formed in the display region, and the display region divided into a first region and a second region; an organic emitting diode in each of the red, green, blue and white pixel regions; first to third power lines respectively disposed at an end of the first region, at an opposite end of the second region and a boundary of the first and second regions and connected to the organic emitting diode; a first drive integrated circuit connected to the first and third power lines; and a second drive integrated circuit connected to the second and third power lines, wherein the first and second regions are symmetric with respect to the third power line.

Abstract: A thin-film transistor, method of manufacturing the same, and organic light-emitting diode (OLED) display including the same are disclosed. In one aspect, the thin-film transistor includes an active layer including a channel region, a source region, and a drain region, wherein the active layer has a top surface. The transistor also includes a gate insulating layer formed over the active layer and a gate metal layer formed over the gate insulating layer and having a bottom surface. The area of the bottom surface of the gate metal layer is less than the area of the top surface of the active layer and the bottom surface of the gate metal layer overlaps the top surface of the active layer.

Abstract: The invention is an organic EL luminescent device comprising: a translucent substrate (1); a first electrode (2) formed on the translucent substrate (1); an organic functional layer (3) that at least contains a luminescent layer and is formed on the first electrode (2); a second electrode (4) formed on the organic functional layer (3); a sealing layer (5) formed so as to cover the first electrode (2), the second electrode (4) and the organic functional layer (3); and a protective layer (7) provided on the sealing layer (5), wherein a spacer resin layer (9) intervenes between the second electrode (4) and the sealing layer (5) and does not adhere to the second electrode (4).

Abstract: Discussed is an organic light emitting display panel. The organic light emitting display panel includes a plurality of unit pixels which each include first to third sub-pixels having different colors. The plurality of unit pixels, which each include first to third driving transistors respectively connected to the first to third sub-pixels, a first contact hole that connects the first sub-pixel to the first driving transistor, a second contact hole that connects the second sub-pixel to the second driving transistor, and a third contact hole that connects the third sub-pixel to the third driving transistor, are arranged in a matrix type.

Abstract: An organic light emitting diode display device which may improve luminous emitting efficiency by forming a scattering layer with a material including fluorine and a method of fabricating the same are discussed. The organic light emitting diode display device can include a thin film transistor formed on a substrate; an overcoat layer formed on the substrate such that the thin film transistor is covered; a scattering layer formed on the overcoat layer and formed with a material including fluorine; and an organic light emitting cell formed on the scattering layer and including a first electrode, an organic emission layer and a second electrode sequentially laminated, wherein light emitted from the organic light emitting cell passes through the scattering layer and then is emitted through the substrate.

Abstract: A novel display device with higher reliability having a structure of blocking moisture and oxygen, which deteriorate the characteristics of the display device, from penetrating through a sealing region and a method of manufacturing thereof is provided.

Abstract: The present application relates to a substrate for an organic electronic diode (OED), an organic electronic system, and a lighting. In the present application, the substrate capable of forming an OED or the organic electronic system can ensure performance including light extracting efficiency and reliability is provided.

Abstract: A getter composition including a moisture absorbing material and a binder having a volatility of 400 ppm or less when heated to a temperature in the range of 60° C. to 120° C.

Abstract: An organic material for deposition that is used for dry deposition of an organic layer included in an organic photoelectric conversion element is provided in which the organic material contains an organic composition of the organic layer as a principal component, and a residual solvent content of the organic material for deposition is equal to or less than 3 mol %.

Abstract: A source electrode (5) and a drain electrode (6) are film-formed, and a semiconductor layer (7) is formed in a substantially stripe shape substantially parallel to the X axis direction (channel-length direction) using a coating method. Then, a protection layer (8) is formed in a substantially stripe shape substantially parallel to the Y axis direction (channel width direction) orthogonal to the semiconductor layer (7). Then, a semiconductor layer (7) portion not covered with the protection layer (8) is removed using an organic solvent or an inorganic solvent or a mixed solution of the organic solvent and the inorganic solvent. Consequently, the semiconductor layer (7) and the protection layer (8) are formed with improved alignment accuracy, and electrical isolation between transistor elements (50) can be achieved with a simplified process.

Abstract: The present invention provides a method for manufacturing a thin-film transistor substrate and a thin-film transistor substrate manufactured with the method. The method includes: (1) providing a substrate (20); (2) forming a gate terminal (22) having a predetermined structure on the substrate (20); (3) forming a gate insulation layer (24) on the gate terminal (22) and the substrate (20); (4) forming a metal signal line (26) having a predetermined structure on the gate insulation layer (24); (5) forming an oxide semiconductor layer (28) having a predetermined structure on the gate insulation layer (24); (6) forming a passivation layer (32) having a predetermined structure on the gate insulation layer (24), the metal signal line (26), and the oxide semiconductor layer (28); and (7) forming a source/drain terminal (34) having a predetermined structure on the metal signal line (26), the oxide semiconductor layer (28), and the passivation layer (32) so as to form a thin-film transistor substrate.

Abstract: An organic-inorganic hybrid transistor comprises a flexible substrate, a gate electrode, an organic gate dielectric layer, an oxide semiconductor layer, a first passivation layer, a source electrode and a drain electrode. The gate electrode is disposed on the flexible substrate. The organic gate dielectric layer covers the gate electrode and a portion of the flexible substrate. The oxide semiconductor layer is disposed over the organic gate dielectric layer. The first passivation layer is interposed between and in contact with the oxide semiconductor layer and the organic gate dielectric layer. The source electrode and the drain electrode are respectively connected to different sides of the oxide semiconductor layer.

Abstract: This semiconductor device (100A) includes: a gate electrode (3); a gate insulating layer (4); an oxide layer (50) which is formed over the gate insulating layer (4) and which includes a semiconductor region (51) and a first conductor region (55) that contacts with the semiconductor region (51) and where the semiconductor region (51) at least partially overlaps with the gate electrode (3) with the gate insulating layer (4) interposed between them; a protective layer (8b) covering the upper surface of the semiconductor region (51); source and drain electrodes (6s, 6d) electrically connected to the semiconductor region (51); and a transparent electrode (9) arranged so as to overlap at least partially with the first conductor region (55) with a dielectric layer interposed between them. The drain electrode (6d) contacts with the first conductor region (55).

Abstract: The purpose of the present invention is to provide a circuit board and a display device wherein a patterned film is disposed in a manner that can sufficiently reduce the increase in capacitance and sufficiently minimize the degradation of display quality due to signal delay, while sufficiently shielding the lost part of a light shielding member with the patterned film. The present invention provides a circuit board used for a display device in which pixels are used to make an image. The circuit board comprises: a plurality of first wires and a plurality of second wires intersecting with the first wires; a thin-film transistor element; a plurality of pixel electrodes electrically connected to the drain electrodes of the thin-film transistor element; and a patterned film.

Abstract: A semiconductor device has: a first transparent electrode, a drain electrode, and a source electrode formed on a substrate; an oxide layer joined electrically to the source electrode and the drain electrode and containing a semiconductor region; an insulating layer formed on the oxide layer and the first transparent electrode; a gate electrode formed on the insulating layer; and a second transparent electrode formed so as to overlap at least a part of the first transparent electrode with the insulating layer interposed therebetween. The oxide layer and the first transparent electrode are formed of the same oxide film.

Abstract: A thin film transistor includes a gate electrode, an active pattern overlapping with the gate electrode and including a semiconductive oxide, and a source metal pattern disposed on the active pattern and including a source electrode and a drain electrode spaced apart from the source electrode. The active pattern underlaps an entire portion of a lower surface of the source metal pattern and minimally protrudes beyond lateral ends of the source metal pattern due to the active pattern having sidewall taper angles that are substantially greater than corresponding and adjacent sidewall taper angles of the overlying source metal pattern. Thus parasitic capacitance may be reduced and performance enhanced.

Abstract: An optoelectronic device comprises a semiconductor stack, a first metal layer formed above the semiconductor stack, wherein the first metal layer comprises a first major plane and a first boundary with a gradually reduced thickness, and a second metal layer formed above the first metal layer, wherein the second metal layer comprise a second major plane paralleling to the first major plane and a second boundary with a gradually reduced thickness, and the second boundary of the second metal layer exceeds the first boundary of the first metal layer.

Abstract: The embodiments of the present disclosure discloses a TFT driving backplane and method of manufacturing the same, which includes the steps of: forming non-transparent gate electrodes on a transparent insulating substrate, blanketing a gate insulating film on the substrate; forming a patterned photoconductive semiconductor layer on the gate insulating film including a superposing region and over-range regions; converting the over-range regions into conductors to be a source region and a drain region; forming a patterned protection layer to cover the photoconductive semiconductor layer and provided with a pixel electrode contacting hole to expose the drain region; forming a pixel electrode coupled with the drain region; and forming an insulating layer covering the protection layer and exposing a part of the pixel electrode. The source region, drain region and channel can be formed in one step by converting photoconductive semiconductor material partially, such that the manufacturing process is simplified.

Abstract: A semiconductor device includes a transistor, a light-emitting element, a first wiring, a driver circuit having a function of controlling the potential of the first wiring, a second wiring, a first switch, a second switch, a third switch, a fourth switch, a first capacitor, and a second capacitor. One of a source and a drain of the transistor is connected to the light-emitting element. With this structure, voltage applied between the source and the gate of the transistor can be corrected in anticipation of variations in threshold voltage, so that the current supplied to the light-emitting element can be corrected.

Abstract: A semiconductor memory device which includes a memory cell including two or more sub memory cells is provided. The sub memory cells each including a word line, a bit line, a first capacitor, a second capacitor, and a transistor. In the semiconductor device, the sub memory cells are stacked in the memory cell; a first gate and a second gate are formed with a semiconductor film provided therebetween in the transistor; the first gate and the second gate are connected to the word line; one of a source and a drain of the transistor is connected to the bit line; the other of the source and the drain of the transistor is connected to the first capacitor and the second capacitor; and the first gate and the second gate of the transistor in each sub memory cell overlap with each other and are connected to each other.