Abstract: An oscillator generates a clock signal according to a voltage, a current and a capacitance, and a frequency jitter circuit and method use a random number to modulate the voltage, the current or the capacitance, or a count value to modulate the capacitance, to jitter the frequency of the clock signal.

Abstract: A particular method includes receiving a retention signal. In response to receiving the retention signal, the method includes retaining state information in a non-volatile stage of a retention register and reducing power to a volatile stage of the retention register. The non-volatile stage may be powered by an external voltage source. The volatile stage may be powered by an internal voltage source.

Abstract: A nanosecond pulser may include a plurality of switch modules, a transformer, and an output. Each of the plurality of switch modules may include one or more solid state switches. The transformer may include a core, at least one primary winding wound around at least a portion of the core, each of the plurality of switch modules may be coupled with the primary windings, and a plurality of secondary windings wound at least partially around a portion of the core. The output may output electrical pulses having a peak voltage greater than about 1 kilovolt and having a pulse width of less than about 1000 nanoseconds. The output may output electrical pulses having a peak voltage greater than about 5 kilovolts, a peak power greater than about 100 kilowatts, a pulse width between 10 nanoseconds and 1000 nanoseconds, a rise time less than about 50 nanoseconds, or some combination thereof.

Abstract: A front-end circuit for measurement devices, for example oscilloscopes or digitizers, may implement DC gain compensation using a programmable variable resistance. A MOS transistor may be configured and operated as a linear resistor with the ability to self-calibrate quickly, while compensating for temperature variations. An integrated CMOS-based variable resistor may be thereby used for an analog adjustable attenuator. Master and slave CMOS transistors may be operated in linear mode, and temperature effects on the linear transistors may be compensated for by using an integral loop controller (current controller) configured around the master MOS transistor. Circuits implemented with the compensated variable resistance have a wide range of adjustment with a control voltage, and may be used in the front-end (circuits) of an oscilloscope or digitizer, or in any other circuit and/or instrumentation benefitting from an adjustable attenuator.

Abstract: An input/output (IO) circuit includes a first bias circuit and a second bias circuit coupled to a node. A first capacitor and a second capacitor are being cascaded and coupled to the node. The node is defined between the first capacitor and the second capacitor. A pad is coupled to the node. The first bias circuit maintains a voltage at the node below a threshold during a transmit mode and a receive mode of the IO circuit and the second bias circuit maintains the voltage at the node below the threshold during the receive mode. The voltage at the node is dependent on a voltage at the pad during the receive mode.

Abstract: A level shifter circuit is implemented with dual gate fully depleted silicon-on-insulator (FDSOI) technology. By enhancing the performance of the NMOS and devices within the level shifting circuit, the Vt of the dual gate FDSOI NMOS transistors is lowered without a need for additional control circuitry. Lowering the Vt can be accomplished through dynamic secondary gate control, by coupling together primary and secondary gates of the NMOS devices, while secondary gates of the PMOS devices can be coupled to a high voltage supply level. Such high performance NMOS devices can then operate at higher frequencies and run on a much wider range of core power supplies. Meanwhile, conventional DC conditions are maintained during steady state operation. Because no components are added to the level shifter circuit, the higher performance is achieved without an increase in size and current consumption.

Abstract: Embodiments of the present invention disclose a level up shifter circuit. The level up shifter circuit further includes two field effect transistors connected in series and a control circuit. Sources of the two field effect transistors and a source of a sixth field effect transistor are respectively connected to a drain of a first field effect transistor and a drain of a second field effect transistor of the conversion circuit, and the control circuit is turned on when a first voltage signal and a third voltage signal are zero at the same time and is turned off in other situations. The level up shifter circuit according to the embodiments of the present invention can effectively solve the problem that an output state is unknown.

Abstract: One or more circuits are provided wherein leakage current is mitigated. A circuit comprises a pad, a first transistor, a second transistor, a power leakage component and a data leakage component. The first transistor and the second transistor are respectively configured to control a voltage level at the pad. The first transistor is connected to the pad and to a first voltage source. The second transistor is connected to the pad and to a third voltage source. The power leakage component is connected between the first transistor and the pad. The data leakage component is connected between the second transistor and the pad. The power leakage component is configured to mitigate leakage current from the first transistor to the pad. The data leakage component is configured to mitigate leakage current from the pad to the second transistor.

Abstract: An integrated circuit die includes multiple temperature sensor units each for measuring the temperature of respective regions of a semiconductor substrate of the integrated circuit die. The temperature sensor units are each coupled to a multiplexer by respective groups of signal lines. The signal lines include resistance compensation areas for maintaining a particular ratio of resistances of the signal lines of each group.

Abstract: Apparatus and methods for variable capacitor arrays are provided herein. In certain configurations, an apparatus includes a variable capacitor array and a bias voltage generation circuit. The variable capacitor array includes a plurality of metal oxide semiconductor (MOS) variable capacitor cells, which include one or more pairs of MOS capacitors implemented in anti-parallel and/or anti-series configurations. In certain implementations, the MOS variable capacitor cells are electrically connected in parallel with one another between a radio frequency (RF) input and an RF output of the variable capacitor array. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the MOS variable capacitor cells.

Abstract: A power supply for supplying power to a chipset includes a first voltage regulating circuit, which is configured to convert an applied power supply signal into a group of first supply voltages, and a second voltage regulating circuit, which is configured to convert the applied power supply signal into a group of second supply voltages. A control circuit is provided, which is configured to selectively enable the second voltage regulating circuit to generate the group of second supply voltages. An output discharge circuit is provided, which is configured to discharge an output stage of the first voltage regulating circuit in response to a transition of the first voltage regulating circuit from an active state to an inactive state. This transition of the first voltage regulating circuit from an active state to an inactive state can occur in response to a change in magnitude of the power supply signal.

Abstract: Some embodiments provide capacitive AC coupling inter-layer communications for 3D stacked modules.

Abstract: There is disclosed a technique for controlling at least one amplification stage, comprising: selecting a linearity objective for the amplification stage; in dependence on an input signal to said amplification stage, determining a combination of supply input and bias input for the amplification stage in order to meet said linearity objective; and in dependence on there being more than one combination of supply input and bias input for meeting the linearity objective, selecting the combination that optimises a further system performance objective for the amplification stage. The further system performance objective may be one or more of: an efficiency objective; an envelope signal bandwidth objective; or a robustness to production tolerance objective.

Abstract: A mixer comprising a ladder having at least two resistances arranged in series and an input configured to receive an input signal and apply it across the ladder, said ladder including an output arrangement comprising at least three branches, a first branch branching from a first end of the ladder, a second branch branching from between the at least two resistances and a third branch branching from a second end of the ladder, opposite the first end, each branch including a switch for controlling a connection between its branch and an output.

Abstract: Disclosed is a power amplification module which has a comparatively small size and is capable of adjusting the rising characteristic of a gain. The power amplification module includes a first gain control current generation circuit which generates a first gain control current changing with a control voltage, a first bias current generation circuit which generates a first bias current according to the first gain control current, a gain control voltage generation circuit which generates a gain control voltage changing with the control voltage, a first transistor which is emitter-grounded and in which an input signal and the first bias current are supplied to a base thereof, and a second transistor which is cascode-connected to the first transistor and in which the gain control voltage is supplied to a base thereof and a first output signal obtained by amplifying the input signal is output from a collector thereof.

Abstract: In one embodiment, a differential amplifier circuit includes a first input terminal, a second input terminal, a first transistor, a second transistor, a third transistor, a current source, a first output terminal, a second output terminal, a first passive element, and a second passive element. The first (second) transistor has a control terminal connected to the first (second) input terminal. The third transistor has a control terminal. The control terminal is applied predetermined bias voltage. The current source is connected to a first terminal in each of the first transistor, second transistor, and third transistor. The first (second) output terminal is connected to a second terminal of the first (second) transistor. The first (second) passive element is connected between the first (second) input terminal and the first (second) output terminal.

Abstract: A quasi-differential amplifier with an input port and an output port. The amplifier has a phase shifter network with a first port connected to the input port, a second port, and a third port. A first amplifier has an input connected to the second port of the phase shifter network, and an output, and a second amplifier has an input connected to the third port of the phase shifter network, and an output. A balun circuit includes a first differential port connected to an output of the first amplifier, a second differential port connected to an output of the second amplifier, and a single-ended port. An output matching network is connected to the single-ended port of the balun circuit and to the output port.

Abstract: An amplifier includes a first transformer configured to output first differential signals, a first differential amplifier coupled to the first transformer, a second transformer coupled to the first differential amplifier, a second differential amplifier coupled to the second transformer, a third transformer configured to transform second differential signals output from the second differential amplifier to a single-ended output signal, and a first bias circuit configured to supply a first bias voltage to a first secondary coil of the first transformer, wherein the first bias circuit sets the first bias voltage to a voltage greater than or equal to a first voltage based on the input signal in a first operating area where power of the output signal is greater than or equal to a first power so that power-gain characteristics of the output signal become closer to characteristics where gain of the output signal becomes constant.

Abstract: A Doherty amplifier (300) is provided, it comprises: a main amplifier (301) and a peak amplifier (302); a first microstrip (303) with ?/4 electric length connected between the main amplifier and the peak amplifier; a second microstrip (304) with electric length connected between a junction of outputs of the peak amplifier and the main amplifier, and an output terminal (306); at least a tuner (305) for adjusting radius of VSWR circle of the main amplifier and connected, in series with the first microstrip (303), between the main amplifier (301) and the peak amplifier (302) based on input signal power. The hack-off power level efficiency is increased by enlarge the VSWR radius with the new Doherty structure.

Abstract: An electronic device and a method for control of an output amplitude of a Voltage Control Oscillator (VCO) in the electronic device is provided. The electronic device includes a first circuit configured to output a frequency signal corresponding to a control voltage, and a second circuit configured to generate control bits that control an amplitude of the frequency signal based on a comparison result between a peak voltage of the frequency signal and a reference voltage of the frequency signal.

Abstract: A circuit includes a first oscillator and a second oscillator. The first oscillator includes an inductive device, a capacitive device, and an active feedback device configured to output a first output signal having a predetermined frequency according to electrical characteristics of the inductive device of the first oscillator and electrical characteristics of the capacitive device of the first oscillator. The second oscillator includes an inductive device, a capacitive device, and an active feedback device configured to output a second output signal having the predetermined frequency according to electrical characteristics of the inductive device of the second oscillator and electrical characteristics of the capacitive device of the second oscillator. The inductive device of the first oscillator and the inductive device of the second oscillator are magnetically coupled.

Abstract: Aspects of the disclosure provide a circuit that includes a detector, a loop filter and a controller. The detector is configured to generate a first signal indicative a timing difference between a reference clock signal and a feedback clock signal. The feedback clock signal is generated based on an oscillating signal from an oscillator. The oscillator includes a first tuning circuit and a second tuning circuit to tune a frequency of the oscillating signal. The loop filter is configured to filter out a portion of frequency components from the first signal to generate a second signal for tuning the first tuning circuit of the oscillator. The controller is configured to tune the second tuning circuit based on the first signal and the second signal.

Abstract: A circuit includes a coupling structure and a first inductive device. The coupling structure includes two or more conductive loops and a set of conductive paths electrically connecting the two or more conductive loops. The first inductive device is magnetically coupled with a first conductive loop of the two or more conductive loops.

Abstract: A temperature control device includes a temperature detector, a difference operation unit, a controller, a saturation processing circuit unit, a rewritable storage unit, and a conversion unit. The difference operation unit operates a digital value corresponding to a difference value between a detected temperature value and a target temperature. The controller calculates a manipulated variable using the digital value operated by the difference operation unit. The saturation processing circuit unit includes a digital circuit to limit an output value of the controller to a pre-set upper limit value. The rewritable storage unit stores the upper limit value read from a storage area of the rewritable storage unit and input into the saturation processing circuit unit. The conversion unit converts the output value of the saturation processing circuit unit into an analog signal to output the converted value as a control command value to the heater.

Abstract: A manufacturing method of an oscillator is a manufacturing method of an oscillator which includes a vibrator and a semiconductor circuit device including an oscillation part connected to the vibrator and a control part to switch an operation mode between a normal mode in which the oscillation part performs an oscillation operation and an inspection mode in which characteristics of the vibrator are inspected, and the manufacturing method includes preparing the semiconductor circuit device in which the operation mode is set to the inspection mode, connecting the semiconductor circuit device and the vibrator electrically, and inspecting the characteristics of the vibrator which is in a state electrically connected to the semiconductor circuit device.

Abstract: A lid body includes: a first surface; a second surface having a top-bottom relation with the first surface; an outer peripheral surface connecting the first surface and the second surface; a groove provided in the first surface from the outer peripheral surface toward an interior of the first surface; and first and second marks arranged at positions that do not overlap with an outer peripheral edge of the second surface in a plan view.

Abstract: A method for providing cross point information includes: providing an input signal having amplitude and phase information; interpolating between a first point of the input signal and a second point of the input signal to provide cross point information between the first point and the second point; and providing a pulse-width modulated signal based on the input signal and the cross point information.

Abstract: Materials, devices and methods related to below-resonance radio-frequency (RF) circulators and isolators. In some embodiments, a circulator can include a conductor having a plurality of signal ports, and one or more magnets configured to provide a magnetic field. The circulator can further include one or more ferrite disks implemented relative to the conductor and the one or more magnets so that an RF signal can be routed selectively among the signal ports due to the magnetic field. Each of the one or more ferrite disks can include synthetic garnet material having dodecahedral sites, octahedral sites and tetrahedral sites, with bismuth (Bi) occupying at least some of the dodecahedral sites, and aluminum (Al) occupying at least some of the tetrahedral sites. Such synthetic garnet material can be represented by a formula Y3-x-2y?zBixCa2y+zFe5-y-z-aVyZrzAlaO12. In some embodiments, x?1.4, y?0.7, z?0.7, and a?0.75.

Abstract: A balanced-unbalanced conversion-type elastic wave device includes an unbalanced signal terminal, first and second balanced signal terminals, and first to fifth interdigital transducers disposed along an elastic wave propagation direction. One end of each of the first, third, and fifth interdigital transducers is connected in common to the unbalanced signal terminal, one end of each of the second interdigital transducer and the fourth interdigital transducer is connected to the first and second balanced signal terminals respectively, a first inductance is connected between the first interdigital transducer and a ground potential, and a second inductance is connected between the fifth interdigital transducer and the ground potential. First and second inductance values of the first and second inductances, respectively, are different.

Abstract: A tunable guard ring for improved circuit isolation is disclosed. In an exemplary embodiment, an apparatus includes a closed loop guard ring formed on an integrated circuit and magnetically coupled by a selected coupling factor to a first inductor formed on the integrated circuit. The apparatus also includes a tunable capacitor forming a portion of the closed loop guard ring and configured to reduce magnetic field coupling from the first inductor to a second inductor.

Abstract: A circuit component is described herein. The circuit component includes a first signal line to propagate in a first direction and a second signal line to propagate a second direction. The circuit component includes a region to introduce crosstalk within the region that reduces another crosstalk generated at a location remote from the region based on a change in propagation direction of the first signal line and second signal line.

Abstract: A measuring bridge (1) provides a first matching pad (2), a second matching pad (3) and a third matching pad (4), wherein all matching pads (2, 3, 4) comprise at least three resistors (21, 22, 23, 31, 32, 33, 41, 42, 43) which are arranged in a T-structure. A second resistor (32) of the second matching pad (3) is connected to a second resistor (22) of the first matching pad (2), and a third resistor (43) of the third matching pad (4) is connected to a third resistor (23) of the first matching pad (2). A second resistor (42) of the third matching pad (4) can be connected to a device under test (7). A third resistor (33) of the second matching pad (3) can be connected to a calibration standard (5), and a first resistor (31, 41) of the second and the third matching pad (3, 4) are connected in each case to a signal input of an element (11) which suppresses a common-mode component on its two signal inputs.

Abstract: Radio frequency subscriber drop units include a housing having an input port and an output port and a printed circuit board mounted in an interior of the housing. The printed circuit board includes a dielectric layer, a wiring layer that includes conductive wirings that comprise at least part of a communications path between the input port and the output port that is on a first face of the dielectric layer, and a ground plane layer that includes a conductive ground plane that is on a second face of the dielectric layer.

Abstract: According to a first aspect embodiments provide a transistor including at least one gate region between at least one drain region and at least one source region, wherein a ratio between a width of the gate region and a length of the gate region exceeds 300.

Abstract: A switch architecture having open reflective unselected ports. Signals can be selectively coupled between a common port and at least one selectable port through series connected switches. When one or more port is selected, the remaining ports are opened. In addition, associated “shuntable” switches from each of the selectable ports to ground are always open, regardless of the ON or OFF state of the series switches; thus, there is no normally active connection of the selectable ports to ground, but the presence of the shuntable switches provides electrostatic discharge protection for all ports. Embodiments of the invention allow configurability between a traditional architecture and an open reflective unselected port architecture, and include integrated circuit and field effect transistor embodiments.

Abstract: A filter device includes a band pass filter connected between a first signal terminal and a second signal terminal and an LC circuit connected in parallel with the band pass filter. The LC circuit has anti-resonant characteristics that make the LC circuit be open at a pass band of the band pass filter, and make attenuation in a specified frequency band outside of the pass band of the band pass filter higher than in a case in which the LC circuit is not connected, as a result of the LC circuit being connected.

Abstract: A piezoelectric thin film resonator includes: a piezoelectric film provided on a substrate; a lower electrode and an upper electrode sandwiching at least a part of the piezoelectric film and facing with each other; and an inserted film that is inserted in the piezoelectric film, is provided in an outer circumference region of a resonance region and is not provided in a center region of the resonance region, wherein: an angle between an edge face of the lower electrode and a lower face of the lower electrode in the resonance region is an acute angle; and a width of the inserted film in the resonance region on a side for extracting the upper electrode from the resonance region is larger than another width of the inserted film in the resonance region on a side for extracting the lower electrode from the resonance region.

Abstract: A piezoelectric thin-film resonator includes, a substrate, a piezoelectric film provided on the substrate, and a lower electrode and an upper electrode that face each other through the piezoelectric film. The piezoelectric film has an air space that is provided in at least part of an outer circumferential part of a resonance region in which the upper and lower electrodes face each other through the piezoelectric film and is not provided in a central part of the resonance region.

Abstract: A piezoelectric thin film resonator includes: a substrate; a piezoelectric film provided on the substrate; a lower electrode and an upper electrode that sandwich at least a part of the piezoelectric film and face with each other; and an inserted film that is inserted in the piezoelectric film, is provided on an outer circumference region in a resonance region in which the lower electrode and the upper electrode sandwich the piezoelectric film and face with each other, is not provided in a center region of the resonance region, and has a cutout in the resonance region.

Abstract: A multiplexer with a common port feeding structure is disclosed. The multiplexer with a common port feeding structure of the present invention comprises: a housing comprising an antenna connector connected to an antenna for bidirectional transmitting and receiving and a plurality of input/output connectors bidirectionally inputting and outputting a specific frequency band of wireless signals which are input/output through the antenna; a plurality of band-pass filter units mounted inside the housing to transmit wireless signals at between the antenna connector and the input/output connector to pass a specific frequency band; and a coupling unit having a plurality of feeding members to couple the antenna connector and each of the plurality of band-pass filter units.

Abstract: Arrangement of resonators in an aperiodic configurations are described, which can be used for electromagnetic cloaking of objects. The overall assembly of resonators, as structures, do not all repeat periodically and at least some of the resonators are spaced such that their phase centers are separated by more than a wavelength. The arrangements can include resonators of several different sizes and/or geometries arranged so that each size or geometry corresponds to a moderate or high “Q” response that resonates within a specific frequency range, and that arrangement within that specific grouping of akin elements is periodic in the overall structure. The relative spacing and arrangement of groupings can be defined by self similarity and origin symmetry.

Abstract: A selective frequency limiter having a magnetic material and a slow wave structure disposed to magnetically couple a magnetic field, produced by electromagnetic energy propagating through the slow wave structure, into the magnetic material.

Abstract: A waveguide rotary joint includes a first waveguide portion for receiving a microwave signal, a second waveguide portion for outputting the received microwave signal, and a conductive pin including a first end and a second end distal from the first end, the first end arranged in and RF coupled to the first waveguide, and the second end arranged in and RF coupled to the second waveguide, and a choke cavity is arranged between the first waveguide portion and the second waveguide portion. The first waveguide and the second waveguide are rotatable relative to each other about a longitudinal axis of the conductive pin.

Abstract: Improved circuit breaker operation is achieved by a system that includes a circuit breaker unit and a secondary actuator. The secondary actuator is operable to place the circuit breaker unit into an inoperable position when de-energized and in an operable position when energized. When in the operable position, the circuit breaker can be energized to close its contacts into an ON position. The circuit breaker cannot operate on its own as it cannot be placed into an ON position when energized alone.

Abstract: An overcurrent relay and a molded case circuit breaker (MCCB) including the same are provided. The MCCB includes: a switching mechanism unit; an overcurrent relay; a trip mechanism, wherein the overcurrent relay includes: a case body; a case cover coupled to the case body; a control unit installed within the case body and having an electronic circuit board; and a plurality of setting knobs disposed to be spaced apart from one another on the electronic circuit board, having an indication unit exposed to the outside to indicate a current reference value and a trip operation time marked on the case cover, respectively, and configured to be rotatable, respectively.

Abstract: The present invention provides a sealing type automotive relay with a safety device in the field of automotive relays, which addresses the problems of inconvenient fuse replacement and poor sealing property of the fuse in the existing relays. The sealing type automotive relay with a safety device comprises a relay main body and a safety device. The relay main body includes a base, a casing and a weak current system and a strong current system located on the base. The casing is fixedly connected with the base. The safety device includes two fuse sockets positioned on the base and a fuse inserted between the said two fuse sockets. The top of the casing is provided with a fuse inserting hole corresponding to the said two fuse sockets. The fuse is inserted into the inserting hole. A sealing cover is provided at the port of the fuse inserting hole.

Abstract: Disclosed is a magnetic contactor. A free space in which a DC converting circuit is provided is in a product can be secured by changing shapes of the movable core and the fixed core, and thus, in association with a low-capacity product, external AC power may be converted into DC power even without enlarging a size of a product. Also, a normal position member may be included in a movable core, and may induce the movable core to the original position, and thus, a mechanical mechanism relationship between the switch manipulating part included in the movable core and the other element is maintained.

Abstract: A cryogenic coil assembly including a coil substrate with a flat surface, and a number of radial channels cut into a region of the flat surface. The cryogenic coil assembly also includes a spiral coil covering the radial channels, and a chemical bonding agent for bonding the spiral coil to the coil substrate. The chemical bonding agent is present within the radial channels.

Abstract: A magnetization apparatus for a magnet of a magnetic encoder. The magnetization apparatus is configured to alternately form a positive and a negative magnetization areas by moving a magnetic member along a route penetrating a gap of a magnetization yoke while alternately generating positive and negative magnetic fields in the gap of the magnetization yoke.

Abstract: The present invention is a system for carrying individualized articles, said system comprising: a main carrier having at least one magnetic material incorporated therewith; at least one expandable ring, having a central cavity and a relaxed configuration and an expanded configuration, whereby said expanded configuration is achieved by applying pressure to an expandable material incorporated with said expanded ring, said expanded ring further comprising at least one magnet constructed and arranged to interact with said magnet of said main body.