Abstract: A method configures an installation of a control system within an operational environment, where the control system may include distributed physical access control system. The method may provide options for installing peripheral devices compatible with a controller, and receive selections based on the provided options. The selections may be associated with an operational environment of at least one selected peripheral device. The method may generate instructions to command the controller to specify individual pins from a plurality of pins for connecting the controller to at least one selected peripheral device. The method may subsequently create a report to describe connections between the specified individual pins associated with the controller and wires associated with at least one selected peripheral device. An apparatus can implement the method to configure the installation of the control system in its operational environment.

Abstract: Methods and apparatus for target typing of overloaded method and constructor arguments are described. A method comprises determining whether source code of a program includes, as an argument to an overloaded operation invocation, an expression whose type is context-dependent. The method further comprises, if the source code includes such an argument, providing the expression as an input to an overload resolver, and determining at the overload resolver whether (a) each argument of the invocation is compatible with types of corresponding parameters in one or more declarations and (b) whether a particular declaration among such a set of declarations can be identified as the most specific. If both conditions are met, the method comprises generating executable instructions for the invocation.

Abstract: In an embodiment, a method of binding a human machine interface to an expression of existing computer code may include analyzing the existing computer code to identify one or more bindable expressions in the existing computer code, and receiving a command to bind a human machine interface with one or more of the identified bindable expressions. The method may further include binding, using a processor, one or more of the bindable expressions with the human machine interface in response to the command. The binding may enable the human machine interface to communicate information within the existing computer code in place of the one or more bound expressions. The bound machine interface may communicate information within the computer code while the computer code is executing.

Abstract: An information processing apparatus includes a control unit, a processing unit capable of dynamically changing a circuit configuration thereof, and a storage unit configured to store circuit information indicating a circuit configuration to be read into the processing unit, wherein the processing unit reads first circuit information from the storage unit to function as a storage medium for storing a program, and wherein the control unit reads the program from the processing unit to execute the program.

Abstract: Systems and methods for executing non-native instructions in a computing system having a processor configured to execute native instructions are provided. A dynamic translator uses instruction code translation in parallel with just-in-time (JIT) compilation to execute the non-native instructions. Non-native instructions may be interpreted to generate instruction codes, which may be stored in a shadow memory. During a subsequent scheduling of a non-native instruction for execution, the corresponding instruction code may be retrieved from the shadow memory and executed, thereby avoiding reinterpreting the non-native instruction. In addition, the JIT compiler may compile instruction codes to generate native instructions, which may be made available for execution, further speeding up the execution process.

Abstract: Actions performed when one or more virtual-machine-deployment instructions are executed are exposed. The actions can subsequently be analyzed to identify potential inefficiencies or other issues in the process of deploying one or more virtual machines. In furtherance thereof, metadata associated with the actions, such as performance information, can also be attached to relevant actions.

Abstract: A virtual computer system including multiple virtual machines operating on a hypervisor, includes a trace information collecting section in the hypervisor configured to collect trace information including an operational state of a process on a first virtual machine of the multiple virtual machines from a context saving area corresponding to the first virtual machine, the process being executed when an interrupt is generated; multiple symbol map information collecting sections in the virtual machines, respectively, configured to collect symbol map information for identifying a process operating on each of the virtual machines from a management area included in each of the virtual machines to send the collected symbol map information to the hypervisor; and an analysis processing section in the hypervisor configured to associate the trace information with the symbol map information for each of the processes.

Abstract: Techniques for virtual switch and virtual switch port management for VM availability in a cluster are described. In one example embodiment, a determination is made as to whether a virtual switch port on a first virtual switch associated with a first VM network is available for powering on the VM on a first host computing system. Based on the outcome of the determination either further determination is then made as to whether a virtual switch port on a second virtual switch associated with the first VM network is available to power on the VM on a second host computing system or migration of the VM in a power-off state is initiated to the second host computing system and powered-on on the second host computing system via the virtual switch port on the second virtual switch associated with the first VM network associated.

Abstract: One embodiment of the present invention provides a system that facilitates quality of service (QoS) in a Fiber Channel (FC) network. During operation, a host bus adaptor (HBA) allocates the bandwidth on an FC link between the HBA and an FC switch into a plurality of logical channels, wherein a respective logical channel can transport data frames of variable length. Furthermore, a respective logical channel is associated with a dedicated buffer on the HBA. The HBA associates data frames from a logical entity associated with the HBA with a logical channel, and transmits data frames from the logical entity to the FC switch on the corresponding logical channel within the link from the HBA to the FC switch.

Abstract: Systems, methods, and software described herein provide for enhancements to large scale data processing architectures. In one implementation, a service architecture for large scale data processing includes a host computing system, and a virtual machine executing on the host computing system. The service architecture further includes a plurality of application containers executing on the virtual machine, wherein each of the application containers comprises a large scale processing node running one or more java virtual machines.

Abstract: Customizing functions performed by data flow operators when processing data streams. An open-executor(s) is provided as part of the data stream analytics platform, wherein such open-executor allows for both of: 1) customizing user plug-ins for the operators, to accommodate changes in user requirements; and 2) predefining templates that are based on specific meta-properties of various operators and that are common therebetween.

Abstract: In accordance with embodiments disclosed herein, there are provided mechanisms and methods for automating deployment of applications in a multi-tenant database environment. For example, in one embodiment, mechanisms include managing a plurality of machines operating as a machine farm within a datacenter by executing an agent provisioning script at a control hub, instructing the plurality of machines to download and instantiate a lightweight agent; pushing a plurality of URL (Uniform Resource Locator) references from the control hub to the instantiated lightweight agent on each of the plurality of machines specifying one or more applications to be provisioned and one or more dependencies for each of the applications; and loading, via the lightweight agent at each of the plurality of machines, the one or more applications and the one or more dependencies for each of the one or more applications into memory of each respective machine.

Abstract: A system and method can support transaction processing in a transactional environment. A coordinator for a global transaction operates to propagate a common transaction identifier and information for a resource manager instance to one or more participants of the global transaction in the transactional environment. The coordinator allows said one or more participants, which share resource manager instance with the coordinator, to use the common transaction identifier, and can process the global transaction for said one or more participants that share the resource manager instance using one transaction branch.

Abstract: In a multi-processor transaction execution environment, a transaction executes a hint instruction indicating proximity to completion of the transaction. Pending aborts of the transaction due to memory conflicts are suppressed based on the proximity of the transaction to completion.

Abstract: Embodiments relate to multithreaded transactions. An aspect includes assigning a same transaction identifier (ID) corresponding to the multithreaded transaction to a plurality of threads of the multithreaded transaction, wherein the plurality of threads execute the multithreaded transaction in parallel. Another aspect includes determining one or more memory areas that are owned by the multithreaded transaction. Another aspect includes receiving a memory access request from a requester that is directed to a memory area that is owned by the transaction. Yet another aspect includes based on determining that the requester has a transaction ID that matches the transaction ID of the multithreaded transaction, performing the memory access request without aborting the multithreaded transaction.

Abstract: According to an embodiment, an information processing device is connectable to a peripheral device and includes a buffer, a first operating system, a second operating system, and a monitor. The monitor is configured to enable the first operating system or the second operating system to execute in a switching manner. The monitor includes a switching controller that, when the second operating system issues an access request to the peripheral device, saves a state of the second operating system and suspends its execution as well as restores a state of the first operating system and restarts its execution. The first operating system includes a request input-output controller that reads the access request from the buffer, that divides the read access request into instructions in receivable units for the peripheral device, and that issues each instruction. The first operating system includes an access controller that accesses the peripheral device according to the instructions.

Abstract: A computer-implemented method for caching data on virtualization servers may include: 1) providing a virtualization server that executes at least one virtual machine on the virtualization server, 2) intercepting a data operation that includes both basic data and metadata, the data operation being requested by the virtualization server, 3) caching the basic data from the data operation on a solid state drive cache at the virtualization server, and 4) preventing the solid state drive cache from providing metadata from the data operation to the virtualization server. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.

Abstract: A workflow is designated for execution across a plurality of autonomous computational entities automatically. Among other things, the cost of computation is balanced with the cost of communication among computational entities to reduce total execution time of a workflow. In other words, a balance is struck between grouping tasks for execution on a single computational entity and segmenting tasks for execution across multiple computational entities.

Abstract: A method for deploying an application task across a distributed operating system is described. The method comprises receiving a request to deploy an application task from a main operating system on a main system to a distributed operating system, wherein the main system comprises a master cell, wherein the distributed operating system comprises a plurality of individual virtual cells, each individual virtual cell comprising a microkernel architecture and a portion of the distributed operating system. The method comprises detecting, via the master cell, a resource availability of each of the individual virtual cells and determining which of the individual virtual cells comprises an infrastructure necessary to perform the application task.

Abstract: Techniques are generally described that relate to a computer-implemented method of using a virtual device operating in a first computer network to perform a service on behalf of a low-power device operating in a second computer network includes receiving, by the virtual device, device data reports and a device descriptor from the low-power device. The virtual device may be adapted to store the device data reports and/or the device descriptor in computer-readable memory coupled to the virtual device. The virtual device may also be adapted to receive a low-power device service request from a requesting device operating in a third computer network and may determine that the device descriptor indicates that the low-power device is unavailable to respond to the low-power device service request. A response to the low-power device service request may be generated by the virtual device based on the device data reports.

Abstract: In a Hardware Lock Elision (HLE) Environment, predictively determining whether a HLE transaction should actually acquire a lock and execute non-transactionally, is provided. Included is, based on encountering an HLE lock-acquire instruction, determining, based on an HLE predictor, whether to elide the lock and proceed as an HLE transaction or to acquire the lock and proceed as a non-transaction; based on the HLE predictor predicting to elide, setting the address of the lock as a read-set of the transaction, and suppressing any write by the lock-acquire instruction to the lock and proceeding in HLE transactional execution mode until an xrelease instruction is encountered wherein the xrelease instruction releases the lock or the HLE transaction encounters a transactional conflict; and based on the HLE predictor predicting not-to-elide, treating the HLE lock-acquire instruction as a non-HLE lock-acquire instruction, and proceeding in non-transactional mode.

Abstract: In a Hardware Lock Elision (HLE) Environment, predictively determining whether a HLE transaction should actually acquire a lock and execute non-transactionally, is provided. Included is, based on encountering an HLE lock-acquire instruction, determining, based on an HLE predictor, whether to elide the lock and proceed as an HLE transaction or to acquire the lock and proceed as a non-transaction; based on the HLE predictor predicting to elide, setting the address of the lock as a read-set of the transaction, and suppressing any write by the lock-acquire instruction to the lock and proceeding in HLE transactional execution mode until an xrelease instruction is encountered wherein the xrelease instruction releases the lock or the HLE transaction encounters a transactional conflict; and based on the HLE predictor predicting not-to-elide, treating the HLE lock-acquire instruction as a non-HLE lock-acquire instruction, and proceeding in non-transactional mode.

Abstract: A system is provided for multicasting an event notification from an event producer to multiple event listeners, where the event producer and event listeners exist within a computer operating system having a user space, a kernel space, a device space, and an event protocol handler located in the kernel space. The system generates an event indication from an event producer located in the user space, kernel space, or device space, and receiving the event indication in the event protocol handler and generating an event notification. The event producer and the event listeners interface with the event protocol handler to send the event indication and receive the event notification. The event listeners may be located in the user space, kernel space, or device space.

Abstract: The disclosed subject matter relates to a system for messaging between applications, the system having one or more processors and a memory including instructions that, when executed by the one or more processors, cause the one or more processors to perform operations including receiving a message including an identifier associated with a web application having a subscription to receive selected events associated with a publisher operating on a data network. The operations also include receiving, from the publisher, an event notification of at least one of the selected events. The operations also include determining whether the web application is subscribed to receive the event notification. The operations also include transmitting, in a case where the web application is subscribed to receive the event notification, an indication of the event notification to the web application.

Abstract: Embodiments are provided for managing operation of an electronic device based on the connection(s) of hardware module(s) to the electronic drive via a support housing. According to certain aspects, the electronic device may activate and identify a hardware module that is connected to a controlling position of the support housing. The electronic device may identify a function associated with the hardware module, where the function may be a built-in function of the hardware module itself or of the electronic device. The electronic device may accordingly activate the identified function.

Abstract: Concepts and technologies disclosed herein are directed to consultation among feedback instances. According to one aspect, a system can receive a feedback instance consultation request for a consultation among an original feedback instance and a target feedback instance. The target feedback instance can be consulted with by the original feedback instance to enable the original feedback instance to cure a deficiency. The system can examine the feedback instance consultation request to determine if a match exists with an application programming interface associated with a target feedback instance model upon which the target feedback instance is based. If examination of the feedback instance consultation request determines that a match exists, the system can update the target feedback instance model with an intercommunication plan by which the consultation can occur. The system also can update an original feedback instance model upon which the original feedback instance is based.

Abstract: Systems and methods to safely and efficiently handle dirty data flush are disclosed. More specifically, when a cache controller determines that one (or more) storage device of a cache device is running out of space, that storage device is given priority to be flushed prior to the other storage devices that are not in such a critical condition. In addition, a cache bypass process can be conditionally enabled to save free physical spaces already running low on such critical cache storage devices.

Abstract: A method of processing a request message begins when a first layer of a plurality of layers of a system stack receives the request message. In turn, the plurality of layers negotiate an agreement based on the request message, where the agreement indicates which layers will process particular error reply codes of an error reply code list. Then, a non-controller layer of the plurality of layers performs a first error check in accordance with the agreement and records a first error result in a communication interface based on the first error check; a controller layer of the plurality of layers performs a second error check in accordance with the agreement and records a second error result in the communication interface based on the second error check. Then a reply message responsive to the request message is outputted based on the first error check and the second error check.

Abstract: Embodiments of the present invention provide systems and methods for selectively dumping memory by using usertokens to specify an address range from 64-bit storage to be included or excluded from a memory dump. Embodiments of the present invention can be used to reduce the requirement for programs to manage lists of address ranges which represent pertinent data for applications.

Abstract: A method for operation of a reusable fault processing database in conjunction with a complex system is provided. The method stores a set of logical rules into one or more logic entities of the reusable fault processing database, the set comprising one or more executable instructions applicable to fault detection and fault isolation in the complex system; stores at least one defined variable for each of the received set of logical rules, the at least one defined variable being stored into one or more variable entities of the reusable fault processing database; and stores a configuration of at least one external interface of the reusable fault processing database, the configuration being stored in one or more input/output (I/O) entities of the reusable fault processing database, the external interface comprising a defined set of input to the reusable fault processing database and a defined set of output from the reusable fault processing database.

Abstract: Techniques relate to fingerprint-based processor malfunction detection. A determination is made whether a fingerprint is present in software that is currently executing on the processor of the computer system. The fingerprint includes a representation of a sequence of behavior that occurs on the processor while the software is executing. The fingerprint corresponds to a type of malfunction. In response to determining that the fingerprint is not present in the software currently executing on the processor, monitoring of the software executing on the processor to determine whether the fingerprint is present continues. In response to determining that the fingerprint is present in the software executing on the processor, it is determined that the malfunction has occurred according to a type of the fingerprint that is present.

Abstract: A decoding device includes a decoding unit that iteratively obtains a decoded bit stream corresponding to an information bit stream of one block, and an error detection unit that divides the decoded bit stream into a plurality of sub-blocks, acquires a plurality of partial remainders respectively corresponding to the sub-blocks, and determines whether an error occurs in the decoded bit stream based on a total remainder in which the partial remainders are added, wherein the error detection unit, of the sub-blocks, acquires a first partial remainder corresponding to a first sub-block including bits in which values are different between a previous decoded bit stream and a current decoded bit stream, and determines whether the error occurs in the current decoded bit stream based on a current total remainder obtained by adding the acquired first partial remainder to a previous total remainder.

Abstract: A memory device may include memory components for storing data. The memory device may also include a controller that determines whether one or more errors exist in a data packet stored in the memory components. The controller may read a code word associated with the data packet, such that the code word may be used to indicate whether the errors exist in the data packet. The controller may then determine a syndrome polynomial based on the code word and determine an inverse of the syndrome polynomial when the syndrome polynomial is not zero. The controller may then determine a first error locator polynomial and a second error locator polynomial based on the inverse of the syndrome polynomial. The first error locator polynomial and the second error locator polynomial may be used to identify one or more locations of one or more errors in the code word.

Abstract: A method of operating a memory controller includes; receiving hard decision data and first soft decision data from a non-volatile memory device, performing a first ECC decoding operation using the hard decision data and the first soft decision data: and then determining a second soft decision read voltage or reclaim operation of the non-volatile memory device based on the number of iteration operation of the first ECC (error correction code).

Abstract: A computer memory access method includes: receiving external data with a prefetching length; determining that the external data includes a masked data portion; at the time of a write enable signal being triggered, writing an unmasked data portion of the external data into a data storage unit of a computer memory by a writing unit; triggering a read enable signal at the time of the write enable signal being triggered and reading the unmasked data portion from the data storage unit by a reading unit while reading a third data portion corresponding to the masked data portion from the data storage unit; merging the unmasked data portion and the third data portion to a merged data and generating parity bits from the merged data by an error correction code encoding circuit; and writing the parity bits into a parity bit storage unit of the computer memory.

Abstract: Two-terminal memory can be configured as multi-level cell (MLC) memory in which a single memory cell can represent multiple bits of information. Unlike certain other memories that are subject to disturb errors, for the disclosed two-terminal memory, these multiple bits can store information that is included in the same logical page of memory, which can be advantageous. However, performing error-code correction (ECC) operations on multiple bits of data from the same MLC can result in additional stress on an ECC engine because if a MLC fails, all bits of that cell are likely to be bad. Splitting the multiple bits of a MLC in connection with encoding or decoding can average the errors from bad cells across multiple ECC codewords, thereby providing better coverage with the same ECC or reducing the overhead associated with ECC coverage.

Abstract: A method for managing an encoding process, the method includes receiving or determining, by a processor, (i) code rates for multiple pages, and (ii) sizes of a plurality of data segments to be stored in the multiple pages after being encoded to provide multiple codewords; determining, by the processor, sizes of the multiple codewords while maintaining the code rates for the multiple pages and minimizing a number of split data segments out of the plurality of data segments, wherein each split data segment is split between at least two codewords of the multiple codewords, wherein a retrieval of the split data segment involves a retrieval of the at least two codewords; and sending to an encoder information about the sizes of the multiple codewords.

Abstract: A method for processing burn data of NAND flash is provided. The method includes: identifying all half-empty blocks in the burn data of the NAND flash, the half-empty blocks being blocks in which a part of pages are written with data and the remaining part of pages being blank pages; writing a predetermined label character to all the blank pages of the all the half-empty blocks to convert the half-empty blocks to full blocks. With the above approach, the present invention fulfills the requirement that every page is either empty or written with data, so as to prevent from damaging data in a high-temperature patching process to thereby enhance product quality and reliability.

Abstract: A storage control apparatus starts, in a group of storage apparatuses that store constituent data that constitute redundant data in a distributed manner in units of a stripe, in regard to respective stripes of a plurality of stripes obtained from a group of target storage apparatuses excluding one of the storage apparatuses, a plurality of rebuilding processes for restoring the constituent data; decides, for each rebuilding process, a stripe for which the rebuilding process is to be performed next, according to access loads on the respective storage apparatuses of the group of target storage apparatuses; and obtains, for each rebuilding process, constituent data corresponding to the decided stripe from the group of target storage apparatuses and executing the rebuilding process, and executes the rebuilding process, to restore constituent data stored in the excluded storage apparatus from the obtained constituent data.

Abstract: A distributed system including one or more data processing devices executing instructions configuring the one or more data processing device to execute a virtual machine including a software application and an agent. The agent is configured to receive a first health status of the software application, determine a second health status of the software application, compare the first health status and the second health status, and restart the software application based on the comparison. The one or more data processing device also execute an application server configured to remotely determine the first health status of the software application and send the first health status of the software application to the virtual machine.

Abstract: A computer-implemented method for managing virtual machine backups may include (1) identifying a maximum recovery point objective for a virtual machine with a virtual machine disk file on a storage device with snapshot capabilities, (2) identifying an available snapshot of the storage device that contains the virtual machine disk file, (3) determining that the snapshot's timestamp is within the maximum recovery point objective, and (4) constructing a backup of the virtual machine using the snapshot, instead of creating the backup from the virtual machine disk file. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: Disclosed is a method for information backup, comprising: an information backup device detects a battery volume of a mobile terminal and determines whether or not the battery volume reaches a preset low-battery alarming threshold; and the information backup device stores contact information stored in the mobile terminal into a backup memory card when the battery volume reduces the low-battery alarming threshold. The present disclosure also discloses a device and a mobile terminal for information backup. The present disclosure enables the user of a mobile terminal to timely view contact information when the mobile terminal runs out of power.

Abstract: Federated restores of availability groups are described. A system backs up an availability group from a node in a cluster of nodes based on an identifier of the cluster of nodes. The system outputs information associated with at least one database replica in any availability group which is backed up based on the identifier of the cluster of nodes in response to a user request for the information. The system restores a user-selected database replica to a user-selected node in the cluster of nodes based on a user selecting at least some of the information.

Abstract: A replica site is restored to a selected point in time by determining data state at the selected point in time, writing data indicative of that data state to the replica site storage array, and moving extents of the data written to the replica site storage array to selected tiers in order to achieve a predetermined level of performance. A journal of statistical meta data indicative of IO activity may be used to select the tiers.

Abstract: Durable atomic transactions for non-volatile media are described. A processor includes an interface to a non-volatile storage medium and a functional unit to perform instructions associated with an atomic transaction. The instructions are to update data at a set of addresses in the non-volatile storage medium atomically. The functional unit is operable to perform a first instruction to create the atomic transaction that declares a size of the data to be updated atomically. The functional unit is also operable to perform a second instruction to start execution of the atomic transaction. The functional unit is further operable to perform a third instruction to commit the atomic transaction to the set of addresses in the non-volatile storage medium, wherein the updated data is not visible to other functional units of the processing device until the atomic transaction is complete.

Abstract: A system having a plurality of directors, at least some of which have a local director memory, accesses requested data by determining if requested data is in local director memory of a first one of the directors in response to an access request for the requested data by the first one of the directors. The system also determines if the requested data is native to the first one of the directors in response to the requested data not being in the local director memory of the first one of the directors, where data provided on a physical storage device coupled to the first one of the directors is native to the first one of the directors. The system also obtains the requested data from a second one of the directors in response to the requested data not being native to the first one of the directors.

Abstract: The present invention provides a centralized management mode backup disaster recovery system, which comprises: a control console (104) for performing centralized control on a data container (105), a backup process module (103), storage medium (101), and a standby machine (102) through respective control operations; a production server (108) responsible for controlling and managing data circulation between the production server and the storage medium in unit of data blocks; a backup process module (103) for backing up data to storage space allocated for the production server (180) by the storage medium (101) through an mirror technique and a synchronous or asynchronous technique or any other backup methods; the storage medium (101) for storing data and allocating a logic unit (200) to the production server (108) for data storage; the standby machine (102) for storing system data of the production server (108) and completing automatic running and setting of the standby machine (102) through the control console

Abstract: A controller area network (CAN) has a plurality of CAN elements including a communication bus and a plurality of controllers. A method for monitoring the CAN includes detecting occurrences of a first short-lived fault and a second short-lived fault within a predefined time window. A first fault set including at least one inactive controller associated with the first short-lived fault and a second fault set including at least one inactive controller associated with the second short-lived fault are identified. An intermittent fault is located in the CAN based upon the first and second fault sets.

Abstract: Identifying an inter-relationship between performance metrics of a computer system. It is proposed to convert performance metric signals, which represent variations of performance metrics over time, into quantized signals having a set of allowable discrete values. The quantized signals are compared to detect a correlation based on the timing of variations quantized signals. An inter-relationship between the performance metrics may then be identified based on a detected correlation between the quantized signals.