Abstract: A device for switching an electrical signal, controlled by an optical wave and having an on state and an off state, which can be inserted into a microwave transmission line, comprises a semiconductor substrate on which two conductive tracks are formed, these tracks being separated by a gap providing electrical insulation between the two tracks and each being connected to an input port and an output port, in the on state the electrical contact between the two tracks being established by illuminating the substrate in the region of the gap by means of the optical wave, the input impedance and the output impedance of said switching device being mismatched to the impedance of the transmission line in the off state and are matched to the impedance of the transmission line in the on state.

Abstract: Optical devices based on bismuth-containing III-V compound semiconductor materials are disclosed. The optical device includes an optically active pseudomorphic superlattice formed on a substrate. The superlattice includes alternating InAsSby layers (where y is greater than or equal to zero) and InAsBi layers.

Abstract: A method for fabricating an optically transparent conductor including depositing a plurality of metal nanowires on a substrate, annealing or illuminating the plurality of metal nanowires to thermally or optically fuse nanowire junctions between metal nanowires to form a metal nanowire network, disposing a graphene layer over the metal nanowire network to form a nanohybrid layer comprising the graphene layer and the metal nanowire network, depositing a dielectric passivation layer over the nanohybrid layer, patterning the dielectric passivation layer using lithography, printing, or any other method of patterning to define an area for the optically transparent conductor, and etching the patterned dielectric passivation layer to define the optically transparent conductor.

Abstract: Disclosed is a light emitting device. The light emitting device includes a nano-structure, a first semiconductor layer on the nano-structure, an active layer on the first semiconductor layer, and a second conductive semiconductor layer on the active layer. The nano-structure includes a graphene layer disposed under the first semiconductor layer to make contact with the first semiconductor layer; and a plurality of nano-textures extending from a top surface of the graphene layer to the first semiconductor layer and contacted with the first semiconductor layer.

Abstract: An epitaxial structure including an epitaxial substrate, a first buffer layer, a first pattern mask layer, a second buffer layer and a second pattern mask layer. The first buffer layer is disposed on the epitaxial substrate. The first pattern mask layer is disposed on the first buffer layer. The second buffer layer is disposed on the first pattern mask layer and a part of the first buffer layer. The second pattern mask layer is disposed on the second buffer layer. A projection of the first pattern mask layer projected on the first buffer layer and a projection of the second pattern mask layer projected on the first buffer layer cover at least 70% of the total area of the first buffer layer.

Abstract: Provided is a self-supporting gallium nitride substrate useful as an alternative material for a gallium nitride single crystal substrate, which is inexpensive and also suitable for having a large area. This substrate is composed of a plate composed of gallium nitride-based single crystal grains, wherein the plate has a single crystal structure in the approximately normal direction. This substrate can be manufactured by a method comprising providing an oriented polycrystalline sintered body; forming a seed crystal layer composed of gallium nitride on the sintered body so that the seed crystal layer has crystal orientation mostly in conformity with the crystal orientation of the sintered body; forming a layer with a thickness of 20 ?m or greater composed of gallium nitride-based crystals on the seed crystal layer so that the layer has crystal orientation mostly in conformity with crystal orientation of the seed crystal layer; and removing the sintered body.

Abstract: A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface, wherein an area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the micro-structures is A2, wherein A1 and A2 satisfies the relation of 0.1?A2/(A1+A2)?0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.

Abstract: A light-emitting device comprises a substrate comprising a top surface; a light-emitting stack formed on a portion of the top surface of the substrate; and a plurality of pores formed in an area of the substrate, wherein the area is under another portion of the top surface where the light-emitting stack is not formed thereon.

Abstract: A semiconductor structure includes an optoelectronic device located in one region of a substrate. A dielectric material is located adjacent and atop the optoelectronic device. A top contact is located within a region of the dielectric material and contacting a topmost surface of the optoelectronic device. A bottom metal contact is located beneath the optoelectronic device and lining a pair of openings located with other regions of the dielectric material, wherein a portion of the bottom metal contact contacts an entire bottommost surface of the optoelectronic device.

Abstract: A semiconductor light emitting device includes a light emitting structure and first and second electrodes. The light emitting structure includes first and second conductivity type semiconductor layers and an active layer interposed therebetween. The first and second electrodes are electrically connected to the first and second conductivity type semiconductor layers. The second electrode includes a current blocking layer, a reflective part disposed on the current blocking layer, a transparent electrode layer disposed on the second conductivity type semiconductor layer, a pad electrode part disposed within a region of the current blocking layer, and at least one finger electrode part disposed at least in part on the transparent electrode layer. The transparent electrode layer can be spaced apart from the reflective part, and have an opening surrounding the reflective part. In some examples, the transparent electrode layer can further be spaced apart from the current blocking layer.

Abstract: A light-emitting device is disclosed that includes a light-emitting stack comprising a first surface; a patterned dielectric layer formed on the first surface, comprising a first portion and a second portion substantially surrounding the first portion and having substantially the same thickness with that of the first portion; a first reflective electrode covering the first portion of the patterned dielectric layer; and a barrier layer covering the first reflective electrode and the second portion of the patterned dielectric layer.

Abstract: A light emitting diode includes a semiconductor stacked structure, a substrate, a first electrode, a second electrode and a third electrode. The semiconductor stacked structure includes a first semiconductor layer, a second semiconductor layer and a light emitting layer. A light extraction layer with a roughened structure is formed on the doped semiconductor layer to improve the light emitting efficiency of LED. Furthermore, the strength of the semiconductor stacked structure can be enhanced by the light extraction layer, to improve the reliability of the LED and the production yields of manufacturing process.

Abstract: A light-emitting diode is provided to include: a transparent substrate having a first surface, a second surface, and a side surface; a first conductive semiconductor layer positioned on the first surface of the transparent substrate; a second conductive semiconductor layer positioned on the first conductive semiconductor layer; an active layer positioned between the first conductive semiconductor layer and the second conductive semiconductor layer; a first pad electrically connected to the first conductive semiconductor layer; and a second pad electrically connected to the second conductive semiconductor layer, wherein the transparent substrate is configured to discharge light generated by the active layer through the second surface of the transparent substrate, and the light-emitting diode has a beam angle of at least 140 degrees or more. Accordingly, a light-emitting diode suitable for a backlight unit or a surface lighting apparatus can be provided.

Abstract: A semiconductor light-emitting device includes a light-emitting structure including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer, and a selective transmission-reflection layer disposed on the light-emitting structure and including a plurality of dielectric layers having different optical thicknesses alternately stacked at least once. The sum of an optical thickness of a dielectric layer having a maximum optical thickness and an optical thickness of a dielectric layer having a minimum optical thickness is in the range of 0.75 to 0.80.

Abstract: The present disclosure relates to a method for manufacturing a LED package structure. First, a support plate including a top surface is provided. An annular groove is defined on the top surface and a protruding portion on the support plate is surrounded by the annular groove. Second, a reflecting layer is formed on surfaces and periphery portions of the annular groove. Then, a wiring pattern is formed on the top surface corresponding to the protruding portion. An insulting layer is formed in spaces of the wiring pattern and the annular groove. The support plate is removed and a receiving groove is formed by the insulting layer and the corresponding protruding portion. Finally, a LED chip is received in the receiving groove and bonded on the wiring pattern to obtain a LED package structure. A LED package structure made by the above method is also provided.

Abstract: A light emitting diode includes: a substrate of front and back main surfaces; a V-shaped groove, which has a reflecting surface, formed over front surface of the conductive substrate; a light-emitting epitaxial layer, the margin of which has its vertical projection between the bottom and the inner margin of the V-shaped groove, formed over the substrate, so that light emitted from the light-emitting epitaxial layer margin is incident to the mirror surface of the V-shaped groove and emits outwards. This structure can effectively improve extraction efficiency of device and control path of light at peripheral region of the light-emitting epitaxial layer.

Abstract: A solution for packaging an optoelectronic device using an ultraviolet transparent polymer is provided. The ultraviolet transparent polymer material can be placed adjacent to the optoelectronic device and/or a device package on which the optoelectronic device is mounted. Subsequently, the ultraviolet transparent polymer material can be processed to cause the ultraviolet transparent polymer material to adhere to the optoelectronic device and/or the device package. The ultraviolet transparent polymer can be adhered in a manner that protects the optoelectronic device from the ambient environment.

Abstract: A method of manufacturing a light emitting diode package comprises steps of: scanning a light emitting diode chip mounted on a package substrate to acquire mounting image data; generating three dimensional (3D) image data by comparing the mounting image data with mounting reference data; and forming an optical structure including a plurality of layers on the package substrate on using the 3D image data.

Abstract: In various embodiments, an illumination device features an ultraviolet (UV) light-emitting device at least partially surrounded by an encapsulant and having a rigid lens. Downward forces is applied while the encapsulant is at least partially cured to substantially prevent partial or full detachment of the rigid lens from the light-emitting device, and/or substantially suppress formation of bubbles between the light-emitting device and the rigid lens.

Abstract: A light output device and manufacturing method in which an array of LEDs is embedded in an encapsulation layer. An array of cavities (or regions of different refractive index) is formed in the encapsulation layer. The cavities/regions have a density or size that is dependent on their proximity to the light emitting diode locations, in order to reduce hot spots (local high light intensity areas) and thereby render the light output more uniform over the area of the device.

Abstract: A light-emitting diode chip includes at least two semiconductor bodies, each semiconductor body including at least one active area that generates radiation, a carrier having a top side and an underside facing away from the top side, and an electrically insulating connector arranged at the top side of the carrier, wherein the electrically insulating connector is arranged between the semiconductor bodies and the top side of the carrier, the electrically insulating connector imparts a mechanical contact between the semiconductor bodies and the carrier, and at least some of the semiconductor bodies electrically connect in series with one another.

Abstract: Wafer level packaging of LED devices is accomplished using a bottom wafer that includes one or more vias. A passivation layer is placed over the top surface of the bottom wafer including the surface of the vias. Metal pads are placed on the top surface of the passivation layer and extend to the bottom of the vias. Bond pads are then associated with the metal pads and ultimately used in attaching an LED device bottom wafer assembly. An encapsulation layer is applied and in contact with the LED device and a top wafer is attached to the encapsulation layer. The thickness of the bottom wafer is reduced, removing the lower portion to expose the metal pads at the bottom of the vias. An isolation layer is applied to the bottom wafer and holes are formed in the isolation layer to expose the metal pads. Electroplated structures are in contact with the isolation layer and in contact with the exposed metal pads.

Abstract: An electronic platform comprising a substrate made of a ABO3 crystal (2) and at least one layer of a two-dimensional conducting sheet of carbon atoms (1) of a thickness between one and four atoms, characterized in that the conducting layer(s) is (are) placed on top of a face of the crystal whose orthogonal axis is at an angle up to 35° of the crystal's spontaneous polarization or c-axis. The invention achieves a sheet resistance lower than 1 ?/square at temperatures higher than 77K.

Abstract: A detector for detecting single photons of infrared radiation. In one embodiment a waveguide configured to transmit infrared radiation is arranged to be adjacent a graphene sheet and configured so that evanescent waves from the waveguide overlap the graphene sheet. An infrared photon absorbed by the graphene sheet from the evanescent waves heats the graphene sheet. The graphene sheet is coupled to the weak link of a Josephson junction, and a constant bias current is driven through the Josephson junction, so that an increase in the temperature of the graphene sheet results in a decrease in the critical current of the Josephson junction and a voltage pulse in the voltage across the Josephson junction. The voltage pulse is detected by the pulse detector.

Abstract: An acoustic wave device and an electronic component are disclosed. The acoustic wave device includes a substrate, excitation electrodes on the substrate and a cover. The cover comprises a frame member on the substrate, and a lid member. The frame member surrounds the excitation electrodes and includes an inner wall, top surface and an outer wall. The lid member is disposed on the top surface, and includes first and second surfaces opposite to each other, and a descending part on the second surface. The second surface faces the substrate. The descending part extends downward from the second surface, and covers at least a part of the inner wall or at least a part of the outer wall. The electronic component includes the acoustic wave device on a mounting substrate via an electrically conductive bonding member, and molding resin covering the device.

Abstract: An acoustic resonator structure comprises a piezoelectric layer having a first surface and a second surface, a first electrode disposed adjacent to the first surface, and a second electrode disposed adjacent to the second surface. The first electrode comprises a first conductive layer disposed adjacent to the piezoelectric layer and having a first acoustic impedance, and a second conductive layer disposed on a side of the first conductive layer opposite the piezoelectric layer and having a second acoustic impedance greater than the first acoustic impedance. The second electrode may be disposed between a substrate and the piezoelectric layer, and it may comprise a third conductive layer disposed adjacent to the piezoelectric layer and having a third acoustic impedance, and a fourth conductive layer disposed on a side of the third conductive layer opposite the piezoelectric layer and having a fourth acoustic impedance greater than the third acoustic impedance.

Abstract: A piezoelectric film having a porosity between 20 and 40%, a thickness ranging from tens of microns to less than a few millimeters can be used to form an ultrasonic transducer UT for operation in elevated temperature ranges, that emit pulses having a high bandwidth. Such piezoelectric films exhibit greater flexibility allowing for conformation of the UT to a surface, and obviate the need for couplings or backings. Furthermore, a method of fabricating an UT having these advantages as well as better bonding between the piezoelectric film and electrodes involves controlling porosity within the piezoelectric film.

Abstract: A circuit module and a composite circuit module, which suppress or prevent damage to a connection to or within a device when heat is applied, includes a SAW filter including a piezoelectric substrate. In a package substrate that is a resin substrate, the SAW filter is mounted. A mounting substrate is a multilayer substrate mounted on a mother substrate, and the package substrate is mounted therein.

Abstract: Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the crystallization barrier improves tunnel magnetoresistance (TMR) ratio with better alignment of crystalline texture of the free magnetic layer with that of a tunneling layer.

Abstract: A magnetoresistive structure having two dielectric layers, and method of manufacturing same, includes a free magnetic layer positioned between the two dielectric layers. The method of manufacture comprises at least two etch processes and at least an encapsulation process interposed therebetween wherein the encapsulation is formed on sidewalls of the partially formed magnetoresistive stack between etch processes.

Abstract: A vertical Hall Effect element includes a low voltage P-well region disposed at a position between pickups of a vertical Hall Effect element to result in an improved sensitivity of the vertical Hall Effect element. A method results in the vertical Hall Effect element having the improved sensitivity.

Abstract: Memory cells including cell cores having free regions are disclosed. The free regions exhibit a strain that affects a magnetization orientation within the cell core. A stressor structure may exert a stress upon at least a portion of the cell core to effect the strain state of the free region. Also disclosed are semiconductor device structures and systems including such memory cells as well as methods for forming such memory cells.

Abstract: A perpendicular magnetic tunnel junction (MTJ) apparatus includes a tunnel magnetoresistance (TMR) enhancement buffer layer deposited between the tunnel barrier layer and the reference layers. An amorphous alloy spacer is deposited between the TMR enhancement buffer layer and the reference layers to enhance TMR. The amorphous alloy spacer blocks template effects of face centered cubic (fcc) oriented pinned layers and provides strong coupling between the pinned layers and the TMR enhancement buffer layer to ensure full perpendicular magnetization.

Abstract: A magnetic tunnel junction (MTJ) device in a magnetoresistive random access memory (MRAM) and method of making the same are provided to achieve a high tunneling magnetoresistance (TMR), a high perpendicular magnetic anisotropy (PMA), good data retention, and a high level of thermal stability. The MTJ device includes a first free ferromagnetic layer, a synthetic antiferromagnetic (SAF) coupling layer, and a second free ferromagnetic layer, where the first and second free ferromagnetic layers have opposite magnetic moments.

Abstract: Some embodiments include integrated memory having an array of repeating plates across a plurality of nodes. The array includes rows and columns. The plates along individual columns and individual rows alternate between two orientations which are substantially orthogonal to one another. Some embodiments include methods of forming repeating structures. A pattern is formed which includes a lattice of intersecting wavy lines and a box surrounding the lattice. The pattern has a plurality of openings extending therethrough. A liner material is along sidewalls of the openings. The liner material and the pattern are sliced along a row direction and a column direction substantially orthogonal to the row direction. Such slicing subdivides the liner material into a plurality of plates. The plates are within an array comprising columns and rows. The plates along individual columns and individual rows alternate between two orientations which are substantially orthogonal to one another.

Abstract: The present invention is directed to a semiconductor memory device including a plurality of first level contacts arranged in a rectangular array with parallel columns directed along a first direction and parallel rows directed along a second direction. The rectangular array of the plurality of first level contacts have a first pitch and a second pitch along the first and second directions, respectively. The memory device further includes a first and second plurality of second level contacts formed on top of the first level contacts with the first plurality of second level contacts electrically connected to odd columns along the second direction of the first level contacts and the second plurality of second level contacts electrically connected to even columns of the first level contacts; and a first and second plurality of memory elements formed on top of the first and second plurality of second level contacts, respectively.

Abstract: Conductive oxide random access memory (CORAM) cells and methods of fabricating CORAM cells are described. For example, a material layer stack for a memory element includes a first conductive electrode. An insulating layer is disposed on the first conductive oxide and has an opening with sidewalls therein that exposes a portion of the first conductive electrode. A conductive oxide layer is disposed in the opening, on the first conductive electrode and along the sidewalls of the opening. A second electrode is disposed in the opening, on the conductive oxide layer.

Abstract: Some embodiments include a device having a conductive material, a metal chalcogenide-containing material, and a region between the metal chalcogenide-containing material and the conductive material. The region contains a composition having a bandgap of at least about 3.5 electronvolts and a dielectric constant within a range of from about 1.8 to 25. Some embodiments include a device having a first electrode, a second electrode, and a metal chalcogenide-containing material between the first and second electrodes. The device also includes an electric-field-modifying region between the metal chalcogenide-containing material and one of the first and second electrodes. The electric-field-modifying region contains a composition having a bandgap of at least about 3.5 electronvolts having a low dielectric constant and a low conduction band offset relative to a workfunction of metal of the metal chalcogenide-containing material.

Abstract: An apparatus having a reduced reflection from its surface includes a dielectric material and a capacitive circuit analog sheet buried within the dielectric material and configured to produce a reflection that adds out of phase with a reflection from an incident side of the dielectric material. The capacitive circuit analog sheet comprises conductive patches configured to have high impedance for transverse magnetic (TM) polarization.

Abstract: A method for manufacturing an organic electroluminescent (EL) display panel through a printing process of applying a raw material liquid between banks disposed on a board, the raw material liquid containing an organic EL material. The method includes, before the printing process: a detection process of detecting a contaminant A present on the board; an information generation process of generating, when the contaminant A is detected, position information indicating a position of the contaminant A; and a resin application process of applying an inhibitory resin to at least one of the contaminant A and a region in the vicinity of the contaminant A based on the position information.

Abstract: A method for producing a multiple-surface imposition vapor deposition mask enhances definition and reduces weight even when a size is increased. Each of multiple masks in an open space in a frame is configured by a metal mask having a slit, and a resin mask that is positioned on a front surface of the metal mask and has openings corresponding to a pattern to be produced by vapor deposition arranged by lengthwise and crosswise in a plurality of rows. In formation of the plurality of masks, after each of the metal masks and a resin film material for producing the resin mask are attached to the frame, the resin film material is processed, and the openings corresponding to the pattern to be produced by vapor deposition are formed in a plurality of rows lengthwise and crosswise, whereby the multiple-surface imposition vapor deposition mask of the above described configuration is produced.

Abstract: Method for the oriented crystallization of materials. The present invention relates to a method useful for orienting the crystallization of a material over a surface zone of at least one face of a substrate, comprising at least the steps consisting in: i. determining, on said face, the surface over which the crystalline deposit must be formed, referred to as the zone of interest, ii. depositing, on said face and at the periphery of said zone of interest, at least one particle dedicated to forming a crystallization nucleus, iii. bringing said particle into contact with at least said material to be crystallized, iv.

Abstract: A light emitting diode includes an insulating substrate, a first MgO layer, a semiconductor carbon nanotube layer, a second MgO layer, a functional dielectric layer, a first electrode, and a second electrode. The semiconductor carbon nanotube layer has a first surface and a second surface. The first MgO layer coats entire the first surface. The second surface is divided into a first region and a second region. The first region is coated with the second MgO layer. The second MgO layer is covered by the functional dielectric layer. The second region is exposed. The first electrode is electrically connected to the first region. The second electrode is electrically connected to the second region.

Abstract: Disclosed are a novel organic compound and an organic light emitting diode device using the same. More particularly, a novel organic compound having electrical stability, high charge transport capability, and light emitting performance, high glass transition temperature and being capable of preventing crystallization, and an organic light emitting diode device including an organic layer including the same are disclosed.

Abstract: It is an object of the present invention to provide a material having a high Tg and a wide energy gap. The present invention provides a spirofluorene derivative represented by General Formula 1. (In the formula, R1 is any one of hydrogen, an alkyl group having 1 to 4 carbon atoms, or a group represented by General Formula 2. Each of R2 and R3 is either hydrogen or an alkyl group having 1 to 4 carbon atoms and may be identical or different. R4 is an aryl group having 6 to 15 carbon atoms. Each of R5 and R6 is any one of hydrogen, an alkyl group having 1 to 4 carbon atoms, or an aryl group having 6 to 15 carbon atoms and may be identical or different.

Abstract: Polyphenylene compounds such as compounds represented by Formula 1 may be used in electronic devices such as organic light-emitting devices. For example, the compounds may be used as host materials in a light-emitting layer.

Abstract: Novel diarylamino phenyl carbazole compounds are provided. By appropriately selecting the nature of the diarylamino substituent and the substitution on the carbazole nitrogen, compounds with appropriate HOMO and LUMO energies can be obtained for use as materials in a secondary hole transport layer.

Abstract: A compound for an organic optoelectronic device is represented by Chemical Formula 1: and, in Chemical Formula 1, one of Ar1 or Ar2 is a substituted or unsubstituted C6 to C30 aryl group, or a substituted or unsubstituted C3 to C30 heteroaryl group, and the other of Ar1 or Ar2 is a substituent represented by the Chemical Formula 2:

Abstract: Compounds comprising phosphorescent metal complexes comprising cyclometallated imidazo[1,2-f]phenanthridine and diimidazo[1,2-a:1?,2?-c]quinazoline ligands, or isoelectronic or benzannulated analogs thereof, are described. Organic light emitting diode devices comprising these compounds are also described.

Abstract: Example embodiments relate to an organic photoelectronic device including a first electrode and a second electrode facing each other, and an active layer between the first electrode and the second electrode, wherein the active layer includes a first compound represented by the following Chemical Formula 1, and an image sensor including the organic photoelectronic device.