Patents Issued in February 7, 2017
  • Patent number: 9564551
    Abstract: A method of manufacturing an all back contact solar cell which has a hybrid emitter design. The solar cell has a thin dielectric layer formed on a backside surface of a single crystalline silicon substrate. One emitter of the solar cell is made of doped polycrystalline silicon that is formed on the thin dielectric layer. A second emitter of the solar cell is formed in the single crystalline silicon substrate and is made of doped single crystalline silicon. The method further includes forming contact holes that allow metal contacts to connect to corresponding emitters.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: February 7, 2017
    Assignee: SunPower Corporation
    Inventors: Paul Loscutoff, Seung Rim
  • Patent number: 9564552
    Abstract: The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved emission performance. In a MQW structure light-emitting layer in which a plurality of layer units is repeatedly deposited, each layer unit comprising an InGaN well layer, a GaN protective layer, and an AlGaN barrier layer sequentially deposited, the protective layer is formed as follows. The protective layer is grown at the same temperature as employed for the well layer. The growth rate of the protective layer is larger than 0.5 times and not larger than 1.1 times the growth rate of the well layer. The protective layer is formed so as to have a thickness of 5 ? to 8 ? at the start of growth of the barrier layer being formed thereafter.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: February 7, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Ryo Nakamura, Kengo Nagata
  • Patent number: 9564553
    Abstract: A light emitting diode device has a bulk gallium and nitrogen containing substrate with an active region. The device has a lateral dimension and a thick vertical dimension such that the geometric aspect ratio forms a volumetric diode that delivers a nearly uniform current density across the range of the lateral dimension.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: February 7, 2017
    Assignee: Soraa, Inc.
    Inventors: Thomas M. Katona, James W. Raring, Mark P. D'Evelyn, Michael R. Krames, Aurelien J. F. David
  • Patent number: 9564554
    Abstract: A thin-film flip-chip light emitting diode (LED) having a roughened surface and a method for manufacturing the same are provided. First, a substrate having a patterned structure on a surface of the substrate is provided, and the surface is roughened. A first semiconductor layer is then formed on the surface; a light emitting structure layer is then formed on the first semiconductor layer; a second semiconductor layer is then formed on the light emitting structure layer. The first and second semiconductor layers possess opposite electrical characteristics. A first contact electrode and a second contact electrode are then formed on the first semiconductor layer and the second semiconductor layer, respectively. Finally, a sub-mount is formed on the first and second contact electrodes, and the substrate is removed to form the thin-film flip-chip LED having the roughened surface. Here, the light emitting efficiency of the thin-film flip-chip LED is improved.
    Type: Grant
    Filed: October 8, 2015
    Date of Patent: February 7, 2017
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Fan Li, Jing-En Huang, Sie-Jhan Wu
  • Patent number: 9564555
    Abstract: An optoelectronic semiconductor module includes a chip carrier, a light emitting semiconductor chip mounted on the chip carrier and a cover element with an at least partly light transmissive cover plate, which is arranged on the side of the semiconductor chip facing away from the chip carrier, and has a frame part, wherein the frame part laterally encloses the semiconductor chip, is joined to the cover plate in a joining-layer free fashion and is joined to the chip carrier on its side remote from the cover plate.
    Type: Grant
    Filed: August 11, 2008
    Date of Patent: February 7, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Steffen Köhler, Moritz Engl, Frank Singer, Stefan Grötsch, Thomas Zeiler, Mathias Weiss
  • Patent number: 9564556
    Abstract: Embodiments of a light emitting device and a method for fabricating the same are provided. The light emitting device comprises a cavity and one or more light emitting elements. The cavity is formed to a depth of 450 ?m or less, and the light emitting elements are installed in the cavity. A fabricating method includes forming a package body having a cavity with a depth of 250 ?m to 450 ?m and at least one lead frame disposed at the bottom surface of the cavity, mounting at least one light emitting element on the lead frame, and molding a molding member in the cavity.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: February 7, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Sung Min Kong
  • Patent number: 9564557
    Abstract: The invention provides a lighting unit comprising a source of blue light, a source of green light, a first source of red light comprising a first red luminescent material, configured to provide red light with a broad band spectral light distribution, and a second source of red light comprising a second red luminescent material, configured to provide red light with a spectral light distribution comprising one or more red emission lines. Especially, the first red luminescent material comprises (Mg,Ca,Sr)AlSiN3:Eu and/or (Ba,Sr,Ca)2Si5-xAlxOxN8-x:Eu, and the second red luminescent material comprises K2SiF6:Mn.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: February 7, 2017
    Assignee: Koninklijke Philips N.V.
    Inventors: Volker Weiler, Peter Josef Schmidt, Hans-Helmut Bechtel
  • Patent number: 9564558
    Abstract: The present invention provides a fluoride fluorescent material comprising a chemical composition represented by the following formula (I): K2[M1-aMn4+aF6]??(I) wherein M is at least one element selected from the group consisting of elements belonging to Groups 4 and 14 of the Periodic Table, and a is a value that satisfies the relationship: 0<a<0.2, and a minimum value of a weight median diameter of the fluoride fluorescent material is 30 ?m.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: February 7, 2017
    Assignee: NICHIA CORPORATION
    Inventors: Tomokazu Yoshida, Suguru Takashima
  • Patent number: 9564559
    Abstract: The invention relates to a white emitting light source with an improved luminescent material of the formula (AEN2/3)*b(MN)*c(SiN4/3)*d1CeO3/2*d2EuO*xSiO2*yAlO3/2 wherein AE is an alkaline earth metal chosen of the group of Ca, Mg, Sr and Ba or mixtures thereof and M is a trivalent element chosen of the group of Al, B, Ga, Sc with d1>10*d2. In combination with a UV to blue light generating device this material leads to an improved light quality and stability, especially an improved temperature stability for a wide range of applications.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: February 7, 2017
    Assignee: Koninklijke Philips N.V.
    Inventors: Joerg Meyer, Hans-Helmut Bechtel, Walter Mayr, Peter Schmidt, Baby-Seriyati Schreinemacher, Detlef Uwe Wiechert
  • Patent number: 9564560
    Abstract: An optoelectronic component includes a semiconductor chip that emits a primary radiation in the short-wave blue spectral range at a dominant wavelength of less than approximately 465 nm; and a phosphor that converts at least part of the primary radiation into a longer-wave secondary radiation in the green spectral range at a dominant wavelength of between approximately 490 nm and approximately 550 nm and at least partly surrounds the semiconductor chip, wherein a mixed light composed of primary radiation and secondary radiation has a dominant wavelength at wavelengths of approximately 460 nm to approximately 480 nm such that a luminous flux of the mixed light is up to 130% greater than a luminous flux in an optoelectronic component without a phosphor having the same dominant wavelength in a range of 460 nm to 480 nm, and the phosphor is arranged in a lamina that bears directly on the semiconductor chip.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: February 7, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Torsten Baade, Kristin Groβe
  • Patent number: 9564561
    Abstract: The present invention provides a light-emitting device comprising a first light-emitting element that emits red light, a second light-emitting element that emits green light, a third light-emitting element that emits blue light, and a color filter, where the color filter comprises a first coloring layer that selectively transmits red light, a second coloring layer that selectively transmits green light, and a third coloring layer that selectively transmits blue light, the first to third light-emitting elements respectively correspond to the first to third coloring layers, wherein each of the first to third light-emitting elements has a first electrode, an electroluminescent layer on the first electrode, and a second electrode on the electroluminescent layer, and wherein the electroluminescent layer includes a layer in contact with the second electrode, and a metal oxide or a benzoxazole derivative is included in the layer in contact with the second electrode.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: February 7, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hisao Ikeda, Yasuo Nakamura, Keiko Saito
  • Patent number: 9564562
    Abstract: The silicone composition for sealing a semiconductor, comprises: (A) 100 parts of a polyorganosiloxane having one or more alkenyl groups, obtained by reacting (a1) 60 to 99 parts of an organosiloxane containing at least a trifunctional siloxane unit not taking part in a hydrosilylation reaction, with (a2) 40 to 1 parts of an organosiloxane containing a bifunctional siloxane unit having an alkenyl group and/or a monofunctional siloxane unit having an alkenyl group; (B) an amount of a polyorganohydrogensiloxane having two or more hydrogen atoms having a viscosity at 25° C. of 1 to 1000 mPa·s so that an amount of the hydrogen atoms is 0.5 to 3.0 mol per mol of the alkenyl groups; and (C) a platinum-based catalysts, wherein a decrease in storage modulus of a cured product thereof from 25° C. to 50° C. is 40% or more.
    Type: Grant
    Filed: June 4, 2015
    Date of Patent: February 7, 2017
    Assignee: MOMENTIVE PERFORMANCE MATERIALS JAPAN LLC
    Inventors: Kikuo Mochizuki, Akira Takagi
  • Patent number: 9564563
    Abstract: There is herein described electronic components with improved display contrast and a method of manufacturing such electronic components. More particularly, there is described electronic components having improved display contrast by using a non-transparent or substantially non-transparent material (520) to block light from an emitter source (512, 514, 516) to surrounding components such as emitters, sensors or components of this nature.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: February 7, 2017
    Assignee: Oculus VR, LLC
    Inventors: Zheng Gong, James Small, James Ronald Bonar
  • Patent number: 9564564
    Abstract: Disclosed are a light emitting device. The light emitting device include first and second lead frames, a first body on the first and second lead frames and including an open region, a second body on the first body and including a first opening, a light emitting chip on the opening region, and a transmissive layer on the light emitting chip. The first body and the second body are formed of a resin material. A top surface of the first body is located at a position lower than a position of a top surface of the light emitting chip. The second body includes a bottom surface located at a position lower than the position of the top surface of the light emitting chip. The first body comprises an inclined part around the light emitting chip. The first body includes a reflectance material and the second body includes a transmissive material.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: February 7, 2017
    Assignee: LG Innotek Co., Ltd.
    Inventors: Sung Joo Oh, Bong Kul Min
  • Patent number: 9564565
    Abstract: A light emitting device includes a light emitting element, a first terminal, a second terminal, and a light reflecting member. The first terminal and the second terminal each have a substantially spherical shape and are electrically connected to the light emitting element. The light reflecting member holds the light emitting element, the first terminal, and the second terminal. The light reflecting member includes a bottom surface, an upper surface, a first side surface, a second side surface, a front surface, a back surface, a first terminal exposure surface, and a second terminal exposure surface. The light emitting device is to be placed via the bottom surface. The first terminal is exposed from the first terminal exposure surface to provide a first exposed portion. The second terminal is exposed from the second terminal exposure surface to provide a second exposed portion.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: February 7, 2017
    Assignee: NICHIA CORPORATION
    Inventor: Hiroto Nagano
  • Patent number: 9564566
    Abstract: An optoelectronic component includes a housing having an electrically conductive first contact section, and an optoelectronic semiconductor chip arranged on the first contact section, wherein the optoelectronic semiconductor chip and the first contact section are at least partly covered by a first layer including a silicone, a second layer including SiO2 is arranged at a surface of the first layer, the second layer has a thickness of 10 nm to 1 ?m, and a third layer is arranged above the second layer.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: February 7, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Patrick Kromotis, Emanuel Hofmann, Ludwig Peyker, Torsten Baade, Simone Kiener, Kristin Grosse
  • Patent number: 9564567
    Abstract: A light emitting device package and a method of manufacturing the light emitting device package are provided. A base is first provided and a hole is formed on the base. After a light emitting portion is formed on the base, a mold die is placed on the light emitting portion and a molding material is injected through the hole. The mold die is removed to complete the package.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: February 7, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jun Seok Park, Seok Hoon Kang
  • Patent number: 9564568
    Abstract: An article includes a flexible polymeric dielectric layer having first and second major surfaces. The first major surface has a conductive layer thereon and at least one cavity therein. The at least one cavity contains a conductive material including electrically separated first and second portions supporting and electrically connecting a light emitting semiconductor device to the conductive layer on the first major surface.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: February 7, 2017
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Ravi Palaniswamy, Arokiaraj Jesudoss, Alejandro Aldrin II Agcaoili Narag, Siang Sin Foo, Fong Liang Tan, Andrew J. Ouderkirk, Justine A. Mooney
  • Patent number: 9564569
    Abstract: A sensor-in-package device, a process for fabricating a hermetically-sealed sensor-in-package device, and a process for fabricating a hermetically-sealed sensor-in-package device with a pre-assembled hat that employ example techniques in accordance with the present disclosure are described herein. In an implementation, the sensor-in-package device includes a substrate; at least one thermopile, at least one photodetector, at least one light-emitting diode, an ultraviolet light sensor, and a pre-assembled hat disposed on the first side of the substrate, where the pre-assembled hat includes a body; a first lid; and a second lid; where the body, the substrate, and the first lid define a thermopile cavity that houses the at least one thermopile, and where the body, the substrate, and the second lid define an optical cavity that houses at least one of the at least one photodetector, the at least one light-emitting diode, or the ultraviolet light sensor.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: February 7, 2017
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Ken Wang, Jerome C. Bhat, Tian Tian, Seshasayee Ankireddi, Kumar Nagaranjan, Seshasayee Gaddamraja
  • Patent number: 9564570
    Abstract: A thermoelectric module extends in a longitudinal direction and includes an outer tube, an inner tube disposed within the outer tube and an interspace between the tubes. At least one first strip-shaped structure and one second strip-shaped structure are provided. The first strip-shaped structure extends from a first connection on the inner tube and the second strip-shaped structure extends from a second connection on the outer tube in opposite directions in at least one circumferential direction or in the longitudinal direction and at least partly form an overlap at least in the circumferential direction or in the longitudinal direction. At least one pair of semiconductor elements is disposed in the region of the overlap. A method for producing a thermoelectric module and a thermoelectric generator are also provided.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: February 7, 2017
    Assignee: EMITEC Gesellschaft fuer Emissionstechnologie mbH
    Inventors: Sigrid Limbeck, Rolf Brueck
  • Patent number: 9564571
    Abstract: An electronic device includes a main body and a thermoelectric conversion module. The main body has a heat generating element therein. The thermoelectric conversion module includes a shell and a thermoelectric conversion element. The shell is assembled to the main body. The thermoelectric conversion element is pivoted on the shell and has an operation surface and a back surface opposite to each other. The thermoelectric conversion element is adapted to rotate between a first state and a second state relatively to the shell. When the thermoelectric conversion element is in the first state, the operation surface faces the main body and receives heat from the heat generating element, for the thermoelectric conversion element to generate electricity. When the thermoelectric conversion element is in the second state, the back surface faces the main body and the operation surface receives heat from external environment, for the thermoelectric conversion element to generate electricity.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: February 7, 2017
    Assignee: Wistron Corporation
    Inventors: Ting-Yao Cheng, Ya-Shian Huang, Chen-Pu Yang, Ming-Te Lee
  • Patent number: 9564572
    Abstract: A thermally driven power generator having a base and a heat source placed within the base. The thermally driven power generator further having a heat collector is adapted to collect the heat from the heat source through a plurality of fins and a heat sink adapted to release heat into the environment. The thermally driven power generator further having a thermal electric power generation module is sandwiched between the heat collector and a heat sink; the thermal electric power generation module is designed to convert heat collected by the heat collector to electrical power. A tray assembly for a thermally driven power generator, the tray assembly having: a transport tray; and a magnetic element integrated with the transport tray, the magnetic element designed to attract a wick keeper of a candle such that the wick is held in place.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: February 7, 2017
    Assignee: CAFRAMO LTD.
    Inventors: Viqar Haider, Michael Tettenborn, Anthony Jerzy Solecki
  • Patent number: 9564573
    Abstract: A technique relates to a trilayer Josephson junction structure. A dielectric layer is on a base electrode layer that is on a substrate. A counter electrode layer is on the dielectric layer. First and second counter electrodes are formed from the counter electrode layer. First and second dielectric layers are formed from the dielectric layer. First and second base electrodes are formed from base electrode layer. The first counter electrode, first dielectric layer, and first base electrode form a first stack. The second counter electrode, second dielectric layer, and second base electrode form a second stack. A shunting capacitor is between first and second base electrodes. An ILD layer is deposited on the substrate, the first and second counter electrodes, and the first and second base electrodes. A contact bridge connects the first and second counter electrodes. An air gap is formed underneath the contact bridge by removing ILD.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: February 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Josephine B. Chang, Gerald W. Gibson, Mark B. Ketchen
  • Patent number: 9564574
    Abstract: In a method for manufacturing a piezoelectric device, a silicon oxide film is deposited by sputtering on a surface of a single-crystal piezoelectric substrate closer to an ion-implanted region, and a silicon nitride film is deposited by sputtering on a surface of the dielectric film opposite to a side thereof closer to the single-crystal piezoelectric substrate. The silicon oxide film has a composition that is deficient in oxygen relative to the stoichiometric composition. Accordingly, little oxygen is supplied from the silicon oxide film to the piezoelectric thin film during heat treatment of a piezoelectric device. This prevents oxidation of the piezoelectric thin film and therefore formation of an oxide layer with high resistivity in the piezoelectric thin film. As a result, a pyroelectric charge generated in the piezoelectric thin film can flow to the silicon oxide film.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: February 7, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Takashi Iwamoto
  • Patent number: 9564575
    Abstract: Integrated circuits with magnetic random access memory (MRAM) and dual encapsulation for double magnesium oxide tunnel barrier structures and methods for fabricating the same are disclosed herein. As an illustration, an integrated circuit includes a magnetic random access memory structure that includes a bottom electrode that has a bottom electrode width and has bottom electrode sidewalls and a fixed layer overlying the bottom electrode that has a fixed layer width that is substantially equal to the bottom electrode width and has fixed layer sidewalls. The MRAM structure of the integrated circuit further includes a free layer overlying a central area of the fixed layer. Still further, the MRAM structure of the integrated circuit includes a first encapsulation layer disposed along the free layer sidewalls and a second encapsulation layer disposed along the bottom electrode sidewalls and the fixed layer sidewalls.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: February 7, 2017
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Danny Pak-Chum Shum, Hai Cong, Yi Jiang, Juan Boon Tan
  • Patent number: 9564576
    Abstract: Multi-bit ferroelectric memory devices and methods of forming the same are provided. One example method of forming a multi-bit ferroelectric memory device can include forming a first ferroelectric material on a first side of a via, removing a material to expose a second side of the via, and forming second ferroelectric material on the second side of the via at a different thickness compared to the first side of the via.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: February 7, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Kamal M. Karda, F. Daniel Gealy, D. V. Nirmal Ramaswamy, Chandra V. Mouli
  • Patent number: 9564577
    Abstract: A magnetoresistive random access memory (MRAM) device comprises a bottom electrode over a tapered bottom via, a tapered magnetic tunnel junction (MTJ) over the bottom electrode, a top electrode over the MTJ, and a top via over the top electrode. The top via, top electrode, MTJ, bottom electrode, and bottom via (and electrical interfaces therebetween) are substantially aligned along a common vertical axis. The bottom via has a taper angle of about 120° to about 150°. The MTJ has a taper angle of about 70° to about 85°. The MTJ is isolated and protected with dual sidewall spacers.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: February 7, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chern-Yow Hsu, Shih-Chang Liu
  • Patent number: 9564578
    Abstract: A semiconductor package includes a semiconductor die attached to a substrate and a magnetic field sensor included as part of the same semiconductor package as the semiconductor die and positioned in close proximity to a current pathway of the semiconductor die so that the magnetic field sensor can sense a magnetic field produced by current flowing in the current pathway. The magnetic field sensor includes a first magnetic field sensing component galvanically isolated from the current pathway and positioned so that a magnetic field produced by current flowing in the current pathway impinges on the first magnetic field sensing component in a first direction. The magnetic field sensor also includes a second magnetic field sensing component galvanically isolated from the current pathway and positioned so that the magnetic field impinges on the second magnetic field sensing component in a second direction different than the first direction.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: February 7, 2017
    Assignee: Infineon Technologies AG
    Inventors: Thorsten Meyer, Martin Gruber, Rainer Markus Schaller, Franz Jost, Stefan Mieslinger, Liu Chen, Toni Salminen, Giuliano Angelo Babulano, Jens Oetjen, Markus Dinkel
  • Patent number: 9564579
    Abstract: A Tunnel Magnetic Junction of high magnetoresistance is prepared at temperatures and pressure consistent with Si CMOS fabrication and operation. A first metal layer of cobalt or nickel is grown on an interconnect or conductive array line of e.g., copper. The metal layer is formed by electron beam irradiation. Annealing at UHV at temperatures below 700K yields a carbon segregation that forms a few layer thick (average density 3.5 ML) graphene film on the metal layer. Formation of a second layer of metal on top of the graphene barrier layer yields a high performance MTJ.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: February 7, 2017
    Assignee: UNIVERSITY OF NORTH TEXAS
    Inventors: Jeffry Kelber, Mi Zhou
  • Patent number: 9564580
    Abstract: A mechanism relates to magnetic random access memory (MRAM). A free magnetic layer is provided and first fixed layers are disposed above the free magnetic layer. Second fixed layers are disposed below the free magnetic layer. The first fixed layers and the second fixed layers both comprise a rare earth element.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: February 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Guohan Hu, Daniel C. Worledge
  • Patent number: 9564581
    Abstract: Embodiments of the present disclosure generally relate to memory devices having enhanced perpendicular magnetic anisotropy. The memory device includes a plurality of first leads, a plurality of second leads, and a plurality of memory cells having a plurality of magnetic layers and a tunneling barrier layer. An interfacial layer is incorporated in each memory cell between one of the magnetic layers and the tunneling barrier layer to enhance perpendicular magnetic anisotropy, while preserving high tunneling magnetoresistance.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: February 7, 2017
    Assignee: HGST Netherlands B.V.
    Inventors: Young-Suk Choi, Kurt Allan Rubin, Derek Stewart
  • Patent number: 9564582
    Abstract: A method for fabricating an MRAM bit that includes depositing a spacer layer that protects the tunneling barrier layer during processing is disclosed. The deposited spacer layer prevents byproducts formed in later processing from redepositing on the tunneling barrier layer. Such redeposition may lead to product failure and decreased manufacturing yield. The method further includes non-corrosive processing conditions that prevent damage to the layers of MRAM bits. The non-corrosive processing conditions may include etching without using a halogen-based plasma. Embodiments disclosed herein use an etch-deposition-etch sequence that simplifies processing.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: February 7, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Mahendra Pakala, Mihaela Balseanu, Jonathan Germain, Jaesoo Ahn, Lin Xue
  • Patent number: 9564583
    Abstract: A memory element includes an amorphous thin-film that is between a first electrode and a second electrode in which at least one of the first electrode and the second electrode contains Ag or Cu. The amorphous thin film is a non-phase changing, amorphous material. A storage device includes a plurality of memory elements. Each memory element includes a wiring connected to a side of the first electrode and a wiring connected to a side of the second electrode.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: February 7, 2017
    Assignee: SONY CORPORATION
    Inventors: Katsuhisa Aratani, Akira Kouchiyama, Minoru Ishida
  • Patent number: 9564584
    Abstract: An electronic device includes a semiconductor device that includes: a substrate including a switching element having a buried gate electrode; a buried decoupling capacitor having a line width same as a line width of the buried gate electrode; and a variable resistance element, electrically coupled to the switching element, formed over the substrate.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: February 7, 2017
    Assignee: SK hynix Inc.
    Inventors: Joon-Seop Sim, Seok-Pyo Song, Jae-Yun Yi
  • Patent number: 9564585
    Abstract: Embodiments of the present disclosure generally relate to electronic devices, and more specifically, to multi-level phase change devices. In one embodiment, a memory cell device is provided. The memory cell device generally includes a top surface, a bottom surface and a cell body between the top surface and the bottom surface. The cell body may include a plurality of phase change material layers, which may be used to store data of the cell. In another embodiment, a method of programming a memory cell is provided. The method generally may include applying a sequence of different pulses to each phase change material layer of the cell as the voltage of each pulse in the sequence is ratcheted down from the start of a write cycle to the end of a write cycle.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: February 7, 2017
    Assignee: HGST NETHERLANDS B.V.
    Inventors: Jeffrey Lille, Luiz M. Franca-Neto
  • Patent number: 9564586
    Abstract: Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: a plurality of first lines extending in a first direction and arranged in parallel to each other; a plurality of second lines extending in a second direction crossing the plurality of first lines and arranged in parallel to each other; and a plurality of memory cells disposed in intersection regions of the plurality of first lines and the plurality of second lines, respectively, and wherein each of the memory cells may include: a selecting element including a switching element and a thermoelectric element that are coupled to each other, the switching element having a non-linear current-voltage characteristic; a variable resistance element coupled to the selecting element; and a heat insulating member surrounding at least a sidewall of the selecting element.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: February 7, 2017
    Assignee: SK HYNIX INC.
    Inventor: Tae-Jung Ha
  • Patent number: 9564587
    Abstract: Providing for three-dimensional memory cells having enhanced electric field characteristics and/or memory cells located at broken interconnects is described herein. By way of example, a two-terminal memory cell can be constructed from a layered stack of materials, where respective layers are arranged along a direction that forms a non-zero angle to a normal direction of a substrate surface upon which the layered stack of materials is constructed. In some aspects, the direction can be orthogonal to or substantially orthogonal to the normal direction. In other aspects, the direction can be less than orthogonal to the normal direction. Where an internal angle of the memory cell forms a non-orthogonal angle, an enhanced electric field or current density can result, providing improved switching times and memory performance.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: February 7, 2017
    Assignee: CROSSBAR, INC.
    Inventors: Sung Hyun Jo, Kuk-Hwan Kim, Joanna Bettinger
  • Patent number: 9564588
    Abstract: A device for detecting a surface plasmon and polarization includes: a topological insulating layer formed on a substrate; first and second electrodes formed on the topological insulating layer; and a waveguide connected to the topological insulating layer between the first and second electrodes.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: February 7, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hee-jeong Jeong, Chang-won Lee, Sang-mo Cheon
  • Patent number: 9564589
    Abstract: A deposition method of fine particles, includes the steps of irradiating a fine particle beam formed by size-classified fine particles to an irradiated subject under a vacuum state, and depositing the fine particles on a bottom part of a groove structure formed at the irradiated subject.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: February 7, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Yuji Awano, Noriyoshi Shimizu
  • Patent number: 9564590
    Abstract: A mask comprises a mask frame defining an opening; a plurality of support bars installed in the opening of the mask frame; a plurality of movable bars, each of which is installed over a corresponding one of the plurality of support bars and movable relative to the corresponding support bar, wherein the plurality of support bars and the plurality of movable bars are arranged to divide the opening into a plurality of mask holes; and a plurality of actuators installed between the plurality of movable bars and the corresponding support bars and configured to move the movable bars relative to the plurality of support bars.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: February 7, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae An Seo, Bo Ik Park, Ju Chan Park, Young Gug Seol, Pil Suk Lee, Jin Hwan Choi
  • Patent number: 9564591
    Abstract: The problem addressed by the present invention is to enable the providing of a method for producing an organic electroluminescent element having a light-emitting pattern having superior gradation characteristics. The method for producing an organic electroluminescent element having a light-emitting pattern formed by means of light irradiation of an organic electroluminescent element provided with one or more organic functional layers between at least a pair of electrodes is characterized in that an image to pattern comprises a highlight section, a shadow section, and a linear section prepared ahead of time, the amount of light irradiation is altered on the basis of a tone reproduction curve having a soft gradation section that is at the highlight section and shadow section and that has a lower gradient inclination than that of the linear section, and thus a light-emitting pattern is formed having a gradient resulting from a light emission brightness corresponding to the amount of light irradiation.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: February 7, 2017
    Assignee: KONICA MINOLTA, INC.
    Inventors: Kuniaki Uezawa, Yuuji Aritomi
  • Patent number: 9564592
    Abstract: An organic electroluminescent element includes a support substrate having thereon at least two light emitting units each containing one or a plurality of organic functional layers and at least one intermediate metal layer having a light-transmitting property. The intermediate metal layer is arranged between the light emitting units. At least one organic functional layer in each light emitting unit has a region wherein a light emission function is modulated and another region wherein the light emission function is not modulated by being patterned with a mask during the step of forming the organic functional layer, and by being additionally patterned by light irradiation after formation of the organic functional layer. The at least two light emitting units are able to be electrically driven independently or simultaneously.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: February 7, 2017
    Assignee: Konica Minolta, Inc.
    Inventors: Kuniaki Uezawa, Natsuki Yamamoto
  • Patent number: 9564593
    Abstract: A solar cell includes a light-absorbing layer comprising a 2d-perovskite.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: February 7, 2017
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Hemamala Indivari Karunadasa, Ian Smith, Michael David McGehee
  • Patent number: 9564594
    Abstract: An light emitting diode includes an insulating substrate, a P-type semiconductor layer, a semiconductor carbon nanotube layer, an MgO layer, a functional dielectric layer, and a first electrode, and a second electrode. The P-type semiconductor layer is located on the insulating substrate. The semiconductor carbon nanotube layer is located on the P-type semiconductor layer. The MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer covers the MgO layer. The first electrode is electrically connected to the P-type semiconductor layer. The second electrode is electrically connected to the semiconductor carbon nanotube layer.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: February 7, 2017
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Guan-Hong Li, Qun-Qing Li, Yuan-Hao Jin, Shou-Shan Fan
  • Patent number: 9564595
    Abstract: A biscarbazole derivative represented by formula (1): wherein A1, A2, L1, L2, R1 to R4, and a to d are as defined in the specification, is useful as a material for forming organic EL devices and the organic EL devices including the derivative is capable of driving at a low voltage and has a long lifetime.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: February 7, 2017
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Tomoki Kato, Nobuhiro Yabunouchi, Takahiro Fujiyama
  • Patent number: 9564596
    Abstract: A compound represented by Formula 1 or 2, and an organic light-emitting device including the same are disclosed. Formulae 1 and 2 are defined as in the specification.
    Type: Grant
    Filed: April 2, 2014
    Date of Patent: February 7, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jun-Ha Park, Mi-Eun Jun, Eun-Jae Jeong
  • Patent number: 9564597
    Abstract: A substance having a hole-transport property and a wide band gap is provided. A fluorene compound represented by a general formula (G1) is provided. In the general formula (G1), ?1 and ?2 separately represent a substituted or unsubstituted arylene group having 6 to 13 carbon atoms; Ar1 represents a substituted or unsubstituted aryl group having 6 to 18 carbon atoms, a substituted or unsubstituted 4-dibenzothiophenyl group, or a substituted or unsubstituted 4-dibenzofuranyl group; n and k separately represent 0 or 1; Q1 represents sulfur or oxygen; and R1 to R15 separately represent hydrogen, an alkyl group having 1 to 12 carbon atoms, or an aryl group having 6 to 14 carbon atoms.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: February 7, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Harue Osaka, Takako Takasu, Hiromi Nowatari, Satoko Shitagaki, Nobuharu Ohsawa, Satoshi Seo, Kyoko Takeda, Sachiko Kawakami, Tsunenori Suzuki
  • Patent number: 9564598
    Abstract: An organic light-emitting device includes an anode, a cathode, and an organic layer between the anode and the cathode, wherein the organic layer includes a mixed organic layer, and the mixed organic layer includes at least two different compounds, and a triplet energy of at least one compound of the at least two different compounds is 2.2 eV or higher. The organic light-emitting device according to embodiments of the present invention may have a low driving voltage, a high efficiency, and a long lifespan.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: February 7, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Naoyuki Ito, Seul-Ong Kim, Youn-Sun Kim, Dong-Woo Shin, Jung-Sub Lee
  • Patent number: 9564599
    Abstract: An organic electroluminescent device is provided and includes: a cathode; an anode; and a light-emitting layer between the cathode and the anode. The light-emitting layer includes a compound represented by formula (1). In formula (1), L represents a linking group; A1, A2, A3, A4, A5, A6, A7, A8, A9, and A10 each independently represent a carbon atom or a nitrogen atom, provided that at least two of A1, A5, A6, and A10 each represent a carbon atom having R?; R? represents a substituent having a carbon atom at a bonding position thereof; a plurality of Rs each independently represent a substituent; m represents an integer; and n represents an integer of 2 to 10.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: February 7, 2017
    Assignee: UDC Ireland Limited
    Inventor: Tetsu Kitamura
  • Patent number: 9564600
    Abstract: A compound having an indolocarbazole ring structure is represented by the following general formula (1), and is used as a material for forming a highly efficient and highly durable organic electroluminescent device. The compound features excellent hole injection/transport capability, has electron blocking power and is highly stable in the form of a thin film. wherein, A is a divalent aromatic hydrocarbon group or aromatic heterocyclic group, Ar1 to Ar4 are monovalent aromatic hydrocarbon groups or aromatic heterocyclic groups, and R1 to R9 are hydrogen atoms, deuterium atoms, fluorine atoms, chlorine atoms, cyano groups, nitro groups, alkyl groups, cycloalkyl groups, alkenyl groups, alkyloxy groups, cycloalkyloxy groups, aromatic hydrocarbon groups, aromatic heterocyclic groups or aryloxy groups.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: February 7, 2017
    Assignee: HODOGAYA CHEMICAL CO., LTD.
    Inventors: Norimasa Yokoyama, Makoto Nagaoka, Sawa Izumi, Hiroshi Ookuma, Shuichi Hayashi