Abstract: A data accessing method for a memory storage apparatus is provided. The method includes using a first check code circuit to generate a first check code corresponding to a first data stream and generating a first data set based on the first data stream and the first check code. The method also includes using a second check code circuit to obtain the first data stream and the first check code from the first data set and check the first data stream according to the first check code. The method still includes using a third check code circuit to generate a second check code according to the checked first data stream and generating a data frame based on the checked first data stream and the second check code and thereby programming the data frame into a physical programming unit.

Abstract: According to an embodiment, a row decoder to perform row decoding by using, as row soft input information, a row received word read as soft determination information from a non-volatile memory and to calculate row extrinsic information and a column decoder to perform column decoding by using column soft input information, which is a result of adding of the row extrinsic information to a column received word read as soft determination information from the non-volatile memory, and to calculate column extrinsic information are included. The row decoder includes a first decoder for first decoding, a second decoder for second decoding a decoding method of which is different from that of the first decoding, and a selection unit to select a decoded result based on accuracy of a decoded result of the first decoding and that of a decoded result of the second decoding and to calculate the row extrinsic information.

Abstract: In some examples, an erasure code can be implemented to provide for fault-tolerant storage of data. Maximally recoverable cloud codes, resilient cloud codes, and robust product codes are examples of different erasure codes that can be implemented to encode and store data. Implementing different erasure codes and different parameters within each erasure code can involve trade-offs between reliability, redundancy, and locality. In some examples, an erasure code can specify placement of the encoded data on machines that are organized into racks.

Abstract: Integrated circuits with memory circuitry may include error detection circuitry and error correction circuitry. The error detection circuitry may be used to detect soft errors in the memory circuitry. The error detection circuitry may include logic gates that are used to perform parity checking. The error detection circuitry may have an interleaved structure to provide interleaved data bit processing, may have a tree structure to reduce logic gate delays, and may be pipelined to optimize performance. The memory circuitry may be loaded with interleaved parity check bits in conjunction with the interleaved structure to provide multi-bit error detection capability. The parity check bits may be precomputed using design tools or computed during device configuration. In response to detection of a memory error, the error correction circuitry may be used to scan desired portions of the memory circuitry and to correct the memory error.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.

Abstract: A method and system for service-aware parity placement in a storage system, including after receiving the service notification specifying a target SD: writing a RAID stripe to the persistent storage, where the parity block of the RAID stripe is stored on the target SD and none of the data blocks in the RAID stripe are stored on the target SD. The method further includes performing a modified garbage collection operation that includes identifying a live RAID stripe in the persistent storage, writing a new RAID stripe to a new location in the persistent storage, where the new RAID stripe includes a copy of at least a portion of data from the live RAID stripe and a parity block in the new RAID stripe is stored on the target SD, and issuing a removal notification when the modified garbage collection operation is completed.

Abstract: An operating system recovery method is provided. The method includes starting a level 2 kernel, and transferring an image file of a to-be-recovered operating system to a specified location of a memory by using the started level 2 kernel so that a location of a recovery program in the level 2 kernel in the memory is the same as a location of a recovery program in an original kernel in the memory, where the level 2 kernel is obtained by tailoring an image file of the original kernel and then compiling a tailored image file of the original kernel; and recovering, by using the level 2 kernel, the operating system to a state, before the operating system enters a hibernation mode, of the operating system. A recovery speed of the operating system can be accelerated. In addition, a corresponding apparatus and terminal device are further provided.

Abstract: A server system is disclosed herein, which includes a first BIOS chip, a second BIOS chip, a platform controller, and a baseboard management controller. The platform controller and the baseboard management controller are electrically connected to a first multi-way selector and a second multi-way selector, respectively. The first multi-way selector and the second multi-way selector are individually electrically connected to both the first BIOS chip and the second BIOS chip. The disclosure can accomplish an aspect that when either of the first BIOS chip and the second BIOS chip fails in activating the server system, the server system can be automatically activated by the other BIOS chip. Further, by the baseboard management controller, a firmware of the fail-to-activate BIOS chip can be simultaneously updated, thereby improving security and reliability of the server system.

Abstract: Methods, devices, and storage media are provided for preserving the context of a server-client session. A server generates an initial context and a context for each user command executed in a first session and sends context to a client with the return for each command. The context describes software, session state, returned data, and/or hardware characteristics of a server-side environment for the first session. The client receives and stores the context with each user command. Upon determining that the database session should be rebuilt in the second session, the client sends initial context. A server for the second session receives the initial context and determines whether commands should be replayed in the second session. If commands are replayed, the server validates that server environment and client-visible results for each command in the second session match that from execution in the first session using the context for that command.

Abstract: A system and method for determining when to reset a controller in response to a bus off state. The method includes determining that the controller has entered a first bus off state and immediately resetting the controller. The method further includes setting a reset timer in response to the controller being reset, determining whether the controller has entered a subsequent bus off state, and determining whether a reset time. The method immediately resets the controller in response to the subsequent bus off state if the reset time is greater than the first predetermined time interval, and resets the controller in response to the subsequent bus off state after a second predetermined time interval has elapsed if the reset time is less than the first predetermined time interval.

Abstract: Methods and systems for cluster resource management in virtualized computing environments are described. VM spares are used to reserve (or help discover or otherwise obtain) a set of computing resources for a VM. While VM spares may be used for a variety of scenarios, particular uses of VM spares include using spares to ensure resource availability for requests to power on VMs as well as for discovering, obtaining, and defragmenting the resources and VMs on a cluster, e.g., in response to requests to reserve resources for a VM or to respond to a notification of a failure for a given VM.

Abstract: A method of managing documents in an active repository that includes receiving one or more documents having metadata from a plurality of cache repositories; registering the metadata in a registry; storing the one or more documents in the active repository; and replicating the stored one or more documents and the registered metadata to a backup system.

Abstract: For recovering from a RAID array failure in the deduplication repository, creating a new backup volume using a synchronized FC backup of the source production volume residing on an alternative RAID array.

Abstract: Various systems and methods for configuring backup and replication operations. For example, a method involves a backup system receiving storage configuration information regarding a replication topology of a storage system. The backup system uses the storage configuration information to configure a backup operation. The backup operation is configured in accord with specifications included in backup information. Configuring the backup operation includes selecting a source volume and a target volume, using the storage configuration information. Once the backup operation is configured, the backup operation is initiated. Performing the backup operation involves creating a backup image on the selected source volume and replicating the backup image to the selected target volume.

Abstract: In one aspect, a method includes receiving a request to restore data of a volume, determining if the data is stored at a first storage device or a second storage device, restoring the data of the volume by using a journal and a first snapshot of the volume stored at the first storage device if the data is stored at the first storage device and restoring the data of the volume by using a second snapshot of the volume stored at the second storage device if the data is stored at the second storage device.

Abstract: An information handling system and method allows implementation of fault-tolerant storage subsystems using multiple storage controllers not themselves originally designed to support the redundancy of such fault-tolerant storage subsystems. In accordance with one embodiment, uncommitted data is efficiently and rapidly replicated across multiple commodity storage controllers, enabling faster and less expensive fault-tolerant storage subsystems. A redundant storage controller system can improve the efficiency of data replication while providing failure protection against controller failure. A redundant storage controller system using shared memory commonly accessible to the storage controllers can be enhanced to replicate data within host memory regions to protect against non-volatile memory failure. In accordance with at least one embodiment, an efficient data replication mechanism can be provided between storage controllers using off-the-shelf hardware.

Abstract: Exemplary method, system, and computer program product embodiments for protecting data segments by a processor device in a computing environment, are provided. In one embodiment, by way of example only, a history table is configured to accompany data segments for consultation during a replication operation. If the history table indicates an ownership conflict, the replication operation is inhibited.

Abstract: When detecting the configuration change or the operating state of a virtual machine of the main system, a VM management unit changes a value of a determination index of the virtual machine, and selects a virtual machine of the standby system/auxiliary system used for failure recovery of the virtual machine of the main system on the basis of a value of the determination index. A pattern generation unit provides the virtual machine of the standby system/auxiliary system selected by the VM management unit.

Abstract: Systems and techniques for capturing audio and delivering the audio in digital streaming media formats are disclosed. Several aspects of the systems and techniques operate in a cloud computing environment where computational power is allocated, utilized, and paid for entirely on demand. The systems and techniques enable a call to be made directly from a virtual machine out to a Public Switch Telephone Network (PSTN) via a common Session Interface Protocol (SIP) to PSTN Breakout service, and the audio to be delivered onward to one or more Content Delivery Network (CDN). An audio call capture interface is also provided to initiate and manage the digital streaming media formats.

Abstract: Disclosed is an error recovery circuit facing a CPU assembly line, comprising: on-chip monitoring circuits (1), an error signal statistics module (2), a voltage frequency control module (3), an error recovery control module (4), an in-situ error recovery module (5) and an upper-layer error recovery module (6), wherein each of the on-chip monitoring circuits (1) is integrated at the end of each stage of assembly lines of the previous N?1 stages of assembly lines of a CPU kernel with an N-stage assembly line structure, so as to monitor the time sequence information about each clock period of an operating circuit, wherein N is a positive integer which is greater than or equal to 3 and less than 20.

Abstract: A storage controller out of a plurality of storage controllers used in a storage system, each of the plurality of storage controllers being configured to control mirror processing of data, the storage controller comprising: circuitry configured to: determine a storage controller of a destination of an input and output request for a volume, out of the plurality of storage controllers, based on mirror device information where identifiers and priorities of the respective storage controllers are stored while being associated with each other for each of mirror processing units, and state information being for each of storage controllers and indicating whether the storage controller is normal or not, and issue the input and output request to the determined storage controller.

Abstract: Disclosed herein are method, system and computer program product embodiments for improving the verification process of a system on chip (SoC). An embodiment operates by employing an active interconnect (AIC) between a processing subsystem (e.g., a central processing unit or CPU) and a plurality of peripherals, wherein the processing subsystem is linked to a plurality of applications via a plurality of drivers, and implementing a common set of software codes by at least one of the applications for a software development process and a hardware verification process. The AIC includes a plurality of communication protocols. During the software development process, the AIC configures at least one of the communication protocols to not enforce a timing limitation on one or more transactions between the processing subsystem and at least one of the peripherals, and a high-level programming language model is used for the peripherals.

Abstract: A method of analyzing behavior of a device under test includes obtaining event traces that include a current sequence trace and a reference sequence trace. The event traces include one or more transactions that include one or more properties. A list of relevant properties of one or more transactions is obtained. A first set of n-tuples including values of the relevant properties for the current sequence trace is extracted. A second set of n-tuples including values of the relevant properties for the reference sequence trace is extracted. The first set of n-tuples is compared with the second set of n-tuples to indicate one or more transaction indices corresponding to differences in transactions between the current sequence trace and the reference sequence trace. Transactions corresponding to the transaction indices are annotated to obtain annotated transactions. The current sequence trace and/or the reference sequence trace are displayed with the annotated transactions.

Abstract: Embodiments of network testbed creation and validation processes are described herein. A “network testbed” is a replicated environment used to validate a target network or an aspect of its design. Embodiments describe a network testbed that comprises virtual testbed nodes executed via a plurality of physical infrastructure nodes. The virtual testbed nodes utilize these hardware resources as a network “fabric,” thereby enabling rapid configuration and reconfiguration of the virtual testbed nodes without requiring reconfiguration of the physical infrastructure nodes. Thus, in contrast to prior art solutions which require a tester manually build an emulated environment of physically connected network devices, embodiments receive or derive a target network description and build out a replica of this description using virtual testbed nodes executed via the physical infrastructure nodes. This process allows for the creation of very large (e.g.

Abstract: Providing efficient data replication for a transaction processing server is provided. A notification is received from the transaction processing server which completes a transaction of a message. The notification includes a message digest and a message identifier. The message identifier in the received notification is compared with a stored message identifier. In response to a match of the comparing of the message identifier, the message digest in the received notification is compared with a stored message digest. In response to a match of the comparing of the message digest, a stored input message is directly stored in a physical storage.

Abstract: An information processing apparatus includes a hardware processor and a memory storing executable instructions that, when executed by the processor, cause the processor to extract a command from a command cache, complete a process by the command utilizing a predetermined method, input information, which indicates a final result of the process, onto a writing stage when the process by the command has been completed, compute, when operation of information input onto an execution stage for execution of the process by the command has been completed, power consumption required to execute the command stored in the execution stage in accordance with a status of a CPU (central processing unit) or a status of pertained parts around the CPU, and add, when operation of information input onto the writing stage has been completed, the computed power consumption to a current value of a power accumulating register that is a software visible register, so as to obtain accumulated power consumption.

Abstract: A method and associated system for method for generating performance and capacity statistics that consists of a processor receiving statistical information from a set of monitoring entities that monitor characteristics of one or more computing resources. The processor formats the received statistics for storage in a raw-data repository, then filters and processes the data to extract data items necessary to generate predefined reports and to place the extracted data in a format consistent with historical information. The processor then merges the filtered, formatted data with the historical information to create an integrated history of the characteristics and stores the integrated history in a history repository. This integrated history is automatically translated into reports customized to requirements of particular support personnel, which are then forwarded to local devices from which the support personnel may select, customize, and review the reports.

Abstract: Customizing menus for a consumer electronics device, including: preparing menu definitions for the menus to be customized on the consumer electronics device; generating menu configuration information using the prepared menu definitions; transmitting the generated menu configuration information to the consumer electronics device; and monitoring and tracking menu usage data of the consumer electronics device. Keywords include customization of menus and consumer electronics device.

Abstract: A correlation model generation unit generates a plurality of correlation models each expressing correlations between different types of performance values in a predetermined period, which are stored in a performance information unit. A model setting unit selects, from among the plurality of correlation models generated by the correlation model generation unit, a basic model which is a correlation model showing the highest fitting degree and one or more specific models which are correlation models other than the basic model, on the basis of a fitting degree of each of the correlation models for the performance information in the predetermined period, and sets time periods on which the basic model and the specific models are applied respectively to failure detection.

Abstract: A processor system tracks, in at least one counter, a number of cycles in which at least one execution unit of at least one processor core is idle and at least one thread of the at least one processor core is waiting on at least one off-core memory access during run-time of the at least one processor core during an interval comprising multiple cycles. The processor system evaluates an expected performance impact of a frequency change within the at least one processor core based on the current run-time conditions for executing at least one operation tracked in the at least one counter during the interval.

Abstract: Some embodiments include a computer server implementing a splitter engine to perform testing of a pre-production version of an application service against live traffic. The splitter engine can receive a client request for a live application service. The splitter engine can generate a live response by processing the client request through a live instance of a production engine. The splitter engine can select one or more request processors to process the client request and a processing order based on a request type of the client request. The splitter engine can process the client request through the one or more request processors according to the processing order after responding to the client request with the live response. The splitter engine can compare states of at least two of the production engine and the one or more request processors.

Abstract: The disclosed embodiments provide a system that detects anomalous events. During operation, the system obtains machine-generated time-series performance data collected during execution of a software program in a computer system. Next, the system removes a subset of the machine-generated time-series performance data within an interval around one or more known anomalous events of the software program to generate filtered time-series performance data. The system uses the filtered time-series performance data to build a statistical model of normal behavior in the software program and obtains a number of unique patterns learned by the statistical model. When the number of unique patterns satisfies a complexity threshold, the system applies the statistical model to subsequent machine-generated time-series performance data from the software program to identify an anomaly in an activity of the software program and stores an indication of the anomaly for the software program upon identifying the anomaly.

Abstract: A method for determining an extent of code changes upon implementation of a software modification has the steps of: registering the number of software code components and the respective number of lines of code of each software component of a software code before the implementation of the software modification, implementing the software modification by changing the software code, determining the number of software code components that have changed due to the implementation of the software modification, determining the number of lines of code of each software component that have changed due to the implementation of the software modification, and determining an invasiveness value on the basis of the determined number of software code components that have changed and determined number of lines of code that have changed, the invasiveness value being indicative of the extent of software code changes upon implementation of the software modification.

Abstract: Computer-implemented systems and methods are provided for determining application matching status. In one implementation, a method is implemented with one or more processors and includes accessing, at a server, a first dependency tree representing a first application and a second dependency tree, and acquiring one or more values for the first dependency tree and one or more values for the second dependency tree. The method also includes comparing the one or more values of the first dependency tree with the one or more values of the second dependency tree. The method further includes determining a matching status between the first application and an application represented by the second dependency tree based on the comparison, and providing, for display, an indication of the matching status.

Abstract: When a module is loaded by the operating system kernel, dynamic information of the module, such as the memory addresses of the different sections of the module allocated by the operating system, is stored in a known variable, which is subsequently accessible by the debugging tool. Furthermore, an interrupt instruction that will allow the debugger to interrupt the running of the operating system following the complete loading of the module is inserted into the debugging tool in such a way as to retrieve the dynamic information necessary for the debugging of the module.

Abstract: Disclosed is a method of debugging a simulation system including design code representing a design of an electronic circuit and test program code configured to exercise the design code. The method includes using an interactive debugging tool to execute an interactive simulation of the test program code and the design code, and, during the interactive simulation, displaying, using the interactive debugging tool, information of a simulation results file storing a plurality of signal values generated by executing the test program code and the design code during a previously executed simulation.

Abstract: Disclosed are a content recording method and device, for use in software development. The method includes: capturing the content displayed on a screen in the software development process; acquiring a mouse event related to the content displayed on the screen; and processing the mouse event and the content displayed on the screen to obtain the recorded content, the recorded content containing the content displayed on the screen and the mouse event. The technical solution can record a screen capture and a mouse/keyboard operation related thereto in the software test development process, thus effectively recording the test and development process, and improving test and development efficiency.

Abstract: Systems and methods for measuring the rendering time for individual components of a software application, such as a single page application (SPA). Baseline screenshots are captured for specific screen regions associated with selected components. After invalidating associated application caches, one or more selected components are reloaded. After respective server calls complete, which time corresponds to rendering start times, test screenshots of the specified regions are captured during re-rendering and are compared to their corresponding baseline screenshots. When a match is found for a component under test, the time the match is found is marked as a rendering completion time. The rendering completion time for each component may be compared to the corresponding rendering start time to determine the amount of time taken to render each of the components of the application.

Abstract: The invention relates to a computer system that may include a processor, an accessibility API, a GUI, and a test module. The test module may use the accessibility API for analyzing GUI elements of the GUI and for automatically identifying GUI element features and inter-GUI-element dependencies. The test module may use the GUI element features and inter-GUI-element dependencies to generate a graph. The test module may traverse the graph and analyzes the GUI element features assigned to each currently accessed node or said node's child or sibling node. Thereby, the test module may identify predefined GUI element patterns in the graph and in the GUI. In case a matching GUI element pattern was identified, the test module may automatically identify one or more test routines associated with the identified GUI element pattern and automatically perform the one or more identified test routines on the GUI.

Abstract: Technologies and implementations for providing an application programming interface (API) testing services for transferring data center services. In some examples, multiple API calls used by a service at an origin data center are converted into respective test segments. An API test module including each of the test segments is formed for a multiple number of target data centers and the API test module is transmitted from the origin data center to the target data center centers for execution at the target data centers. One or more test results based at least in part on the transmitted API test module being executed at the target data centers are received, and a report based on the one or more test results that indicates which of the application programming interface calls from the origin data center are compatible with the target data centers is generated.

Abstract: A method, product and apparatus for creating functional model of test cases. The method comprising obtaining a set of test cases, wherein each test case of the set of test cases comprises free-text; defining one or more tags, wherein each tag of the one or more tags is associated with a query that is configured, when applied, to determine possession of the tag with respect to a test case based on the free-text; applying the queries on the set of test cases to determine possession of the of the one or more tags for each test case; and generating a functional model based on the set of test cases, wherein the functional model comprising for each tag of the one or more tags, a corresponding functional attribute.

Abstract: A method and system for storage checkpointing of an independent computer application. The independent computer application is launched by a coordinator; and the coordinator installs at least one of an exec interceptor and a fork interceptor. The coordinator also installs at least one file operations interceptor for all file operations and registers the independent computer application with the coordinator. The independent computer application is run and the at least one file operations interceptor is called upon encountering a file operation. The file operations interceptor logs a file event in a file operations database and passes the operation to at least one of a file system, an operating system, at least one or more device drivers, and a storage disk via a storage interface. The file operations interceptor also verifies that the file operation has been issued.

Abstract: Systems, methods, and computer-readable media are disclosed for testing a software application. An exemplary method includes storing a control file identifying a test case for testing a software application. A first expected result may be extracted from a device storing expected results of the software application, the first expected result being identified by the control file. A first actual result may be extracted from a device storing actual results output by the software application, the first actual result being identified by the control file. The first expected result may be compared with the first actual result to determine whether the first actual result matches the first expected result. A result file indicating whether the test case passed or failed is generated, and the test case has passed when the first actual result matches the first expected result. The result file may be stored in a storage device.

Abstract: A tuple testing and routing operator in a streaming application routes data tuples to multiple parallel test operators that test in parallel the data tuples, receives feedback from the multiple parallel test operators regarding the results of testing the data tuples, routes a data tuple to a first operator when the data tuple passes the multiple parallel test operators according to a specified pass threshold, and optionally routes the data tuple to a second operator when the data tuple does not pass the multiple parallel test operators according to the specified pass threshold. The pass threshold allows testing to be done in a way that does not require all tests to be performed for all data tuples, thereby enhancing performance.

Abstract: A method is described that entails receiving an address for a read or write transaction to a non volatile system memory device. The method further involves determining a usage statistic of the memory device for a set of addresses of which the address is a member. The method further involves determining a characteristic of a signal to be applied to the memory device for the read or write transaction based on the usage statistic. The method further involves generating a signal having the characteristic to perform the read or write transaction.

Abstract: The invention provides a data storage device. In one embodiment, the data storage device is coupled to a host, and comprises a flash memory and a controller. The flash memory comprises a spare block pool and a data block pool, wherein the spare block pool comprises a plurality of spare blocks, and the data block pool comprises a plurality of data blocks. The controller receives target data from the host, writes the target data to a current programming data block, determines whether a current programming page is a first page of the current programming data block, determines whether data move information is set when the current page is not the first page, and when the data move information is set, perform a data move process according to the data move information within a limited time period.

Abstract: A method for managing data. The method includes receiving a first request to write data to persistent storage and in response to the first request, writing the data to a short-lived block in the persistent storage, where the data is short-lived data or data of unknown longevity. The method further includes performing a modified garbage collection operation that includes: selecting a first frag page in a first block, determining that the first frag page is live, and migrating, based on the determination that the first frag page is live, the first frag page to a long-lived block in the persistent storage, where the long-lived block is distinct from the short-lived block and wherein the long-lived block does not include any short-lived data.

Abstract: Providing a RRAM based memory storage device that has a NAND memory type architecture with a configurable page size. In an embodiment, two memory registers can be used to access and transfer data stored in the storage device to a host. A memory controller on the storage device can determine a page size of the host, and alternately transfer data from the first register and then the second register until an amount of data transferred equals the page size of the host. The memory controller can send the data to the host as if the data belonged to one page transfer. In this way, the memory controller creates a virtualized page size based on the requirements of the host.

Abstract: A system and method determines an object's lifetime. An object lifecycle engine may work with an object oriented environment. As objects are created, an object graph may be constructed having one or more roots. A root record graph may be constructed, and edges of the root record graph may point in an opposite direction than the edges of the object graph. As objects, entities, and references are added, removed, or deleted from within the environment, the object graph and the root record graph may be updated. A root finder may search the root record graph to determine whether a given root record is no longer rooted. If a root record is no longer rooted, then the object associated with that root record may be determined to be unreachable and at the end of its lifetime. If the root finder search is performed when references are removed, then objects may be destroyed in a deterministic manner.

Abstract: An arbiter circuit and a translation circuit. The arbiter circuit may be configured to generate a first address signal in a virtual memory space by arbitrating among a plurality of clients to access a physical memory space. The clients may be classified as either privileged clients or non-privileged clients. The physical memory space may comprise at least one secure space. The secure space may be used to protect data of the privileged clients from being accessed by the non-privileged clients. The translation circuit may be configured to generate a second address signal by translating a page in the virtual memory space into the physical memory space. The page may correspond to a particular one of the clients that won the arbitration. The page may translate into the secure space if the particular client is one of the privileged clients. The page may also translate outside the secure space if the particular client is one of the non-privileged clients.